Re: [PATCH v3 03/12] KVM: arm/arm64: Replace the single rdist region by a list

R last bit. > > Signed-off-by: Eric Auger <eric.au...@redhat.com> Reviewed-by: Christoffer Dall <christoffer.d...@arm.com> > --- > include/kvm/arm_vgic.h | 14 + > virt/kvm/arm/vgic/vgic-init.c | 16 -- > virt/kvm/arm/vgic/vgic

Re: [PATCH v3 05/12] KVM: arm/arm64: Revisit Redistributor TYPER last bit computation

online_vcpus) - 1) > + > + if (addr == last_rdist_typer) > value |= GICR_TYPER_LAST; > if (vgic_has_its(vcpu->kvm)) > value |= GICR_TYPER_PLPIS; > -- > 2.5.5 > Reviewed-by: Christoffer Dall <christoffer.d...@arm.com> ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

Re: [PATCH v3 01/12] KVM: arm/arm64: Set dist->spis to NULL after kfree

off-by: Eric Auger <eric.au...@redhat.com> > Reviewed-by: Marc Zyngier <marc.zyng...@arm.com> Reviewed-by: Christoffer Dall <christoffer.d...@arm.com> > > --- > > v2 -> v3: > - added Marc's R-b and Fixed commit > --- > virt/kvm/arm/vgic/vgic-init.c

Re: [PATCH v3 06/12] KVM: arm/arm64: Helper to register a new redistributor region

On Fri, Apr 13, 2018 at 10:20:52AM +0200, Eric Auger wrote: > We introduce a new helper that creates and inserts a new redistributor > region into the rdist region list. This helper both handles the case > where the redistributor region size is known at registration time > and the legacy case

Re: [PATCH] KVM: arm/arm64: VGIC: Kick new VCPU on interrupt migration

the new IRQ to the list, but only > after dropping the locks. > > Reported-by: Stefano Stabellini <sstabell...@kernel.org> > Signed-off-by: Andre Przywara <andre.przyw...@arm.com> Reviewed-by: Christoffer Dall <christoffer.d...@arm.com> > --- > virt/kvm/a

Re: [PATCH] arm64: KVM: Demote SVE and LORegion warnings to debug only

the feature. > > Let's turn these message into kvm_debug so that they can only > be seen if CONFIG_DYNAMIC_DEBUG, and kept quiet otherwise. > > Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> Acked-by: Christoffer Dall <christoffer.d...@arm.com> > --- > a

[PATCH] MAINTAINERS: Update e-mail address for Christoffer Dall

Update my e-mail address to a working address. Signed-off-by: Christoffer Dall <christoffer.d...@arm.com> --- MAINTAINERS | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 0a1410d5a621..3e9c99d2620b 100644 --- a/MAINTAINERS +++ b/MAINT

Re: [PATCH] KVM: arm/arm64: Close VMID generation race

On Tue, Apr 10, 2018 at 04:37:12PM +0100, Marc Zyngier wrote: > On 10/04/18 16:24, Mark Rutland wrote: > > On Tue, Apr 10, 2018 at 05:05:40PM +0200, Christoffer Dall wrote: > >> On Tue, Apr 10, 2018 at 11:51:19AM +0100, Mark Rutland wrote: > >>> I think we also

Re: [PATCH] KVM: arm/arm64: Close VMID generation race

On Tue, Apr 10, 2018 at 04:24:20PM +0100, Mark Rutland wrote: > On Tue, Apr 10, 2018 at 05:05:40PM +0200, Christoffer Dall wrote: > > On Tue, Apr 10, 2018 at 11:51:19AM +0100, Mark Rutland wrote: > > > I think we also need to update kvm->arch.vttbr before updating >

Re: [RFC PATCH v3 4/4] KVM: arm64: Optimise FPSIMD handling to reduce guest/host thrashing

On Tue, Apr 10, 2018 at 11:32:50AM +0100, Dave Martin wrote: > On Mon, Apr 09, 2018 at 11:22:43PM +0200, Christoffer Dall wrote: > > Hi Dave, > > > > On Mon, Apr 09, 2018 at 11:53:02AM +0100, Dave Martin wrote: > > > This patch refactors KVM to align the host and g

Re: [PATCH] KVM: arm/arm64: Close VMID generation race

On Tue, Apr 10, 2018 at 11:51:19AM +0100, Mark Rutland wrote: > On Mon, Apr 09, 2018 at 10:51:39PM +0200, Christoffer Dall wrote: > > On Mon, Apr 09, 2018 at 06:07:06PM +0100, Marc Zyngier wrote: > > > Before entering the guest, we check whether our VMID is still > &g

Re: [RFC v2 02/12] KVM: arm/arm64: Document KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION

Hi Eric, On Tue, Mar 27, 2018 at 04:04:06PM +0200, Eric Auger wrote: > We introduce a new KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION attribute in > KVM_DEV_ARM_VGIC_GRP_ADDR group. It allows userspace to provide the > base address and size of a redistributor region > > Compared to

Re: [RFC PATCH v3 4/4] KVM: arm64: Optimise FPSIMD handling to reduce guest/host thrashing

Hi Dave, On Mon, Apr 09, 2018 at 11:53:02AM +0100, Dave Martin wrote: > This patch refactors KVM to align the host and guest FPSIMD > save/restore logic with each other for arm64. This reduces the > number of redundant save/restore operations that must occur, and > reduces the common-case IRQ

Re: [PATCH] KVM: arm/arm64: Close VMID generation race

On Mon, Apr 09, 2018 at 06:07:06PM +0100, Marc Zyngier wrote: > Before entering the guest, we check whether our VMID is still > part of the current generation. In order to avoid taking a lock, > we start with checking that the generation is still current, and > only if not current do we take the

Re: [PATCHv2 09/12] arm64/kvm: preserve host HCR_EL2 value

On Mon, Apr 09, 2018 at 03:57:09PM +0100, Mark Rutland wrote: > On Tue, Feb 06, 2018 at 01:39:15PM +0100, Christoffer Dall wrote: > > On Mon, Nov 27, 2017 at 04:38:03PM +, Mark Rutland wrote: > > > diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c > &

Re: [REPOST PATCH] arm/arm64: KVM: Add PSCI version selection API

On Mon, Apr 09, 2018 at 01:47:50PM +0100, Marc Zyngier wrote: > +Drew, who's look at the whole save/restore thing extensively > > On 09/04/18 13:30, Christoffer Dall wrote: > > On Thu, Mar 15, 2018 at 07:26:48PM +, Marc Zyngier wrote: > >> On 15/03/18 19:13, Peter Ma

Re: [PATCHv2 10/12] arm64/kvm: context-switch ptrauth registers

Hi Mark, [Sorry for late reply] On Fri, Mar 09, 2018 at 02:28:38PM +, Mark Rutland wrote: > On Tue, Feb 06, 2018 at 01:38:47PM +0100, Christoffer Dall wrote: > > On Mon, Nov 27, 2017 at 04:38:04PM +, Mark Rutland wrote: > > > When pointer authentication is supported

Re: [RFC PATCH v2 2/3] KVM: arm64: Convert lazy FPSIMD context switch trap to C

On Mon, Apr 09, 2018 at 11:00:40AM +0100, Marc Zyngier wrote: > On 09/04/18 10:44, Christoffer Dall wrote: > > On Fri, Apr 06, 2018 at 04:51:53PM +0100, Dave Martin wrote: > >> On Fri, Apr 06, 2018 at 04:25:57PM +0100, Marc Zyngier wrote: > >>> Hi Dave, > >>

Re: [RFC PATCH v2 3/3] KVM: arm64: Optimise FPSIMD handling to reduce guest/host thrashing

On Fri, Apr 06, 2018 at 04:01:04PM +0100, Dave Martin wrote: > This patch refactors KVM to align the host and guest FPSIMD > save/restore logic with each other for arm64. This reduces the > number of redundant save/restore operations that must occur, and > reduces the common-case IRQ blackout

Re: [RFC PATCH v2 2/3] KVM: arm64: Convert lazy FPSIMD context switch trap to C

On Fri, Apr 06, 2018 at 04:51:53PM +0100, Dave Martin wrote: > On Fri, Apr 06, 2018 at 04:25:57PM +0100, Marc Zyngier wrote: > > Hi Dave, > > > > On 06/04/18 16:01, Dave Martin wrote: > > > To make the lazy FPSIMD context switch trap code easier to hack on, > > > this patch converts it to C. > >

Re: [PATCH] KVM: arm/arm64: VGIC MMIO: add missing irq_lock

On Tue, Mar 06, 2018 at 09:21:06AM +, Andre Przywara wrote: > Our irq_is_pending() helper function accesses multiple members of the > vgic_irq struct, so we need to hold the lock when calling it. For the record I don't think this is necessarily a completely valid conclusion. The fact that

Re: [PATCH v2 2/2] kvm: arm/arm64: vgic-v3: Tighten synchronization for guests using v2 on v3

yw...@arm.com> > Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> Acked-by: Christoffer Dall <cd...@kernel.org> > --- > virt/kvm/arm/hyp/vgic-v3-sr.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/virt/kvm/arm/hyp/vgic-v3-sr.c b/virt/kvm/a

Re: [PATCH v2 1/2] KVM: arm/arm64: vgic: Don't populate multiple LRs with the same vintid

; Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> The fact that we have to do this is really annoying, but I see not other way around it. It will get slightly better if we move to insertion sort based on priorities when injecting interrupts as discussed with Andre, though. Acked-by: Christoffer Dal

Re: [RFC PATCH] KVM: arm/arm64: vgic: change condition for level interrupt resampling

On Sat, Mar 10, 2018 at 12:20 PM, Marc Zyngier <marc.zyng...@arm.com> wrote: > On Fri, 09 Mar 2018 21:36:12 +, > Christoffer Dall wrote: >> >> On Thu, Mar 08, 2018 at 05:28:44PM +, Marc Zyngier wrote: >> > I'd be more confident if we did forbid P+A fo

Re: [PATCH 1/2] KVM: arm/arm64: vgic: Don't populate multiple LRs with the same vintid

On Sat, Mar 10, 2018 at 1:57 PM, Marc Zyngier <marc.zyng...@arm.com> wrote: > Hi Christoffer, > > On Fri, 09 Mar 2018 21:39:31 +, > Christoffer Dall wrote: >> >> On Thu, Mar 08, 2018 at 06:39:20PM +, Marc Zyngier wrote: >> > Thinking of it a bit

Re: [PATCH 1/2] KVM: arm/arm64: vgic: Don't populate multiple LRs with the same vintid

On Thu, Mar 08, 2018 at 06:39:20PM +, Marc Zyngier wrote: > On Thu, 08 Mar 2018 17:04:38 +, > Marc Zyngier wrote: > > > > On Thu, 08 Mar 2018 16:02:42 +0000, > > Christoffer Dall wrote: > > > > > > On Thu, Mar 08, 2018 at 10:19:49AM +, Mar

Re: [RFC PATCH] KVM: arm/arm64: vgic: change condition for level interrupt resampling

On Thu, Mar 08, 2018 at 05:28:44PM +, Marc Zyngier wrote: > On Thu, 08 Mar 2018 16:19:00 +, > Christoffer Dall wrote: > > > > On Thu, Mar 08, 2018 at 11:54:27AM +, Marc Zyngier wrote: > > > On 08/03/18 09:49, Marc Zyngier wrote: [...] > > > Th

Re: [RFC PATCH] KVM: arm/arm64: vgic: change condition for level interrupt resampling

On Thu, Mar 08, 2018 at 11:54:27AM +, Marc Zyngier wrote: > On 08/03/18 09:49, Marc Zyngier wrote: > > [updated Christoffer's email address] > > > > Hi Shunyong, > > > > On 08/03/18 07:01, Shunyong Yang wrote: > >> When resampling irqfds is enabled, level interrupt should be > >> de-asserted

Re: [RFC PATCH] KVM: arm/arm64: vgic: change condition for level interrupt resampling

On Thu, Mar 08, 2018 at 09:49:43AM +, Marc Zyngier wrote: > [updated Christoffer's email address] > > Hi Shunyong, > > On 08/03/18 07:01, Shunyong Yang wrote: > > When resampling irqfds is enabled, level interrupt should be > > de-asserted when resampling happens. On page 4-47 of GIC v3 > >

Re: [PATCH 1/2] KVM: arm/arm64: vgic: Don't populate multiple LRs with the same vintid

On Thu, Mar 08, 2018 at 10:19:49AM +, Marc Zyngier wrote: > On 07/03/18 23:34, Christoffer Dall wrote: > > On Wed, Mar 7, 2018 at 12:40 PM, Marc Zyngier <marc.zyng...@arm.com> wrote: > >> The vgic code is trying to be clever when injecting GICv2 SGIs, > >&

Re: [PATCH 1/2] KVM: arm/arm64: vgic: Don't populate multiple LRs with the same vintid

On Wed, Mar 7, 2018 at 12:40 PM, Marc Zyngier wrote: > The vgic code is trying to be clever when injecting GICv2 SGIs, > and will happily populate LRs with the same interrupt number if > they come from multiple vcpus (after all, they are distinct > interrupt sources). > >

[PATCH] KVM: arm/arm64: Reset mapped IRQs on VM reset

mapped interrupts, so we call this function from the timer reset logic. Signed-off-by: Christoffer Dall <cd...@kernel.org> --- This depends on "KVM: arm/arm64: Avoid vcpu_load for other vcpu ioctls than KVM_RUN" from the VHE optimization series so that the reset doesn't get cal

Re: VCPU hotplug on KVM/ARM

On Tue, Feb 27, 2018 at 05:34:28PM +0530, btha...@codeaurora.org wrote: > Hi Christoffer, > > Thanks for your reply. > > On 2018-02-27 16:17, Christoffer Dall wrote: > >Hi Bhupinder, > > > >On Tue, Feb 27, 2018 at 03:01:17PM +0530, btha...@codeaurora.org wrote:

[PATCH v5 40/40] KVM: arm/arm64: Avoid VGICv3 save/restore on VHE with no IRQs

From: Christoffer Dall <christoffer.d...@linaro.org> We can finally get completely rid of any calls to the VGICv3 save/restore functions when the AP lists are empty on VHE systems. This requires carefully factoring out trap configuration from saving and restoring state, and carefully ch

[PATCH v5 39/40] KVM: arm/arm64: Move VGIC APR save/restore to vgic put/load

From: Christoffer Dall <christoffer.d...@linaro.org> The APRs can only have bits set when the guest acknowledges an interrupt in the LR and can only have a bit cleared when the guest EOIs an interrupt in the LR. Therefore, if we have no LRs with any pending/active interrupts, the APR

[PATCH v5 36/40] KVM: arm/arm64: Handle VGICv2 save/restore from the main VGIC code

From: Christoffer Dall <christoffer.d...@linaro.org> We can program the GICv2 hypervisor control interface logic directly from the core vgic code and can instead do the save/restore directly from the flush/sync functions, which can lead to a number of future optimizations. Sign

[PATCH v5 37/40] KVM: arm/arm64: Move arm64-only vgic-v2-sr.c file to arm64

From: Christoffer Dall <christoffer.d...@linaro.org> The vgic-v2-sr.c file now only contains the logic to replay unaligned accesses to the virtual CPU interface on 16K and 64K page systems, which is only relevant on 64-bit platforms. Therefore move this file to the arm64 KVM tree,

[PATCH v5 38/40] KVM: arm/arm64: Handle VGICv3 save/restore from the main VGIC code on VHE

From: Christoffer Dall <christoffer.d...@linaro.org> Just like we can program the GICv2 hypervisor control interface directly from the core vgic code, we can do the same for the GICv3 hypervisor control interface on VHE systems. We do this by simply calling the save/restore functions w

[PATCH v5 33/40] KVM: arm64: Configure c15, PMU, and debug register traps on cpu load/put for VHE

From: Christoffer Dall <christoffer.d...@linaro.org> We do not have to change the c15 trap setting on each switch to/from the guest on VHE systems, because this setting only affects guest EL1/EL0 (and therefore not the VHE host). The PMU and debug trap configuration can also be done on vcp

[PATCH v5 35/40] KVM: arm/arm64: Get rid of vgic_elrsr

From: Christoffer Dall <christoffer.d...@linaro.org> There is really no need to store the vgic_elrsr on the VGIC data structures as the only need we have for the elrsr is to figure out if an LR is inactive when we save the VGIC state upon returning from the guest. We can might as well

[PATCH v5 34/40] KVM: arm64: Cleanup __activate_traps and __deactive_traps for VHE and non-VHE

From: Christoffer Dall <christoffer.d...@linaro.org> To make the code more readable and to avoid the overhead of a function call, let's get rid of a pair of the alternative function selectors and explicitly call the VHE and non-VHE functions using the has_vhe() static key based selector i

[PATCH v5 31/40] KVM: arm64: Move common VHE/non-VHE trap config in separate functions

From: Christoffer Dall <christoffer.d...@linaro.org> As we are about to be more lazy with some of the trap configuration register read/writes for VHE systems, move the logic that is currently shared between VHE and non-VHE into a separate function which can be called from either the world-

[PATCH v5 30/40] KVM: arm64: Defer saving/restoring 32-bit sysregs to vcpu load/put

From: Christoffer Dall <christoffer.d...@linaro.org> When running a 32-bit VM (EL1 in AArch32), the AArch32 system registers can be deferred to vcpu load/put on VHE systems because neither the host kernel nor host userspace uses these registers. Note that we can't save DBGVCR32_EL2 conditi

[PATCH v5 28/40] KVM: arm64: Defer saving/restoring 64-bit sysregs to vcpu load/put on VHE

From: Christoffer Dall <christoffer.d...@linaro.org> Some system registers do not affect the host kernel's execution and can therefore be loaded when we are about to run a VCPU and we don't have to restore the host state to the hardware before the time when we are actually about to

[PATCH v5 29/40] KVM: arm64: Prepare to handle deferred save/restore of 32-bit registers

From: Christoffer Dall <christoffer.d...@linaro.org> 32-bit registers are not used by a 64-bit host kernel and can be deferred, but we need to rework the accesses to these register to access the latest values depending on whether or not guest system registers are loaded on the CPU or only

[PATCH v5 24/40] KVM: arm64: Rewrite system register accessors to read/write functions

From: Christoffer Dall <cd...@cs.columbia.edu> Currently we access the system registers array via the vcpu_sys_reg() macro. However, we are about to change the behavior to some times modify the register file directly, so let's change this to two primitives: * Accessor macros vcpu_write_s

[PATCH v5 26/40] KVM: arm/arm64: Prepare to handle deferred save/restore of SPSR_EL1

From: Christoffer Dall <christoffer.d...@linaro.org> SPSR_EL1 is not used by a VHE host kernel and can be deferred, but we need to rework the accesses to this register to access the latest value depending on whether or not guest system registers are loaded on the CPU or only reside in

[PATCH v5 27/40] KVM: arm64: Prepare to handle deferred save/restore of ELR_EL1

From: Christoffer Dall <christoffer.d...@linaro.org> ELR_EL1 is not used by a VHE host kernel and can be deferred, but we need to rework the accesses to this register to access the latest value depending on whether or not guest system registers are loaded on the CPU or only reside in

[PATCH v5 25/40] KVM: arm64: Introduce framework for accessing deferred sysregs

From: Christoffer Dall <christoffer.d...@linaro.org> We are about to defer saving and restoring some groups of system registers to vcpu_put and vcpu_load on supported systems. This means that we need some infrastructure to access system registes which supports either accessing the memory b

[PATCH v5 23/40] KVM: arm64: Change 32-bit handling of VM system registers

From: Christoffer Dall <christoffer.d...@linaro.org> We currently handle 32-bit accesses to trapped VM system registers using the 32-bit index into the coproc array on the vcpu structure, which is a union of the coproc array and the sysreg array. Since all the 32-bit coproc indices are c

[PATCH v5 21/40] KVM: arm64: Unify non-VHE host/guest sysreg save and restore functions

From: Christoffer Dall <christoffer.d...@linaro.org> There is no need to have multiple identical functions with different names for saving host and guest state. When saving and restoring state for the host and guest, the state is the same for both contexts, and that's why w

[PATCH v5 20/40] KVM: arm/arm64: Remove leftover comment from kvm_vcpu_run_vhe

From: Christoffer Dall <christoffer.d...@linaro.org> The comment only applied to SPE on non-VHE systems, so we simply remove it. Suggested-by: Andrew Jones <drjo...@redhat.com> Acked-by: Marc Zyngier <marc.zyng...@arm.com> Reviewed-by: Andrew Jones <drjo...@redhat.com> Si

[PATCH v5 19/40] KVM: arm64: Introduce separate VHE/non-VHE sysreg save/restore functions

From: Christoffer Dall <christoffer.d...@linaro.org> As we are about to handle system registers quite differently between VHE and non-VHE systems. In preparation for that, we need to split some of the handling functions between VHE and non-VHE functionality. For now, we simply copy the n

[PATCH v5 18/40] KVM: arm64: Rewrite sysreg alternatives to static keys

From: Christoffer Dall <christoffer.d...@linaro.org> As we are about to move calls around in the sysreg save/restore logic, let's first rewrite the alternative function callers, because it is going to make the next patches much easier to read. Acked-by: Marc Zyngier <marc.zyng..

[PATCH v5 17/40] KVM: arm64: Move userspace system registers into separate function

From: Christoffer Dall <christoffer.d...@linaro.org> There's a semantic difference between the EL1 registers that control operation of a kernel running in EL1 and EL1 registers that only control userspace execution in EL0. Since we can defer saving/restoring the latter, move them into the

[PATCH v5 15/40] KVM: arm64: Don't deactivate VM on VHE systems

From: Christoffer Dall <christoffer.d...@linaro.org> There is no need to reset the VTTBR to zero when exiting the guest on VHE systems. VHE systems don't use stage 2 translations for the EL2&0 translation regime used by the host. Reviewed-by: Andrew Jones <drjo...@redhat.com>

[PATCH v5 16/40] KVM: arm64: Remove noop calls to timer save/restore from VHE switch

From: Christoffer Dall <christoffer.d...@linaro.org> The VHE switch function calls __timer_enable_traps and __timer_disable_traps which don't do anything on VHE systems. Therefore, simply remove these calls from the VHE switch function and make the functions non-conditional as they are no

[PATCH v5 13/40] KVM: arm64: Introduce VHE-specific kvm_vcpu_run

From: Christoffer Dall <christoffer.d...@linaro.org> So far this is mostly (see below) a copy of the legacy non-VHE switch function, but we will start reworking these functions in separate directions to work on VHE and non-VHE in the most optimal way in later patches. The only difference

[PATCH v5 14/40] KVM: arm64: Remove kern_hyp_va() use in VHE switch function

From: Christoffer Dall <christoffer.d...@linaro.org> VHE kernels run completely in EL2 and therefore don't have a notion of kernel and hyp addresses, they are all just kernel addresses. Therefore don't call kern_hyp_va() in the VHE switch function. Reviewed-by: Andrew Jones <drjo...@r

[PATCH v5 11/40] KVM: arm64: Improve debug register save/restore flow

From: Christoffer Dall <christoffer.d...@linaro.org> Instead of having multiple calls from the world switch path to the debug logic, each figuring out if the dirty bit is set and if we should save/restore the debug registers, let's just provide two hooks to the debug save/restore functio

[PATCH v5 12/40] KVM: arm64: Factor out fault info population and gic workarounds

From: Christoffer Dall <christoffer.d...@linaro.org> The current world-switch function has functionality to detect a number of cases where we need to fixup some part of the exit condition and possibly run the guest again, before having restored the host state. This includes populating m

[PATCH v5 10/40] KVM: arm64: Slightly improve debug save/restore functions

From: Christoffer Dall <christoffer.d...@linaro.org> The debug save/restore functions can be improved by using the has_vhe() static key instead of the instruction alternative. Using the static key uses the same paradigm as we're going to use elsewhere, it makes the code more re

[PATCH v5 09/40] KVM: arm64: Move debug dirty flag calculation out of world switch

From: Christoffer Dall <christoffer.d...@linaro.org> There is no need to figure out inside the world-switch if we should save/restore the debug registers or not, we might as well do that in the higher level debug setup code, making it easier to optimize down the line. Reviewed-by: Julien T

[PATCH v5 05/40] KVM: arm64: Move HCR_INT_OVERRIDE to default HCR_EL2 guest flag

reset the HCR_EL2 to only have the HCR_RW bit set when returning to EL1 on non-VHE systems. Reviewed-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Shih-Wei Li <shih...@cs.columbia.edu> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- Notes: Changes s

[PATCH v5 06/40] KVM: arm/arm64: Get rid of vcpu->arch.irq_lines

From: Christoffer Dall <christoffer.d...@linaro.org> We currently have a separate read-modify-write of the HCR_EL2 on entry to the guest for the sole purpose of setting the VF and VI bits, if set. Since this is most rarely the case (only when using userspace IRQ chip and interrupts are in

[PATCH v5 07/40] KVM: arm/arm64: Add kvm_vcpu_load_sysregs and kvm_vcpu_put_sysregs

From: Christoffer Dall <christoffer.d...@linaro.org> As we are about to move a bunch of save/restore logic for VHE kernels to the load and put functions, we need some infrastructure to do this. Reviewed-by: Andrew Jones <drjo...@redhat.com> Acked-by: Marc Zyngier <marc.zyng...@

[PATCH v5 04/40] KVM: arm64: Rework hyp_panic for VHE and non-VHE

From: Christoffer Dall <christoffer.d...@linaro.org> VHE actually doesn't rely on clearing the VTTBR when returning to the host kernel, and that is the current key mechanism of hyp_panic to figure out how to attempt to return to a state good enough to print a panic statement. Therefore, we

[PATCH v5 02/40] KVM: arm/arm64: Move vcpu_load call after kvm_vcpu_first_run_init

From: Christoffer Dall <christoffer.d...@linaro.org> Moving the call to vcpu_load() in kvm_arch_vcpu_ioctl_run() to after we've called kvm_vcpu_first_run_init() simplifies some of the vgic and there is also no need to do vcpu_load() for things such as handling the immediate_exit flag. Re

[PATCH v5 03/40] KVM: arm64: Avoid storing the vcpu pointer on the stack

From: Christoffer Dall <christoffer.d...@linaro.org> We already have the percpu area for the host cpu state, which points to the VCPU, so there's no need to store the VCPU pointer on the stack on every context switch. We can be a little more clever and just use tpidr_el2 for the percpu

[PATCH v5 01/40] KVM: arm/arm64: Avoid vcpu_load for other vcpu ioctls than KVM_RUN

From: Christoffer Dall <christoffer.d...@linaro.org> Calling vcpu_load() registers preempt notifiers for this vcpu and calls kvm_arch_vcpu_load(). The latter will soon be doing a lot of heavy lifting on arm/arm64 and will try to do things such as enabling the virtual timer and setting

[PATCH v5 00/40] Optimize KVM/ARM for VHE systems

v2 (detailed changelogs are in the individual patches). Thanks, -Christoffer Christoffer Dall (39): KVM: arm/arm64: Avoid vcpu_load for other vcpu ioctls than KVM_RUN KVM: arm/arm64: Move vcpu_load call after kvm_vcpu_first_run_init KVM: arm64: Avoid storing the vcpu pointer on the stack

Re: VCPU hotplug on KVM/ARM

Hi Bhupinder, On Tue, Feb 27, 2018 at 03:01:17PM +0530, btha...@codeaurora.org wrote: > I hope it is the right forum to post my query. > > > > I am currently looking at the possibility of adding a new VCPU to a running > guest VM in KVM/ARM. I see that currently, it is not allowed to add a

Re: [PATCH v4 31/40] KVM: arm64: Move common VHE/non-VHE trap config in separate functions

On Fri, Feb 23, 2018 at 02:30:54PM +, Julien Grall wrote: > Hi Christoffer, > > On 15/02/18 21:03, Christoffer Dall wrote: > >@@ -85,37 +123,14 @@ static void __hyp_text __activate_traps(struct kvm_vcpu > >*vcpu) > > { > > u64 hcr = vcpu->arch.hcr_el2

Re: [PATCH v4 31/40] KVM: arm64: Move common VHE/non-VHE trap config in separate functions

On Wed, Feb 21, 2018 at 05:59:37PM +, Marc Zyngier wrote: > On Thu, 15 Feb 2018 21:03:23 +, > Christoffer Dall wrote: > > > > As we are about to be more lazy with some of the trap configuration > > register read/writes for VHE systems, move the logic that is curr

Re: [PATCH v4 10/40] KVM: arm64: Slightly improve debug save/restore functions

On Wed, Feb 21, 2018 at 05:52:41PM +, Marc Zyngier wrote: > On 21/02/18 17:39, Andrew Jones wrote: > > On Thu, Feb 15, 2018 at 10:03:02PM +0100, Christoffer Dall wrote: > >> The debug save/restore functions can be improved by using the has_vhe() > >> static key

[PULL 2/2] ARM: kvm: fix building with gcc-8

;ARM: KVM: Add banked registers save/restore") Cc: sta...@vger.kernel.org Signed-off-by: Arnd Bergmann <a...@arndb.de> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm/kvm/hyp/Makefile| 5 + arch/arm/kvm/hyp/banked-sr.c | 4 2 files changed, 9 in

[PULL 1/2] KVM: arm/arm64: Fix arch timers with userspace irqchips

;ag...@suse.de> Reviewed-by: Marc Zyngier <marc.zyng...@arm.com> Cc: <sta...@vger.kernel.org> # v4.12+ Fixes: d9e139778376 ("KVM: arm/arm64: Support arch timers with a userspace gic") Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --

[PULL 0/2] KVM/ARM Fixes for v4.16

(2018-02-15 20:58:36 +0100) Thanks, -Christoffer Arnd Bergmann (1): ARM: kvm: fix building with gcc-8 Christoffer Dall (1): KVM: arm/arm64: Fix arch timers with userspace irqchips arch/arm/kvm/hyp/Makefile| 5 ++ arch/arm/kvm/hyp/banked-sr.c | 4 ++ virt/kvm/arm/arch_timer.c| 116

Re: [PATCH v4 35/40] KVM: arm/arm64: Get rid of vgic_elrsr

On Fri, Feb 23, 2018 at 02:44:30PM +, Julien Grall wrote: > Hi Christoffer, > > On 15/02/18 21:03, Christoffer Dall wrote: > >There is really no need to store the vgic_elrsr on the VGIC data > >structures as the only need we have for the elrsr is to figure out if an >

Re: [RFC PATCH 2/2] KVM: arm64: Eliminate most redundant FPSIMD saves and restores

.fpsimd_state); > + > + /* > + * Protect ourselves against a softirq splatting the > + * FPSIMD state once irqs are enabled: > + */ > + fpsimd_save_state(guest_fpsimd); >

Re: [RFC PATCH 0.9/2] arm64: fpsimd: Expose CPU / FPSIMD state association helpers

On Fri, Feb 16, 2018 at 06:39:30PM +, Dave Martin wrote: > Oops, forgot to post this patch that goes before patch 1 in the series. > > --8<-- > > Expose an interface for associating an FPSIMD context with a CPU and > checking the association, for use by KVM. > > Signed-off-by: Dave Martin

Re: [PATCH v4 28/40] KVM: arm64: Defer saving/restoring 64-bit sysregs to vcpu load/put on VHE

On Thu, Feb 22, 2018 at 06:30:11PM +, Julien Grall wrote: > Hi Christoffer, > > On 15/02/18 21:03, Christoffer Dall wrote: > >Some system registers do not affect the host kernel's execution and can > >therefore be loaded when we are about to run a VCPU and we don't have t

Re: [PATCH v4 33/40] KVM: arm64: Configure c15, PMU, and debug register traps on cpu load/put for VHE

On Wed, Feb 21, 2018 at 06:20:54PM +, Marc Zyngier wrote: > On Thu, 15 Feb 2018 21:03:25 +, > Christoffer Dall wrote: > > > > We do not have to change the c15 trap setting on each switch to/from the > > guest on VHE systems, because this setting only affects EL

Re: [PATCH v4 31/40] KVM: arm64: Move common VHE/non-VHE trap config in separate functions

On Wed, Feb 21, 2018 at 05:59:37PM +, Marc Zyngier wrote: > On Thu, 15 Feb 2018 21:03:23 +, > Christoffer Dall wrote: > > > > As we are about to be more lazy with some of the trap configuration > > register read/writes for VHE systems, move the logic that is curr

Re: [PATCH v4 30/40] KVM: arm64: Defer saving/restoring 32-bit sysregs to vcpu load/put

On Wed, Feb 21, 2018 at 04:27:25PM +, Marc Zyngier wrote: > On Thu, 15 Feb 2018 21:03:22 +, > Christoffer Dall wrote: > > > > When running a 32-bit VM (EL1 in AArch32), the AArch32 system registers > > can be deferred to vcpu load/put on VHE systems because neither

Re: [PATCH v4 38/40] KVM: arm/arm64: Handle VGICv3 save/restore from the main VGIC code on VHE

On Thu, Feb 22, 2018 at 03:01:17PM +, Marc Zyngier wrote: > On Thu, 22 Feb 2018 14:42:27 +, > Christoffer Dall wrote: > > > > On Thu, Feb 22, 2018 at 12:32:11PM +, Marc Zyngier wrote: > > > On 15/02/18 21:03, Christoffer Dall wrote: > > >

Re: [PATCH v4 24/40] KVM: arm64: Rewrite system register accessors to read/write functions

On Thu, Feb 22, 2018 at 04:11:38PM +0100, Andrew Jones wrote: > > Hi Christoffer, > > I'm just pointing out some broken lines that we could maybe cheat the > 80-char limit on. Naturally feel free to ignore. Thanks. I'll go over them as I respin. -Christoffer

Re: [PATCH v4 30/40] KVM: arm64: Defer saving/restoring 32-bit sysregs to vcpu load/put

On Thu, Feb 22, 2018 at 03:35:06PM +0100, Andrew Jones wrote: > On Thu, Feb 15, 2018 at 10:03:22PM +0100, Christoffer Dall wrote: > > When running a 32-bit VM (EL1 in AArch32), the AArch32 system registers > > can be deferred to vcpu load/put on VHE systems because neither > >

Re: [PATCH v4 25/40] KVM: arm64: Introduce framework for accessing deferred sysregs

On Thu, Feb 22, 2018 at 02:40:52PM +0100, Andrew Jones wrote: > On Thu, Feb 15, 2018 at 10:03:17PM +0100, Christoffer Dall wrote: > > We are about to defer saving and restoring some groups of system > > registers to vcpu_put and vcpu_load on supported systems. This means > &

Re: [PATCH v4 39/40] KVM: arm/arm64: Move VGIC APR save/restore to vgic put/load

On Thu, Feb 22, 2018 at 01:11:55PM +, Marc Zyngier wrote: > On 15/02/18 21:03, Christoffer Dall wrote: > > The APRs can only have bits set when the guest acknowledges an interrupt > > in the LR and can only have a bit cleared when the guest EOIs an > > interrupt in the

Re: [PATCH v4 38/40] KVM: arm/arm64: Handle VGICv3 save/restore from the main VGIC code on VHE

On Thu, Feb 22, 2018 at 12:32:11PM +, Marc Zyngier wrote: > On 15/02/18 21:03, Christoffer Dall wrote: > > Just like we can program the GICv2 hypervisor control interface directly > > from the core vgic code, we can do the same for the GICv3 hypervisor > > control int

Re: [PATCH v4 37/40] KVM: arm/arm64: Move arm64-only vgic-v2-sr.c file to arm64

On Thu, Feb 22, 2018 at 12:33:20PM +, Marc Zyngier wrote: > On 15/02/18 21:03, Christoffer Dall wrote: > > The vgic-v2-sr.c file now only contains the logic to replay unaligned > > accesses to the virtual CPU interface on 16K and 64K page systems, which > > is only relevan

Re: [PATCH v4 24/40] KVM: arm64: Rewrite system register accessors to read/write functions

On Thu, Feb 22, 2018 at 02:34:21PM +0100, Andrew Jones wrote: > On Thu, Feb 15, 2018 at 10:03:16PM +0100, Christoffer Dall wrote: > > From: Christoffer Dall <cd...@cs.columbia.edu> > > > > Currently we access the system registers array via the vcpu_sys_reg() > &

Re: [PATCH v4 24/40] KVM: arm64: Rewrite system register accessors to read/write functions

On Thu, Feb 22, 2018 at 10:48:10AM +, Marc Zyngier wrote: > On Thu, 22 Feb 2018 09:22:37 +, > Christoffer Dall wrote: > > > > On Wed, Feb 21, 2018 at 01:32:45PM +, Marc Zyngier wrote: > > > On Thu, 15 Feb 2018 21:03:16 +0000, > > > Christoff

Re: [PATCH v4 03/40] KVM: arm64: Avoid storing the vcpu pointer on the stack

On Thu, Feb 22, 2018 at 10:56:41AM +0100, Andrew Jones wrote: > On Thu, Feb 22, 2018 at 10:10:34AM +0100, Christoffer Dall wrote: > > On Wed, Feb 21, 2018 at 06:32:00PM +0100, Andrew Jones wrote: > > > > > > Besides my confusion on motivation, it looks good to me &

Re: [PATCH v4 26/40] KVM: arm/arm64: Prepare to handle deferred save/restore of SPSR_EL1

On Wed, Feb 21, 2018 at 02:47:44PM +, Marc Zyngier wrote: > On Thu, 15 Feb 2018 21:03:18 +, > Christoffer Dall wrote: > > > > SPSR_EL1 is not used by a VHE host kernel and can be deferred, but we > > need to rework the accesses to this register to access the la

Re: [PATCH v4 24/40] KVM: arm64: Rewrite system register accessors to read/write functions

On Mon, Feb 19, 2018 at 06:12:29PM +, Julien Grall wrote: > Hi Christoffer, > > On 15/02/18 21:03, Christoffer Dall wrote: > >From: Christoffer Dall <cd...@cs.columbia.edu> > > > >Currently we access the system registers array via the vcpu_sys_reg() > >

Re: [PATCH v4 17/40] KVM: arm64: Move userspace system registers into separate function

On Mon, Feb 19, 2018 at 05:21:17PM +, Julien Grall wrote: > Hi Christoffer, > > On 15/02/18 21:03, Christoffer Dall wrote: > >There's a semantic difference between the EL1 registers that control > >operation of a kernel running in EL1 and EL1 registers that only control &

Re: [PATCH v4 24/40] KVM: arm64: Rewrite system register accessors to read/write functions

On Wed, Feb 21, 2018 at 01:32:45PM +, Marc Zyngier wrote: > On Thu, 15 Feb 2018 21:03:16 +, > Christoffer Dall wrote: > > > > From: Christoffer Dall <cd...@cs.columbia.edu> > > > > Currently we access the system registers array via the vcpu_sys_reg

Re: [PATCH v4 13/40] KVM: arm64: Introduce VHE-specific kvm_vcpu_run

On Wed, Feb 21, 2018 at 07:18:32PM +0100, Andrew Jones wrote: > On Wed, Feb 21, 2018 at 06:43:00PM +0100, Andrew Jones wrote: > > On Thu, Feb 15, 2018 at 10:03:05PM +0100, Christoffer Dall wrote: > > > So far this is mostly (see below) a copy of the legacy non-VHE switch >

<    1   2   3   4   5   6   7   8   9   10   >