On Fri, Mar 01, 2019 at 12:39:52PM +, Julien Thierry wrote:
>
>
> On 26/02/2019 12:06, Dave Martin wrote:
> > On Wed, Feb 20, 2019 at 11:12:49AM +, Julien Thierry wrote:
> >> Hi Dave,
> >>
> >> On 18/02/2019 19:52, Dave Martin wrote:
[...]
> >>> + /*
> >>> + * Mismatches above
On 26/02/2019 12:06, Dave Martin wrote:
> On Wed, Feb 20, 2019 at 11:12:49AM +, Julien Thierry wrote:
>> Hi Dave,
>>
>> On 18/02/2019 19:52, Dave Martin wrote:
>>> Due to the way the effective SVE vector length is controlled and
>>> trapped at different exception levels, certain mismatches
Hi Dave,
On 26/02/2019 12:06, Dave Martin wrote:
On Thu, Feb 21, 2019 at 01:36:26PM +, Julien Grall wrote:
Hi Dave,
On 18/02/2019 19:52, Dave Martin wrote:
+ /*
+* Mismatches above sve_max_virtualisable_vl are fine, since
+* no guest is allowed to configure
On Thu, Feb 21, 2019 at 01:36:26PM +, Julien Grall wrote:
> Hi Dave,
>
> On 18/02/2019 19:52, Dave Martin wrote:
> >+/*
> >+ * Mismatches above sve_max_virtualisable_vl are fine, since
> >+ * no guest is allowed to configure ZCR_EL2.LEN to exceed this:
> >+ */
> >+if
On Wed, Feb 20, 2019 at 11:12:49AM +, Julien Thierry wrote:
> Hi Dave,
>
> On 18/02/2019 19:52, Dave Martin wrote:
> > Due to the way the effective SVE vector length is controlled and
> > trapped at different exception levels, certain mismatches in the
> > sets of vector lengths supported by
Hi Dave,
On 18/02/2019 19:52, Dave Martin wrote:
+ /*
+* Mismatches above sve_max_virtualisable_vl are fine, since
+* no guest is allowed to configure ZCR_EL2.LEN to exceed this:
+*/
+ if (sve_vl_from_vq(bit_to_vq(b)) <= sve_max_virtualisable_vl) {
+
Hi Dave,
On 18/02/2019 19:52, Dave Martin wrote:
> Due to the way the effective SVE vector length is controlled and
> trapped at different exception levels, certain mismatches in the
> sets of vector lengths supported by different physical CPUs in the
> system may prevent straightforward
Due to the way the effective SVE vector length is controlled and
trapped at different exception levels, certain mismatches in the
sets of vector lengths supported by different physical CPUs in the
system may prevent straightforward virtualisation of SVE at parity
with the host.
This patch
