Re: [PATCH v4 10/40] KVM: arm64: Slightly improve debug save/restore functions

On Wed, Feb 21, 2018 at 05:52:41PM +, Marc Zyngier wrote: > On 21/02/18 17:39, Andrew Jones wrote: > > On Thu, Feb 15, 2018 at 10:03:02PM +0100, Christoffer Dall wrote: > >> The debug save/restore functions can be improved by using the has_vhe() > >> static key instead of the instruction

Re: [PATCH v4 03/40] KVM: arm64: Avoid storing the vcpu pointer on the stack

On Mon, Feb 19, 2018 at 03:50:20PM +, Julien Grall wrote: > Hi Christoffer, > > On 15/02/18 21:02, Christoffer Dall wrote: > >We already have the percpu area for the host cpu state, which points to > >the VCPU, so there's no need to store the VCPU pointer on the stack on > >every context

Re: [PATCH v4 03/40] KVM: arm64: Avoid storing the vcpu pointer on the stack

On Wed, Feb 21, 2018 at 11:34:07AM +, Marc Zyngier wrote: > On Thu, 15 Feb 2018 21:02:55 +, > Christoffer Dall wrote: > > > > We already have the percpu area for the host cpu state, which points to > > the VCPU, so there's no need to store the VCPU pointer on the stack on > > every

Re: [PATCH v4 08/40] KVM: arm/arm64: Introduce vcpu_el1_is_32bit

On Wed, Feb 21, 2018 at 12:05:27PM +, Marc Zyngier wrote: > On Thu, 15 Feb 2018 21:03:00 +, > Christoffer Dall wrote: > > > > We have numerous checks around that checks if the HCR_EL2 has the RW bit > > set to figure out if we're running an AArch64 or AArch32 VM. In some > > cases,

Re: [PATCH v4 03/40] KVM: arm64: Avoid storing the vcpu pointer on the stack

On Wed, Feb 21, 2018 at 06:32:00PM +0100, Andrew Jones wrote: > On Thu, Feb 15, 2018 at 10:02:55PM +0100, Christoffer Dall wrote: > > We already have the percpu area for the host cpu state, which points to > > the VCPU, so there's no need to store the VCPU pointer on the stack on > > every context

Re: [PATCH] KVM: arm/arm64: No need to zero CNTVOFF in kvm_timer_vcpu_put() for VHE

Hi Shanker, On Mon, Feb 19, 2018 at 09:38:07AM -0600, Shanker Donthineni wrote: > In AArch64/AArch32, the virtual counter uses a fixed virtual offset > of zero in the following situations as per ARMv8 specifications: > > 1) HCR_EL2.E2H is 1, and CNTVCT_EL0/CNTVCT are read from EL2. > 2)

Re: [PATCH] KVM: arm/arm64: No need to zero CNTVOFF in kvm_timer_vcpu_put() for VHE

On Thu, 22 Feb 2018 08:42:31 +, Christoffer Dall wrote: > > Hi Shanker, > > On Mon, Feb 19, 2018 at 09:38:07AM -0600, Shanker Donthineni wrote: > > In AArch64/AArch32, the virtual counter uses a fixed virtual offset > > of zero in the following situations as per ARMv8 specifications: > > >

Re: [PATCH v4 26/40] KVM: arm/arm64: Prepare to handle deferred save/restore of SPSR_EL1

On Wed, Feb 21, 2018 at 02:47:44PM +, Marc Zyngier wrote: > On Thu, 15 Feb 2018 21:03:18 +, > Christoffer Dall wrote: > > > > SPSR_EL1 is not used by a VHE host kernel and can be deferred, but we > > need to rework the accesses to this register to access the latest value > > depending on

Re: [PATCH v4 03/40] KVM: arm64: Avoid storing the vcpu pointer on the stack

On Thu, 22 Feb 2018 09:02:48 +, Christoffer Dall wrote: > > On Wed, Feb 21, 2018 at 11:34:07AM +, Marc Zyngier wrote: > > On Thu, 15 Feb 2018 21:02:55 +, > > Christoffer Dall wrote: > > > > > > We already have the percpu area for the host cpu state, which points to > > > the VCPU, so

Re: [PATCH v4 35/40] KVM: arm/arm64: Get rid of vgic_elrsr

On Thu, 15 Feb 2018 21:03:27 +, Christoffer Dall wrote: > > There is really no need to store the vgic_elrsr on the VGIC data > structures as the only need we have for the elrsr is to figure out if an > LR is inactive when we save the VGIC state upon returning from the > guest. We can might

Re: [PATCH v4 03/40] KVM: arm64: Avoid storing the vcpu pointer on the stack

On Thu, Feb 22, 2018 at 10:56:41AM +0100, Andrew Jones wrote: > On Thu, Feb 22, 2018 at 10:10:34AM +0100, Christoffer Dall wrote: > > On Wed, Feb 21, 2018 at 06:32:00PM +0100, Andrew Jones wrote: > > > > > > Besides my confusion on motivation, it looks good to me > > > > > > > In that case,

Re: [PATCH v4 24/40] KVM: arm64: Rewrite system register accessors to read/write functions

On Thu, 22 Feb 2018 09:22:37 +, Christoffer Dall wrote: > > On Wed, Feb 21, 2018 at 01:32:45PM +, Marc Zyngier wrote: > > On Thu, 15 Feb 2018 21:03:16 +, > > Christoffer Dall wrote: > > > > > > From: Christoffer Dall > > > > > > Currently we access the system

Re: [PATCH 1/4] iommu: Add virtio-iommu driver

On 21/02/18 20:12, kbuild test robot wrote: [...] > config: arm64-allmodconfig (attached as .config) [...] >aarch64-linux-gnu-ld: arch/arm64/kernel/head.o: relocation R_AARCH64_ABS32 > against `_kernel_offset_le_lo32' can not be used when making a shared object >arch/arm64/kernel/head.o:

Re: [PATCH v4 03/40] KVM: arm64: Avoid storing the vcpu pointer on the stack

On Thu, Feb 22, 2018 at 10:10:34AM +0100, Christoffer Dall wrote: > On Wed, Feb 21, 2018 at 06:32:00PM +0100, Andrew Jones wrote: > > > > Besides my confusion on motivation, it looks good to me > > > > In that case, unless there's an argument that the code has become too > hard to understand,

Re: [PATCH v4 24/40] KVM: arm64: Rewrite system register accessors to read/write functions

On Thu, Feb 22, 2018 at 10:48:10AM +, Marc Zyngier wrote: > On Thu, 22 Feb 2018 09:22:37 +, > Christoffer Dall wrote: > > > > On Wed, Feb 21, 2018 at 01:32:45PM +, Marc Zyngier wrote: > > > On Thu, 15 Feb 2018 21:03:16 +, > > > Christoffer Dall wrote: > > > > > > > > From:

Re: [PATCH v4 13/40] KVM: arm64: Introduce VHE-specific kvm_vcpu_run

On Wed, Feb 21, 2018 at 07:18:32PM +0100, Andrew Jones wrote: > On Wed, Feb 21, 2018 at 06:43:00PM +0100, Andrew Jones wrote: > > On Thu, Feb 15, 2018 at 10:03:05PM +0100, Christoffer Dall wrote: > > > So far this is mostly (see below) a copy of the legacy non-VHE switch > > > function, but we

Re: [PATCH v4 17/40] KVM: arm64: Move userspace system registers into separate function

On Mon, Feb 19, 2018 at 05:21:17PM +, Julien Grall wrote: > Hi Christoffer, > > On 15/02/18 21:03, Christoffer Dall wrote: > >There's a semantic difference between the EL1 registers that control > >operation of a kernel running in EL1 and EL1 registers that only control > >userspace execution

Re: [PATCH v4 24/40] KVM: arm64: Rewrite system register accessors to read/write functions

On Mon, Feb 19, 2018 at 06:12:29PM +, Julien Grall wrote: > Hi Christoffer, > > On 15/02/18 21:03, Christoffer Dall wrote: > >From: Christoffer Dall > > > >Currently we access the system registers array via the vcpu_sys_reg() > >macro. However, we are about to change

Re: [PATCH v4 24/40] KVM: arm64: Rewrite system register accessors to read/write functions

On Wed, Feb 21, 2018 at 01:32:45PM +, Marc Zyngier wrote: > On Thu, 15 Feb 2018 21:03:16 +, > Christoffer Dall wrote: > > > > From: Christoffer Dall > > > > Currently we access the system registers array via the vcpu_sys_reg() > > macro. However, we are about to

Re: [PATCH v4 03/40] KVM: arm64: Avoid storing the vcpu pointer on the stack

On Thu, Feb 22, 2018 at 10:02:48AM +0100, Christoffer Dall wrote: > On Wed, Feb 21, 2018 at 11:34:07AM +, Marc Zyngier wrote: > > On Thu, 15 Feb 2018 21:02:55 +, > > Christoffer Dall wrote: > > > @@ -138,13 +138,15 @@ alternative_else_nop_endif > > > > > > el1_irq: > > > stp x0,

Re: [PATCH v4 39/40] KVM: arm/arm64: Move VGIC APR save/restore to vgic put/load

On 15/02/18 21:03, Christoffer Dall wrote: > The APRs can only have bits set when the guest acknowledges an interrupt > in the LR and can only have a bit cleared when the guest EOIs an > interrupt in the LR. Therefore, if we have no LRs with any > pending/active interrupts, the APR cannot change

Re: [PATCH v4 24/40] KVM: arm64: Rewrite system register accessors to read/write functions

On Thu, Feb 15, 2018 at 10:03:16PM +0100, Christoffer Dall wrote: > From: Christoffer Dall > > Currently we access the system registers array via the vcpu_sys_reg() > macro. However, we are about to change the behavior to some times > modify the register file directly, so

Re: [PATCH v4 25/40] KVM: arm64: Introduce framework for accessing deferred sysregs

On Thu, Feb 15, 2018 at 10:03:17PM +0100, Christoffer Dall wrote: > We are about to defer saving and restoring some groups of system > registers to vcpu_put and vcpu_load on supported systems. This means > that we need some infrastructure to access system registes which > supports either

Re: [PATCH v4 27/40] KVM: arm64: Prepare to handle deferred save/restore of ELR_EL1

On Thu, Feb 15, 2018 at 10:03:19PM +0100, Christoffer Dall wrote: > ELR_EL1 is not used by a VHE host kernel and can be deferred, but we > need to rework the accesses to this register to access the latest value > depending on whether or not guest system registers are loaded on the CPU > or only

Re: [PATCH v4 24/40] KVM: arm64: Rewrite system register accessors to read/write functions

On 22/02/18 11:10, Christoffer Dall wrote: > On Thu, Feb 22, 2018 at 10:48:10AM +, Marc Zyngier wrote: >> On Thu, 22 Feb 2018 09:22:37 +, >> Christoffer Dall wrote: >>> >>> On Wed, Feb 21, 2018 at 01:32:45PM +, Marc Zyngier wrote: On Thu, 15 Feb 2018 21:03:16 +,

Re: [PATCH v4 26/40] KVM: arm/arm64: Prepare to handle deferred save/restore of SPSR_EL1

On Thu, Feb 15, 2018 at 10:03:18PM +0100, Christoffer Dall wrote: > SPSR_EL1 is not used by a VHE host kernel and can be deferred, but we > need to rework the accesses to this register to access the latest value > depending on whether or not guest system registers are loaded on the CPU > or only

Re: [PATCH v4 37/40] KVM: arm/arm64: Move arm64-only vgic-v2-sr.c file to arm64

On 15/02/18 21:03, Christoffer Dall wrote: > The vgic-v2-sr.c file now only contains the logic to replay unaligned > accesses to the virtual CPU interface on 16K and 64K page systems, which > is only relevant on 64-bit platforms. Therefore move this file to the > arm64 KVM tree, remove the

Re: [PATCH v3] arm64: Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC

On Wed, Feb 21, 2018 at 04:51:40PM +, Robin Murphy wrote: > On 21/02/18 16:14, Shanker Donthineni wrote: > [...] > > > > @@ -1100,6 +1114,20 @@ static int cpu_copy_el2regs(void *__unused) > > > > .enable = cpu_clear_disr, > > > > }, > > > > #endif /*

Re: [PATCH v4 38/40] KVM: arm/arm64: Handle VGICv3 save/restore from the main VGIC code on VHE

On 15/02/18 21:03, Christoffer Dall wrote: > Just like we can program the GICv2 hypervisor control interface directly > from the core vgic code, we can do the same for the GICv3 hypervisor > control interface on VHE systems. > > We do this by simply calling the save/restore functions when we have

Re: [PATCH v4 38/40] KVM: arm/arm64: Handle VGICv3 save/restore from the main VGIC code on VHE

On 22/02/18 16:02, Christoffer Dall wrote: > On Thu, Feb 22, 2018 at 03:01:17PM +, Marc Zyngier wrote: >> On Thu, 22 Feb 2018 14:42:27 +, >> Christoffer Dall wrote: >>> >>> On Thu, Feb 22, 2018 at 12:32:11PM +, Marc Zyngier wrote: On 15/02/18 21:03, Christoffer Dall wrote: >

Re: [PATCH v4 24/40] KVM: arm64: Rewrite system register accessors to read/write functions

On Thu, Feb 22, 2018 at 04:11:38PM +0100, Andrew Jones wrote: > > Hi Christoffer, > > I'm just pointing out some broken lines that we could maybe cheat the > 80-char limit on. Naturally feel free to ignore. Thanks. I'll go over them as I respin. -Christoffer

Re: [PATCH v4 30/40] KVM: arm64: Defer saving/restoring 32-bit sysregs to vcpu load/put

On Wed, Feb 21, 2018 at 04:27:25PM +, Marc Zyngier wrote: > On Thu, 15 Feb 2018 21:03:22 +, > Christoffer Dall wrote: > > > > When running a 32-bit VM (EL1 in AArch32), the AArch32 system registers > > can be deferred to vcpu load/put on VHE systems because neither > > the host kernel nor

Re: [PATCH v4 31/40] KVM: arm64: Move common VHE/non-VHE trap config in separate functions

On Wed, Feb 21, 2018 at 05:59:37PM +, Marc Zyngier wrote: > On Thu, 15 Feb 2018 21:03:23 +, > Christoffer Dall wrote: > > > > As we are about to be more lazy with some of the trap configuration > > register read/writes for VHE systems, move the logic that is currently > > shared between

Re: [PATCH v4 32/40] KVM: arm64: Directly call VHE and non-VHE FPSIMD enabled functions

On Thu, Feb 15, 2018 at 10:03:24PM +0100, Christoffer Dall wrote: > There is no longer a need for an alternative to choose the right > function to tell us whether or not FPSIMD was enabled for the VM, > because we can simply cann the appropriate functions directly fromwithin s/cann/call/

Re: [PATCH v4 38/40] KVM: arm/arm64: Handle VGICv3 save/restore from the main VGIC code on VHE

On Thu, Feb 22, 2018 at 03:01:17PM +, Marc Zyngier wrote: > On Thu, 22 Feb 2018 14:42:27 +, > Christoffer Dall wrote: > > > > On Thu, Feb 22, 2018 at 12:32:11PM +, Marc Zyngier wrote: > > > On 15/02/18 21:03, Christoffer Dall wrote: > > > > Just like we can program the GICv2

Re: [PATCH v4] arm64: Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC

On 22/02/18 16:33, Mark Rutland wrote: On Thu, Feb 22, 2018 at 04:28:03PM +, Robin Murphy wrote: [Apologies to keep elbowing in, and if I'm being thick here...] On 22/02/18 15:22, Mark Rutland wrote: On Thu, Feb 22, 2018 at 08:51:30AM -0600, Shanker Donthineni wrote: +#define

Re: [PATCH v4 33/40] KVM: arm64: Configure c15, PMU, and debug register traps on cpu load/put for VHE

On Thu, Feb 15, 2018 at 10:03:25PM +0100, Christoffer Dall wrote: > We do not have to change the c15 trap setting on each switch to/from the > guest on VHE systems, because this setting only affects EL0. > > The PMU and debug trap configuration can also be done on vcpu load/put > instead, because

Re: [PATCH v4] arm64: Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC

[Apologies to keep elbowing in, and if I'm being thick here...] On 22/02/18 15:22, Mark Rutland wrote: On Thu, Feb 22, 2018 at 08:51:30AM -0600, Shanker Donthineni wrote: +#define CTR_B31_SHIFT 31 Since this is just a RES1 bit, I think we don't need a mnemonic for it, but I'll defer

Re: [PATCH v4 34/40] KVM: arm64: Cleanup __activate_traps and __deactive_traps for VHE and non-VHE

On Thu, Feb 15, 2018 at 10:03:26PM +0100, Christoffer Dall wrote: > To make the code more readable and to avoid the overhead of a function > call, let's get rid of a pair of the alternative function selectors and > explicitly call the VHE and non-VHE functions using the has_vhe() static > key

Re: [PATCH 06/11] ACPI / APEI: Make the fixmap_idx per-ghes to allow multiple in_nmi() users

Hi Tyler Thanks for taking a look! On 20/02/18 21:18, Tyler Baicar wrote: > On 2/15/2018 1:56 PM, James Morse wrote: >> Arm64 has multiple NMI-like notifications, but GHES only has one >> in_nmi() path. The interactions between these multiple NMI-like >> notifications is, unclear. >> >> Split

Re: [PATCH v4 28/40] KVM: arm64: Defer saving/restoring 64-bit sysregs to vcpu load/put on VHE

Hi Christoffer, On 15/02/18 21:03, Christoffer Dall wrote: Some system registers do not affect the host kernel's execution and can therefore be loaded when we are about to run a VCPU and we don't have to restore the host state to the hardware before the time when we are actually about to return

Re: [PATCH v4 31/40] KVM: arm64: Move common VHE/non-VHE trap config in separate functions

On Thu, Feb 15, 2018 at 10:03:23PM +0100, Christoffer Dall wrote: > As we are about to be more lazy with some of the trap configuration > register read/writes for VHE systems, move the logic that is currently > shared between VHE and non-VHE into a separate function which can be > called from

Re: [PATCH v4] arm64: Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC

On Thu, Feb 22, 2018 at 04:28:03PM +, Robin Murphy wrote: > [Apologies to keep elbowing in, and if I'm being thick here...] > > On 22/02/18 15:22, Mark Rutland wrote: > > On Thu, Feb 22, 2018 at 08:51:30AM -0600, Shanker Donthineni wrote: > > > +#define CTR_B31_SHIFT31 > > > >

Re: [PATCH v4 28/40] KVM: arm64: Defer saving/restoring 64-bit sysregs to vcpu load/put on VHE

On 22/02/18 18:30, Julien Grall wrote: Hi Christoffer, On 15/02/18 21:03, Christoffer Dall wrote: Some system registers do not affect the host kernel's execution and can therefore be loaded when we are about to run a VCPU and we don't have to restore the host state to the hardware before the

Re: [PATCH v4 28/40] KVM: arm64: Defer saving/restoring 64-bit sysregs to vcpu load/put on VHE

On Thu, Feb 22, 2018 at 06:30:11PM +, Julien Grall wrote: > Hi Christoffer, > > On 15/02/18 21:03, Christoffer Dall wrote: > >Some system registers do not affect the host kernel's execution and can > >therefore be loaded when we are about to run a VCPU and we don't have to > >restore the host

Re: [PATCH v4 33/40] KVM: arm64: Configure c15, PMU, and debug register traps on cpu load/put for VHE

On Wed, Feb 21, 2018 at 06:20:54PM +, Marc Zyngier wrote: > On Thu, 15 Feb 2018 21:03:25 +, > Christoffer Dall wrote: > > > > We do not have to change the c15 trap setting on each switch to/from the > > guest on VHE systems, because this setting only affects EL0. > > Did you mean EL1

[PATCH v4] arm64: Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC

The DCache clean & ICache invalidation requirements for instructions to be data coherence are discoverable through new fields in CTR_EL0. The following two control bits DIC and IDC were defined for this purpose. No need to perform point of unification cache maintenance operations from software on

Re: [PATCH v4 25/40] KVM: arm64: Introduce framework for accessing deferred sysregs

On Thu, Feb 22, 2018 at 02:40:52PM +0100, Andrew Jones wrote: > On Thu, Feb 15, 2018 at 10:03:17PM +0100, Christoffer Dall wrote: > > We are about to defer saving and restoring some groups of system > > registers to vcpu_put and vcpu_load on supported systems. This means > > that we need some

Re: [PATCH v4 30/40] KVM: arm64: Defer saving/restoring 32-bit sysregs to vcpu load/put

On Thu, Feb 22, 2018 at 03:35:06PM +0100, Andrew Jones wrote: > On Thu, Feb 15, 2018 at 10:03:22PM +0100, Christoffer Dall wrote: > > When running a 32-bit VM (EL1 in AArch32), the AArch32 system registers > > can be deferred to vcpu load/put on VHE systems because neither > > the host kernel nor

Re: [PATCH v4 38/40] KVM: arm/arm64: Handle VGICv3 save/restore from the main VGIC code on VHE

On Thu, 22 Feb 2018 14:42:27 +, Christoffer Dall wrote: > > On Thu, Feb 22, 2018 at 12:32:11PM +, Marc Zyngier wrote: > > On 15/02/18 21:03, Christoffer Dall wrote: > > > Just like we can program the GICv2 hypervisor control interface directly > > > from the core vgic code, we can do the

Re: [PATCH v4 24/40] KVM: arm64: Rewrite system register accessors to read/write functions

Hi Christoffer, I'm just pointing out some broken lines that we could maybe cheat the 80-char limit on. Naturally feel free to ignore. On Thu, Feb 15, 2018 at 10:03:16PM +0100, Christoffer Dall wrote: > From: Christoffer Dall > > Currently we access the system registers

Re: [PATCH v4] arm64: Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC

On Thu, Feb 22, 2018 at 08:51:30AM -0600, Shanker Donthineni wrote: > +#define CTR_B31_SHIFT31 Since this is just a RES1 bit, I think we don't need a mnemonic for it, but I'll defer to Will and Catalin on that. > ENTRY(invalidate_icache_range) > +#ifdef

Re: [PATCH v4 28/40] KVM: arm64: Defer saving/restoring 64-bit sysregs to vcpu load/put on VHE

On Thu, Feb 15, 2018 at 10:03:20PM +0100, Christoffer Dall wrote: > Some system registers do not affect the host kernel's execution and can > therefore be loaded when we are about to run a VCPU and we don't have to > restore the host state to the hardware before the time when we are > actually

Re: [PATCH v4 29/40] KVM: arm64: Prepare to handle deferred save/restore of 32-bit registers

On Thu, Feb 15, 2018 at 10:03:21PM +0100, Christoffer Dall wrote: > 32-bit registers are not used by a 64-bit host kernel and can be > deferred, but we need to rework the accesses to this register to access these registers > the latest value depending on whether or not guest system registers are

Re: [PATCH v4 24/40] KVM: arm64: Rewrite system register accessors to read/write functions

On Thu, Feb 22, 2018 at 02:34:21PM +0100, Andrew Jones wrote: > On Thu, Feb 15, 2018 at 10:03:16PM +0100, Christoffer Dall wrote: > > From: Christoffer Dall > > > > Currently we access the system registers array via the vcpu_sys_reg() > > macro. However, we are about to

Re: [PATCH v4 38/40] KVM: arm/arm64: Handle VGICv3 save/restore from the main VGIC code on VHE

On Thu, Feb 22, 2018 at 12:32:11PM +, Marc Zyngier wrote: > On 15/02/18 21:03, Christoffer Dall wrote: > > Just like we can program the GICv2 hypervisor control interface directly > > from the core vgic code, we can do the same for the GICv3 hypervisor > > control interface on VHE systems. > >

Re: [PATCH v4 30/40] KVM: arm64: Defer saving/restoring 32-bit sysregs to vcpu load/put

On Thu, Feb 15, 2018 at 10:03:22PM +0100, Christoffer Dall wrote: > When running a 32-bit VM (EL1 in AArch32), the AArch32 system registers > can be deferred to vcpu load/put on VHE systems because neither > the host kernel nor host userspace uses these registers. > > Note that we can not defer

Re: [PATCH v4 37/40] KVM: arm/arm64: Move arm64-only vgic-v2-sr.c file to arm64

On Thu, Feb 22, 2018 at 12:33:20PM +, Marc Zyngier wrote: > On 15/02/18 21:03, Christoffer Dall wrote: > > The vgic-v2-sr.c file now only contains the logic to replay unaligned > > accesses to the virtual CPU interface on 16K and 64K page systems, which > > is only relevant on 64-bit

Re: [PATCH v4 39/40] KVM: arm/arm64: Move VGIC APR save/restore to vgic put/load

On Thu, Feb 22, 2018 at 01:11:55PM +, Marc Zyngier wrote: > On 15/02/18 21:03, Christoffer Dall wrote: > > The APRs can only have bits set when the guest acknowledges an interrupt > > in the LR and can only have a bit cleared when the guest EOIs an > > interrupt in the LR. Therefore, if we