Re: [PATCH] KVM: arm/arm64: Hold slots_lock when unregisering kvm io bus devices

Hi Christoffer, On 17/05/2017 21:18, Christoffer Dall wrote: > We were not holding the kvm->slots_lock as required when calling > kvm_io_bus_unregister_dev() as required. > > This only affects the error path, but still, let's do our due > dilligence. > > Reported by: Eric Auger

Re: [PATCH] KVM: arm/arm64: Fix bug when registering redist iodevs

Hi Christoffer, On 17/05/2017 15:17, Christoffer Dall wrote: > If userspace creates the VCPUs after initializing the VGIC, then we end > up in a situation where we trigger a bug in kvm_vcpu_get_idx(), because > it is called prior to adding the VCPU into the vcpus array on the VM. > > There is no

Re: [PATCH 13/31] KVM: arm64: vgic-v3: Add ICV_IAR1_EL1 handler

Hi Marc, On 03/05/2017 12:45, Marc Zyngier wrote: > Add a handler for reading the guest's view of the ICC_IAR1_EL1 > register. This involves finding the highest priority Group-1 > interrupt, checking against both PMR and the active group > priority, activating the interrupt and setting the group

Re: [PATCH 08/31] arm64: Add a facility to turn an ESR syndrome into a sysreg encoding

Hi, On 03/05/2017 12:45, Marc Zyngier wrote: > It is often useful to compare an ESR syndrome reporting the trapping > of a system register with a value matching that system register. > > Since encoding both the sysreg and the ESR version seem to be a bit > overkill, let's add a set of macros

Re: [PATCH 09/31] KVM: arm64: Make kvm_condition_valid32() accessible from EL2

Hi, On 03/05/2017 12:45, Marc Zyngier wrote: > As we're about to trap CP15 accesses and handle them at EL2, we > need to evaluate whether or not the condition flags are valid, > as an implementation is allowed to trap despite the condition > not being met. > > Tagging the function as __hyp_text

Re: [PATCH 07/31] KVM: arm/arm64: vgic-v3: Add accessors for the ICH_APxRn_EL2 registers

Hi, On 03/05/2017 12:45, Marc Zyngier wrote: > As we're about to access the Active Priority registers a lot more, > let's define accessors that take the register number as a parameter. > > Signed-off-by: Marc Zyngier > --- > virt/kvm/arm/hyp/vgic-v3-sr.c | 116 >

Re: [PATCH 10/31] KVM: arm64: vgic-v3: Add hook to handle guest GICv3 sysreg accesses at EL2

Hi Marc, On 03/05/2017 12:45, Marc Zyngier wrote: > In order to start handling guest access to GICv3 system registers, > let's add a hook that will get called when we trap a system register > access. This is gated by a new static key (vgic_v3_cpuif_trap). > > Signed-off-by: Marc Zyngier

Re: [PATCH v2 07/11] KVM: arm/arm64: Register iodevs when setting redist base and creating VCPUs

Hi Christoffer, On 17/05/2017 13:18, Christoffer Dall wrote: > Hi Jean, > > On Tue, May 16, 2017 at 12:23:52PM +0100, Jean-Philippe Brucker wrote: >> Hi, >> >> On 09/05/17 09:56, Christoffer Dall wrote: >>> Instead of waiting with registering KVM iodevs until the first VCPU is >>> run, we can

Re: [PATCH v2 07/11] KVM: arm/arm64: Register iodevs when setting redist base and creating VCPUs

Hi Jean, Christoffer, On 16/05/2017 13:23, Jean-Philippe Brucker wrote: > Hi, > > On 09/05/17 09:56, Christoffer Dall wrote: >> Instead of waiting with registering KVM iodevs until the first VCPU is >> run, we can actually create the iodevs when the redist base address is >> set. The only

Re: [PATCH 08/10] KVM: arm/arm64: vgic: Handle unshared mapped interrupts

Hi Christoffer, On 02/06/2017 15:33, Christoffer Dall wrote: > On Wed, May 24, 2017 at 10:13:21PM +0200, Eric Auger wrote: >> Virtual interrupts directly mapped to physical interrupts require >> some special care. Their pending and active state must be observed >> at distributor level and not in

Re: [PATCH 08/10] KVM: arm/arm64: vgic: Handle unshared mapped interrupts

Hi Christoffer, Marc, On 08/06/2017 10:34, Christoffer Dall wrote: > On Thu, Jun 08, 2017 at 09:23:16AM +0100, Marc Zyngier wrote: >> On Fri, Jun 02 2017 at 6:29:44 pm BST, Christoffer Dall >> wrote: >>> On Fri, Jun 02, 2017 at 03:10:23PM +0100, Marc Zyngier wrote: On

Re: [PATCH 13/31] KVM: arm64: vgic-v3: Add ICV_IAR1_EL1 handler

Hi Marc, On 22/05/2017 19:52, Marc Zyngier wrote: > Hi Eric, > > On 18/05/17 08:41, Auger Eric wrote: >> Hi Marc, >> >> On 03/05/2017 12:45, Marc Zyngier wrote: >>> Add a handler for reading the guest's view of the ICC_IAR1_EL1 >>> register. This

Re: [PATCH 14/31] KVM: arm64: vgic-v3: Add ICV_EOIR1_EL1 handler

Hi Marc On 03/05/2017 12:45, Marc Zyngier wrote: > Add a handler for writing the guest's view of the ICC_EOIR1_EL1 > register. This involves dropping the priority of the interrupt, > and deactivating it if required (EOImode == 0). > > Signed-off-by: Marc Zyngier > --- >

Re: [PATCH 15/31] KVM: arm64: vgic-v3: Add ICV_AP1Rn_EL1 handler

H Marc, On 03/05/2017 12:45, Marc Zyngier wrote: > Add a handler for reading/writing the guest's view of the ICV_AP1Rn_EL1 > registers. We just map them to the corresponding ICH_AP1Rn_EL2 registers. > > Signed-off-by: Marc Zyngier > --- > arch/arm64/include/asm/sysreg.h |

Re: [PATCH 15/31] KVM: arm64: vgic-v3: Add ICV_AP1Rn_EL1 handler

Hi Marc, On 30/05/2017 09:48, Auger Eric wrote: > H Marc, > > On 03/05/2017 12:45, Marc Zyngier wrote: >> Add a handler for reading/writing the guest's view of the ICV_AP1Rn_EL1 >> registers. We just map them to the corresponding ICH_AP1Rn_EL2 registers. >> >

Re: [PATCH 16/31] KVM: arm64: vgic-v3: Add ICV_HPPIR1_EL1 handler

Hi, On 03/05/2017 12:45, Marc Zyngier wrote: > Add a handler for reading the guest's view of the ICV_HPPIR1_EL1 > register. This is a simple parsing of the available LRs, extracting the > highest available interrupt. > > Signed-off-by: Marc Zyngier Reviewed-by: Eric Auger

Re: [PATCH 22/31] KVM: arm64: vgic-v3: Enable trapping of Group-0 system registers

Hi, On 03/05/2017 12:45, Marc Zyngier wrote: > In order to be able to trap Group-0 GICv3 system registers, we need to > set ICH_HCR_EL2.TALL0 begore entering the guest. This is conditionnaly > done after having restored the guest's state, and cleared on exit. > > Signed-off-by: Marc Zyngier

Re: [PATCH 20/31] KVM: arm64: vgic-v3: Add ICV_IGNREN0_EL1 handler

Hi, On 03/05/2017 12:45, Marc Zyngier wrote: > Add a handler for reading/writing the guest's view of the ICC_IGRPEN0_EL1 > register, which is located in the ICH_VMCR_EL2.VENG0 field. > > Signed-off-by: Marc Zyngier Reviewed-by: Eric Auger Eric >

Re: [PATCH 19/31] KVM: arm64: vgic-v3: Add ICV_BPR0_EL1 handler

Hi, On 03/05/2017 12:45, Marc Zyngier wrote: > Add a handler for reading/writing the guest's view of the ICC_BPR0_EL1 > register, which is located in the ICH_VMCR_EL2.BPR0 field. > > Signed-off-by: Marc Zyngier Reviewed-by: Eric Auger Thanks Eric >

Re: [PATCH 21/31] KVM: arm64: vgic-v3: Add misc Group-0 handlers

Hi, On 03/05/2017 12:45, Marc Zyngier wrote: > A number of Group-0 registers can be handled by the same accessors > as that of Group-1, so let's add the required system register encodings > and catch them in the dispatching function. > > Signed-off-by: Marc Zyngier

Re: [PATCH 17/31] KVM: arm64: vgic-v3: Enable trapping of Group-1 system registers

Hi Marc, On 03/05/2017 12:45, Marc Zyngier wrote: > In order to be able to trap Group-1 GICv3 system registers, we need to > set ICH_HCR_EL2.TALL1 begore entering the guest. This is conditionnaly before, conditionally > done after having restored the guest's state, and cleared on exit. > >

Re: [PATCH 30/31] KVM: arm64: Enable GICv3 common sysreg trapping via command-line

Hi, On 03/05/2017 12:46, Marc Zyngier wrote: > Now that we're able to safely handle common sysreg access, let's > give the user the opportunity to enable it by passing a specific > command-line option (vgic_v3.common_trap). > > Signed-off-by: Marc Zyngier What is the

Re: [PATCH 25/31] arm64: Add workaround for Cavium Thunder erratum 30115

Hi, On 03/05/2017 12:46, Marc Zyngier wrote: > From: David Daney > > Some Cavium Thunder CPUs suffer a problem where a KVM guest may > inadvertently cause the host kernel to quit receiving interrupts. > > Use the Group-0/1 trapping in order to deal with it. > > [maz]:

Re: [PATCH 31/31] KVM: arm64: vgic-v3: Log which GICv3 system registers are trapped

Hi, On 03/05/2017 12:46, Marc Zyngier wrote: > In order to facilitate debug, let's log which class of GICv3 system > registers are trapped. > > Signed-off-by: Marc Zyngier Reviewed-by: Eric Auger Eric > --- > virt/kvm/arm/vgic/vgic-v3.c | 5 - >

Re: [PATCH 24/31] arm64: Add MIDR values for Cavium cn83XX SoCs

Hi, On 03/05/2017 12:45, Marc Zyngier wrote: > From: David Daney > > Signed-off-by: David Daney > Signed-off-by: Marc Zyngier Reviewed-by: Eric Auger Eric > --- > arch/arm64/include/asm/cputype.h |

Re: [PATCH 26/31] KVM: arm64: vgic-v3: Add ICV_DIR_EL1 handler

Marc, On 03/05/2017 12:46, Marc Zyngier wrote: > Add a handler for writing the guest's view of the ICC_DIR_EL1 > register, performing the deactivation of an interrupt if EOImode > is set ot 1. > > Signed-off-by: Marc Zyngier > --- > virt/kvm/arm/hyp/vgic-v3-sr.c | 23

Re: [PATCH 29/31] KVM: arm64: vgic-v3: Add ICV_PMR_EL1 handler

Hi, On 03/05/2017 12:46, Marc Zyngier wrote: > Add a handler for reading/writing the guest's view of the ICC_PMR_EL1 > register, which is located in the ICH_VMCR_EL2.VPMR field. > > Signed-off-by: Marc Zyngier Reviewed-by: Eric Auger Eric > --- >

Re: [PATCH 27/31] KVM: arm64: vgic-v3: Add ICV_RPR_EL1 handler

Hi, On 03/05/2017 12:46, Marc Zyngier wrote: > Add a handler for reading the guest's view of the ICV_RPR_EL1 > register, returning the highest active priority. > > Signed-off-by: Marc Zyngier Reviewed-by: Eric Auger Eric > --- >

Re: [PATCH 01/10] vfio: platform: Add automasked field to vfio_platform_irq

Hi Marc, On 25/05/2017 20:05, Marc Zyngier wrote: > Hi Eric, > > On Wed, May 24 2017 at 10:13:14 pm BST, Eric Auger > wrote: >> For direct EOI modality we will need to differentiate a userspace >> masking from the IRQ handler auto-masking. >> >> Signed-off-by: Eric Auger

Re: [PATCH 08/10] KVM: arm/arm64: vgic: Handle unshared mapped interrupts

Hi Marc, On 25/05/2017 21:14, Marc Zyngier wrote: > On Wed, May 24 2017 at 10:13:21 pm BST, Eric Auger > wrote: >> Virtual interrupts directly mapped to physical interrupts require >> some special care. Their pending and active state must be observed >> at distributor

Re: [PATCH 28/31] KVM: arm64: vgic-v3: Add ICV_CTLR_EL1 handler

Hi, On 03/05/2017 12:46, Marc Zyngier wrote: > Add a handler for reading/writing the guest's view of the ICV_CTLR_EL1 > register. only EOIMode and CBPR are of interest here, as all the other > bits directly come from ICH_VTR_EL2 and are Read-Only. > > Signed-off-by: Marc Zyngier

Re: [PATCH 09/10] KVM: arm/arm64: vgic: Implement forwarding setting

Hi, On 25/05/2017 21:19, Marc Zyngier wrote: > On Wed, May 24 2017 at 10:13:22 pm BST, Eric Auger > wrote: >> Implements kvm_vgic_[set|unset]_forwarding. >> >> Handle low-level VGIC programming and consistent irqchip >> programming. >> >> Signed-off-by: Eric Auger

Re: [PATCH 17/31] KVM: arm64: vgic-v3: Enable trapping of Group-1 system registers

Hi Marc, On 30/05/2017 16:32, Marc Zyngier wrote: > On 30/05/17 10:07, Auger Eric wrote: >> Hi Marc, >> >> On 03/05/2017 12:45, Marc Zyngier wrote: >>> In order to be able to trap Group-1 GICv3 system registers, we need to >>> set ICH_HCR_EL2.TALL1 begore en

Re: [PATCH 14/31] KVM: arm64: vgic-v3: Add ICV_EOIR1_EL1 handler

Hi Marc, On 31/05/2017 08:46, Marc Zyngier wrote: > On Wed, 31 May 2017 08:33:05 +0200 > Auger Eric <eric.au...@redhat.com> wrote: > >> Hi Marc, >> >> On 30/05/2017 16:24, Marc Zyngier wrote: >>> On 30/05/17 08:48, Auger Eric wrote: >>>&g

Re: [PATCH 14/31] KVM: arm64: vgic-v3: Add ICV_EOIR1_EL1 handler

Hi Marc, On 30/05/2017 16:24, Marc Zyngier wrote: > On 30/05/17 08:48, Auger Eric wrote: >> Hi Marc >> >> On 03/05/2017 12:45, Marc Zyngier wrote: >>> Add a handler for writing the guest's view of the ICC_EOIR1_EL1 >>> register. This involves

Re: [PATCH 09/10] KVM: arm/arm64: vgic: Implement forwarding setting

Hi Marc, On 30/05/2017 15:17, Marc Zyngier wrote: > On 30/05/17 13:54, Auger Eric wrote: >> Hi, >> >> On 25/05/2017 21:19, Marc Zyngier wrote: >>> On Wed, May 24 2017 at 10:13:22 pm BST, Eric Auger <eric.au...@redhat.com> >>> wrote: &g

Re: [PATCH 03/10] VFIO: platform: Direct EOI irq bypass for ARM/ARM64

Hi Alex, Marc, On 31/05/2017 20:20, Alex Williamson wrote: > On Wed, 24 May 2017 22:13:16 +0200 > Eric Auger wrote: > >> This patch adds the registration/unregistration of an >> irq_bypass_producer for vfio platform device interrupts. >> >> Its callbacks handle the direct

Re: [PATCH 05/10] VFIO: pci: Introduce direct EOI INTx interrupt handler

Hi Alex, On 31/05/2017 20:24, Alex Williamson wrote: > On Wed, 24 May 2017 22:13:18 +0200 > Eric Auger wrote: > >> We add two new fields in vfio_pci_irq_ctx struct: deoi and handler. >> If deoi is set, this means the physical IRQ attached to the virtual >> IRQ is directly

Re: [PATCH v5 01/22] KVM: arm/arm64: Add ITS save/restore API documentation

Hi Christoffer, On 27/04/2017 16:45, Christoffer Dall wrote: > Hi Eric, > > On Thu, Apr 27, 2017 at 02:51:00PM +0200, Auger Eric wrote: >> On 27/04/2017 13:02, Christoffer Dall wrote: >>> On Thu, Apr 27, 2017 at 11:33:39AM +0200, Auger Eric wrote: >>>> On 27/0

Re: [PATCH v5 01/22] KVM: arm/arm64: Add ITS save/restore API documentation

Hi Marc, On 04/05/2017 09:40, Marc Zyngier wrote: > On 04/05/17 08:00, Auger Eric wrote: >> Hi Christoffer, >> >> On 27/04/2017 16:45, Christoffer Dall wrote: >>> Hi Eric, >>> >>> On Thu, Apr 27, 2017 at 02:51:00PM +0200, Auger Eric wrote:

Re: [PATCH v5 19/22] KVM: arm64: vgic-its: ITT save and restore

Hi, On 04/05/2017 10:23, Christoffer Dall wrote: > On Thu, May 04, 2017 at 09:40:35AM +0200, Auger Eric wrote: >> Hi Christoffer, >> >> On 04/05/2017 09:31, Christoffer Dall wrote: >>> On Wed, May 03, 2017 at 11:55:34PM +0200, Auger Eric wrote: >>>> Hi

Re: [PATCH v7 16/24] KVM: arm64: vgic-its: KVM_DEV_ARM_ITS_SAVE/RESTORE_TABLES

Hi, On 07/05/2017 15:51, Marc Zyngier wrote: > On Sun, May 07 2017 at 2:00:30 pm BST, Marc Zyngier > wrote: >> On Sat, May 06 2017 at 4:24:35 pm BST, Eric Auger >> wrote: >>> Introduce new attributes in KVM_DEV_ARM_VGIC_GRP_CTRL group: >>> -

Re: [PATCH v7 21/24] KVM: arm64: vgic-its: Device table save/restore

Hi Marc, On 07/05/2017 15:30, Marc Zyngier wrote: > On Sat, May 06 2017 at 4:24:40 pm BST, Eric Auger > wrote: >> This patch saves the device table entries into guest RAM. >> Both flat table and 2 stage tables are supported. DeviceId >> indexing is used. >> >> For each

Re: [PATCH v7 22/24] KVM: arm64: vgic-its: ITT save and restore

On 07/05/2017 15:39, Marc Zyngier wrote: > On Sat, May 06 2017 at 4:24:41 pm BST, Eric Auger > wrote: >> Implement routines to save and restore device ITT and their >> interrupt table entries (ITE). >> >> Signed-off-by: Eric Auger >> Reviewed-by:

Re: [PATCH v7 01/24] KVM: arm/arm64: Add ITS save/restore API documentation

Hi Marc, On 07/05/2017 13:54, Marc Zyngier wrote: > On Sat, May 06 2017 at 4:24:20 pm BST, Eric Auger > wrote: >> Add description for how to access ITS registers and how to save/restore >> ITS tables into/from memory. >> >> Signed-off-by: Eric Auger

Re: [PATCH v5 16/22] KVM: arm64: vgic-its: Add infrastructure for table lookup

Hi Christoffer, On 03/05/2017 10:01, Christoffer Dall wrote: > On Wed, May 03, 2017 at 08:53:36AM +0200, Auger Eric wrote: >> Hi Christoffer, >> >> On 30/04/2017 21:35, Christoffer Dall wrote: >>> On Fri, Apr 14, 2017 at 12:15:28PM +0200, Eric Auger wrote: >>&g

Re: [PATCH v6 09/24] KVM: arm64: vgic-its: Introduce migration ABI infrastructure

Hi Christoffer, On 04/05/2017 19:13, Christoffer Dall wrote: > On Thu, May 04, 2017 at 01:44:29PM +0200, Eric Auger wrote: >> We plan to support different migration ABIs, ie. characterizing >> the ITS table layout format in guest RAM. For example, a new ABI >> will be needed if vLPIs get

Re: [PATCH v6 15/24] KVM: arm64: vgic-its: Read config and pending bit in add_lpi()

Hi, On 05/05/2017 14:50, Marc Zyngier wrote: > On 05/05/17 10:57, Christoffer Dall wrote: >> On Thu, May 04, 2017 at 01:44:35PM +0200, Eric Auger wrote: >>> When creating the lpi we now ask the redistributor what is the state >>> of the LPI (priority, enabled, pending). >>> >>> Signed-off-by:

Re: [PATCH v6 19/24] KVM: arm64: vgic-its: Collection table save/restore

Hi, On 05/05/2017 16:28, Auger Eric wrote: > Hi > > On 05/05/2017 14:28, Christoffer Dall wrote: >> On Thu, May 04, 2017 at 01:44:39PM +0200, Eric Auger wrote: >>> The save path copies the collection entries into guest RAM >>> at the GPA specified in t

Re: [PATCH v6 14/24] KVM: arm64: vgic-v3: vgic_v3_lpi_sync_pending_status

Hi Christoffer, Marc, On 05/05/2017 12:35, Marc Zyngier wrote: > On 05/05/17 11:10, Christoffer Dall wrote: >> On Fri, May 05, 2017 at 10:59:09AM +0100, Marc Zyngier wrote: >>> On 05/05/17 10:45, Auger Eric wrote: >>>> Hi, >>>> >>>> On 05/05

Re: [PATCH v6 19/24] KVM: arm64: vgic-its: Collection table save/restore

Hi On 05/05/2017 14:28, Christoffer Dall wrote: > On Thu, May 04, 2017 at 01:44:39PM +0200, Eric Auger wrote: >> The save path copies the collection entries into guest RAM >> at the GPA specified in the BASER register. This obviously >> requires the BASER to be set. The last written element is a

Re: [PATCH 8/8] KVM: arm/arm64: vgic-its: Cleanup after failed ITT restore

Hi Christoffer, On 08/05/2017 13:54, Christoffer Dall wrote: > When failing to restore the ITT for a DTE, we should remove the failed > device entry from the list and free the object. > > We slightly refactor vgic_its_destroy to be able to reuse the now > separate vgic_its_free_dte() function. >

Re: [PATCH 3/8] KVM: arm/arm64: Refactor vgic_register_redist_iodevs

Hi Christoffer, On 08/05/2017 13:54, Christoffer Dall wrote: > Split out the function to register all the redistributor iodevs into a > function that handles a single redistributor at a time in preparation > for being able to call this per VCPU as these get created. > > Signed-off-by:

Re: [PATCH 1/8] KVM: arm/arm64: Clarification and relaxation to ITS save/restore ABI

Hi Christoffer, On 08/05/2017 13:54, Christoffer Dall wrote: > Clarify what is meant by the save/restore ABI only supporting virtual > physical interrupts. > > Relax the requirement of the order that the collection entries are > written in and be clear that there is no particular ordering

Re: [PATCH 2/8] KVM: arm/arm64: vgic: Rename kvm_vgic_vcpu_init to kvm_vgic_vcpu_enable

Hi, On 08/05/2017 13:54, Christoffer Dall wrote: > This function really doesn't init anything, it enables the CPU > interface, so name it as such, which gives us the name to use for actual > init work later on. > > Signed-off-by: Christoffer Dall Reviewed-by: Eric Auger

Re: [PATCH 4/8] KVM: arm/arm64: Make vgic_v3_check_base more broadly usable

Hi Christoffer, On 08/05/2017 13:54, Christoffer Dall wrote: > As we are about to fiddle with the io device registration mechanism > let's be a little more careful in verifying the addresses we can ealier > on to provide error messages to the user at time related to him/her > setting overlapping

Re: [PATCH 5/8] KVM: arm/arm64: Slightly rework kvm_vgic_addr

Hi Christoffer, On 08/05/2017 13:54, Christoffer Dall wrote: > As we are about to handle setting the address for the redistributor base > region separately from some of the other base addresses, let's rework > this function to leave a little more room for being flexible in what > each type of

Re: [PATCH 7/8] KVM: arm/arm64: Register ITS iodev when setting base address

Hi, On 08/05/2017 13:54, Christoffer Dall wrote: > We have to register the ITS iodevice before running the VM, because in > migration scenarios, we may be restoring a live device that wishes to > inject MSIs before we get a chance to run the VM. actually the VM is in running state but the vcpus

Re: [PATCH v5 22/22] KVM: arm64: vgic-v3: KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES

Hi Christoffer, On 30/04/2017 23:32, Christoffer Dall wrote: > On Fri, Apr 14, 2017 at 12:15:34PM +0200, Eric Auger wrote: >> This patch adds a new attribute to GICV3 KVM device >> KVM_DEV_ARM_VGIC_GRP_CTRL group. This Allows the userspace to > > nit: allows (lowercase) > nit: s/the

Re: [RFC PATCH 3/3] kvm: arm/arm64: vgic-its: fix return value for restore

Hi Wanghaibin, On 06/09/2017 15:05, wanghaibin wrote: > This patch fix the migrate restore tables failure. > > The same scene, at the destination, the restore tables interface traversal > guest > memory, and check the dte/ite is valid or not. > If all dtes/ites are invalid, we will do try next

Re: [PATCH] KVM: arm64: vgic-its: Fix wrong return value check in vgic_its_restore_device_tables

Hi Vijaya, On 17/09/2017 10:10, vkil...@codeaurora.org wrote: > Hi Eric, > > Sorry for delayed reply. > >> -Original Message----- >> From: Auger Eric [mailto:eric.au...@redhat.com] >> Sent: Wednesday, September 6, 2017 12:53 PM >> To: Vijaya Kumar K

Re: [RFC PATCH 0/3] fix migrate failed when vm is in booting

Hi Wanghaibin, On 20/09/2017 03:57, wanghaibin wrote: > On 2017/9/6 21:05, wanghaibin wrote: > >> We have a test scenario： vmlife and migrate fixed test. >> >> Here is a problem； VM migration failed caused the qemu core which gdb trace: > > > I tested migration with these patches in these

Re: [RFC PATCH 3/3] kvm: arm/arm64: vgic-its: fix return value for restore

Hi, On 13/09/2017 22:02, Christoffer Dall wrote: > Hi Eric, > > On Wed, Sep 06, 2017 at 05:18:35PM +0200, Auger Eric wrote: >> Hi Wanghaibin, >> >> On 06/09/2017 15:05, wanghaibin wrote: >>> This patch fix the migrate restore tables failure. >&g

Re: [RFC PATCH 2/3] kvm: arm/arm64: vgic-vits: free its resource when vm reboot/reset

Hi Christoffer, On 13/09/2017 21:34, Christoffer Dall wrote: > Hi Wanghaibin, > > On Wed, Sep 06, 2017 at 09:05:09PM +0800, wanghaibin wrote: >> This patch fix the migrate save tables failure. >> >> When the virtual machine is in booting and the devices haven't initialized, >> the all virtual

Re: [PATCH v3 4/5] KVM: arm/arm64: Support VGIC dist pend/active changes for mapped IRQs

Hi Christoffer, On 06/09/2017 14:26, Christoffer Dall wrote: > For mapped IRQs (with the HW bit set in the LR) we have to follow some > rules of the architecture. One of these rules is that VM must not be > allowed to deactivate a virtual interrupt with the HW bit set unless the > physical

Re: [PATCH v3 4/5] KVM: arm/arm64: Support VGIC dist pend/active changes for mapped IRQs

Hi Marc, On 08/09/2017 15:32, Marc Zyngier wrote: > On 08/09/17 14:04, Auger Eric wrote: >> Hi Christoffer, >> >> On 06/09/2017 14:26, Christoffer Dall wrote: >>> For mapped IRQs (with the HW bit set in the LR) we have to follow some >>> rules of the archi

Re: [RFC PATCH 2/4] KVM: arm/arm64: vgic: Support level-triggered mapped interrupts

Hi Christoffer, On 29/08/2017 11:39, Christoffer Dall wrote: > Level-triggered mapped IRQs are special because we only observe rising > edges as input to the VGIC, and we don't set the EOI flag and therefore > are not told when the level goes down, so that we can re-queue a new > interrupt when

Re: [PATCH v3 41/59] KVM: arm/arm64: GICv4: Wire mapping/unmapping of VLPIs in VFIO irq bypass

Hi Marc, On 30/08/2017 11:42, Marc Zyngier wrote: > On 26/08/17 20:48, Christoffer Dall wrote: >> On Mon, Jul 31, 2017 at 06:26:19PM +0100, Marc Zyngier wrote: >>> Let's use the irq bypass mechanism introduced for platform device >>> interrupts to intercept the virtual PCIe endpoint configuration

Re: [RFC PATCH 2/4] KVM: arm/arm64: vgic: Support level-triggered mapped interrupts

Hi Christoffer, On 30/08/2017 11:20, Christoffer Dall wrote: > On Wed, Aug 30, 2017 at 10:19:38AM +0200, Auger Eric wrote: >> Hi Christoffer, >> >> On 29/08/2017 11:39, Christoffer Dall wrote: >>> Level-triggered mapped IRQs are special because we only obs

Re: [PATCH] KVM: arm64: vgic-its: Fix wrong return value check in vgic_its_restore_device_tables

Hi Vijaya, On 06/09/2017 07:26, Vijaya Kumar K wrote: > scan_its_table() return 1 on success. As mentioned in the kernel-doc comment of scan_its_table, this latter returns 1 if the last element is not found. Than can happen while scanning an L2 table but shouldn't happen if we scan an L1 table.

Re: [PATCH v2 5/6] KVM: arm/arm64: Rearrange kvm_vgic_[un]map_phys code in vgic.c

Hi Christoffer, On 05/09/2017 16:00, Christoffer Dall wrote: > On Tue, Sep 05, 2017 at 12:26:14PM +0200, Auger Eric wrote: >> Hi Christoffer, >> On 04/09/2017 12:24, Christoffer Dall wrote: >>> The small indirection of a static function made the locking very obvious >

Re: [RFC PATCH 3/3] kvm: arm/arm64: vgic-its: fix return value for restore

Hi Wanghaibin, On 06/09/2017 15:05, wanghaibin wrote: > This patch fix the migrate restore tables failure. > > The same scene, at the destination, the restore tables interface traversal > guest > memory, and check the dte/ite is valid or not. > If all dtes/ites are invalid, we will do try next

Re: [RFC PATCH 2/3] kvm: arm/arm64: vgic-vits: free its resource when vm reboot/reset

Hi Wanghaibin, On 12/09/2017 13:15, wanghaibin wrote: > On 2017/9/11 2:46, Auger Eric wrote: > >> Hi Wanghaibin, >> >> On 07/09/2017 13:28, Auger Eric wrote: >>> Hi Wanghaibin, >>> >>> On 07/09/2017 03:32, wanghaibin wrote: >

Re: [RFC PATCH 2/3] kvm: arm/arm64: vgic-vits: free its resource when vm reboot/reset

Hi Wanghaibin, On 07/09/2017 13:28, Auger Eric wrote: > Hi Wanghaibin, > > On 07/09/2017 03:32, wanghaibin wrote: >> On 2017/9/7 0:20, Auger Eric wrote: >> >>> Hi, >>> >>> On 06/09/2017 15:05, wanghaibin wrote: >>>> This patch fix

Re: [RFC PATCH 1/3] kvm: arm/arm64: vgic-vits: separate vgic_its_free_list() function

Hi Wanghaibin, On 12/09/2017 10:50, wanghaibin wrote: > On 2017/9/6 21:05, wanghaibin wrote: > >> We slightly refactor vgic_its_destroy, separate vgic_its_free_list() >> function for later patch invoke. >> >> The patch also take a functional change. If the its->device_list.next >> is NULL, we

Re: [RFC PATCH 2/3] kvm: arm/arm64: vgic-vits: free its resource when vm reboot/reset

Hi, On 06/09/2017 15:05, wanghaibin wrote: > This patch fix the migrate save tables failure. > > When the virtual machine is in booting and the devices haven't initialized, > the all virtual dte/ite may be invalid. If migrate at this moment, the save > tables interface traversal device list, and

Re: [PATCH v2 5/8] KVM: arm/arm64: vgic: Handle mapped level sensitive SPIs

Hi Christoffer, On 29/08/2017 08:45, Christoffer Dall wrote: > On Tue, Aug 22, 2017 at 04:33:42PM +0200, Auger Eric wrote: >> Hi Christoffer, >> >> On 21/07/2017 14:11, Christoffer Dall wrote: >>> On Thu, Jun 15, 2017 at 02:52:37PM +0200, Eric Auger wrote:

Re: [PATCH v3 41/59] KVM: arm/arm64: GICv4: Wire mapping/unmapping of VLPIs in VFIO irq bypass

Hi Marc, On 30/08/2017 12:42, Marc Zyngier wrote: > Hi Eric, > > On 30/08/17 11:20, Auger Eric wrote: >> Hi Marc, >> >> On 30/08/2017 11:42, Marc Zyngier wrote: >>> On 26/08/17 20:48, Christoffer Dall wrote: >>>> On Mon, Jul 31, 2017 at 06:26

Re: [RFC PATCH 2/4] KVM: arm/arm64: vgic: Support level-triggered mapped interrupts

Hi Christoffer, On 30/08/2017 14:03, Christoffer Dall wrote: > On Wed, Aug 30, 2017 at 12:13:32PM +0200, Auger Eric wrote: >> Hi Christoffer, >> >> On 30/08/2017 11:20, Christoffer Dall wrote: >>> On Wed, Aug 30, 2017 at 10:19:38AM +0200, Auger Eric wrote: >>&

Re: [PATCH v2 3/6] KVM: arm/arm64: vgic: Support level-triggered mapped interrupts

Hi Christoffer, On 04/09/2017 12:24, Christoffer Dall wrote: > Level-triggered mapped IRQs are special because we only observe rising > edges as input to the VGIC, and we don't set the EOI flag and therefore > are not told when the level goes down, so that we can re-queue a new > interrupt when

Re: [PATCH v2 5/6] KVM: arm/arm64: Rearrange kvm_vgic_[un]map_phys code in vgic.c

Hi Christoffer, On 04/09/2017 12:24, Christoffer Dall wrote: > The small indirection of a static function made the locking very obvious > but becomes pretty ugly as we start passing function pointer around. > Let's inline these two functions first to make the following patch more > readable. > >

Re: [PATCH] KVM: arm/arm64: don't set vtimer->cnt_ctl in kvm_arch_timer_handler

Marc, On 13/12/17 09:56, Marc Zyngier wrote: > Hi Jia, > > On 13/12/17 07:00, Jia He wrote: >> In our Armv8a server (qualcomm Amberwing, non VHE), after applying >> Christoffer's timer optimizing patchset(Optimize arch timer register >> handling), the guest is hang during kernel booting. >> >>

Re: [PATCH] KVM: arm/arm64: VGIC: extend !vgic_is_initialized guard

Hi Andre, On 17/11/2017 18:58, Andre Przywara wrote: > Commit f39d16cbabf9 ("KVM: arm/arm64: Guard kvm_vgic_map_is_active against > !vgic_initialized") introduced a check whether the VGIC has been > initialized before accessing the spinlock and the VGIC data structure. > However the

Re: [PATCH] KVM: arm/arm64: VGIC: extend !vgic_is_initialized guard

Hi Andre, On 17/11/2017 18:58, Andre Przywara wrote: > Commit f39d16cbabf9 ("KVM: arm/arm64: Guard kvm_vgic_map_is_active against > !vgic_initialized") introduced a check whether the VGIC has been > initialized before accessing the spinlock and the VGIC data structure. > However the

Re: [PATCH v5 16/26] KVM: arm/arm64: GICv4: Propagate property updates to VLPIs

Hi Marc, On 27/10/2017 16:28, Marc Zyngier wrote: > Upon updating a property, we propagate it all the way to the physical > ITS, and ask for an INV command to be executed there. > > Acked-by: Christoffer Dall > Signed-off-by: Marc Zyngier > --- >

Re: [PATCH v5 24/26] KVM: arm/arm64: GICv4: Prevent userspace from changing doorbell affinity

Hi, On 27/10/2017 16:28, Marc Zyngier wrote: > We so far allocate the doorbell interrupts without taking any > special measure regarding the affinity of these interrupts. We > simply move them around as required when the vcpu gets scheduled > on a different CPU. > > But that's counting without

Re: [PATCH v5 11/26] KVM: arm/arm64: GICv4: Handle INT command applied to a VLPI

Hi Marc, On 27/10/2017 16:28, Marc Zyngier wrote: > If the guest issues an INT command targetting a VLPI, let's > call into the irq_set_irqchip_state() helper to make it pending > on the physical side. > > This works just as well if userspace decides to inject an interrupt > using the normal

Re: [PATCH v5 12/26] KVM: arm/arm64: GICv4: Unmap VLPI when freeing an LPI

Hi Marc, On 27/10/2017 16:28, Marc Zyngier wrote: > When freeing an LPI (on a DISCARD command, for example), we need > to unmap the VLPI down to the physical ITS level. > > Acked-by: Christoffer Dall > Signed-off-by: Marc Zyngier > --- >

Re: [PATCH v5 17/26] KVM: arm/arm64: GICv4: Handle INVALL applied to a vPE

Hi Marc, On 27/10/2017 16:28, Marc Zyngier wrote: > Since when updating the properties one LPI at a time, there is no Since we update the properties one LPI at a time, ... ? > need to perform an INV each time we read one. Instead, we rely > on the final VINVALL that gets sent to the ITS to do the

Re: [PATCH v5 18/26] KVM: arm/arm64: GICv4: Use pending_last as a scheduling hint

Hi, On 27/10/2017 16:28, Marc Zyngier wrote: > When a vPE exits, the pending_last flag is set when there are > pending VLPIs stored in the pending table. Similarily, we set > this flag when a doorbell interrupt fires, as it indicates the > same condition. This is actually done in the next patch.

Re: [PATCH v5 20/26] KVM: arm/arm64: GICv4: Use the doorbell interrupt as an unblocking source

Hi, On 27/10/2017 16:28, Marc Zyngier wrote: > The doorbell interrupt is only useful if the vcpu is blocked on WFI. > In all other cases, recieving a doorbell interrupt is just a waste > of cycles. > > So let's only enable the doorbell if a vcpu is getting blocked, > and disable it when it is

Re: [PATCH v5 15/26] KVM: arm/arm64: GICv4: Handle MOVALL applied to a vPE

Hi Marc, On 27/10/2017 16:28, Marc Zyngier wrote: > The current implementation of MOVALL doesn't allow us to call > into the core ITS code as we hold a number of spinlocks. > > Let's try a method used in other parts of the code, were we copy nit: where > the intids of the candicate interrupts,

Re: [PATCH v5 21/26] KVM: arm/arm64: GICv4: Hook vPE scheduling into vgic flush/sync

Hi Marc, On 27/10/2017 16:28, Marc Zyngier wrote: > The redistributor needs to be told which vPE is about to be run, > and tells us whether there is any pending VLPI on exit. > > Let's add the scheduling calls to the vgic flush/sync functions, > allowing the VLPIs to be delivered to the guest. >

Re: [PATCH v5 23/26] KVM: arm/arm64: GICv4: Prevent a VM using GICv4 from being saved

Hi On 07/11/2017 17:34, Marc Zyngier wrote: > On 07/11/17 16:12, Auger Eric wrote: >> Hi Marc, >> >> On 07/11/2017 16:38, Marc Zyngier wrote: >>> On 07/11/17 15:24, Auger Eric wrote: >>>> Hi Marc, >>>> >>>> Hi Marc, >>

Re: [PATCH v5 09/26] KVM: arm/arm64: GICv4: Add init/teardown of the per-VM vPE irq domain

Hi Marc, On 27/10/2017 16:28, Marc Zyngier wrote: > In order to control the GICv4 view of virtual CPUs, we rely > on an irqdomain allocated for that purpose. Let's add a couple > of helpers to that effect. > > At the same time, the vgic data structures gain new fields to > track all this...

Re: [PATCH v5 10/26] KVM: arm/arm64: GICv4: Wire mapping/unmapping of VLPIs in VFIO irq bypass

Hi Marc, On 27/10/2017 16:28, Marc Zyngier wrote: > Let's use the irq bypass mechanism introduced for platform device > interrupts nit: I would remove "introduced for platform device interrupts" as this is not upstream yet. x86 posted interrupts also use it. > and establish our LPI->VLPI

Re: [PATCH v5 08/26] KVM: arm/arm64: GICv4: Add property field and per-VM predicate

Hi, On 27/10/2017 16:28, Marc Zyngier wrote: > Add a new has_gicv4 field in the global VGIC state that indicates > whether the HW is GICv4 capable, as a per-VM predicate indicating > if there is a possibility for a VM to support direct injection > (the above being true and the VM having an ITS). >

Re: [PATCH v5 13/26] KVM: arm/arm64: GICv4: Propagate affinity changes to the physical ITS

Hi Marc, On 27/10/2017 16:28, Marc Zyngier wrote: > When the guest issues an affinity change, we need to tell the physical > ITS that we're now targetting a new vcpu. This is done by extracting > the current mapping, updating the target, and reapplying the mapping. > > Reviewed-by: Christoffer

Re: [PATCH v5 19/26] KVM: arm/arm64: GICv4: Add doorbell interrupt handling

Hi, On 27/10/2017 16:28, Marc Zyngier wrote: > When a vPE is not running, a VLPI being made pending results in a > doorbell interrupt being delivered. Let's handle this interrupt > and update the pending_last flag that indicates that VLPIs are > pending. The corresponding vcpu is also kicked into

Re: [PATCH v5 21/26] KVM: arm/arm64: GICv4: Hook vPE scheduling into vgic flush/sync

Hi Marc, On 07/11/2017 22:54, Auger Eric wrote: > Hi Marc, > > On 27/10/2017 16:28, Marc Zyngier wrote: >> The redistributor needs to be told which vPE is about to be run, >> and tells us whether there is any pending VLPI on exit. >> >> Let's add the schedu

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