Re: [RFC PATCH 2/2] KVM: arm64: Eliminate most redundant FPSIMD saves and restores

Hi Dave, On Fri, Feb 16, 2018 at 06:29:31PM +, Dave Martin wrote: > Currently, KVM doesn't know how host tasks interact with the cpu > FPSIMD regs, and the host doesn't knoe how vcpus interact with the > regs. As a result, KVM must currently switch the FPSIMD state > rather defensively in

Re: [RFC PATCH 0.9/2] arm64: fpsimd: Expose CPU / FPSIMD state association helpers

On Fri, Feb 16, 2018 at 06:39:30PM +, Dave Martin wrote: > Oops, forgot to post this patch that goes before patch 1 in the series. > > --8<-- > > Expose an interface for associating an FPSIMD context with a CPU and > checking the association, for use by KVM. > > Signed-off-by: Dave Martin

Re: [PATCH v4 35/40] KVM: arm/arm64: Get rid of vgic_elrsr

On Fri, Feb 23, 2018 at 02:44:30PM +, Julien Grall wrote: > Hi Christoffer, > > On 15/02/18 21:03, Christoffer Dall wrote: > >There is really no need to store the vgic_elrsr on the VGIC data > >structures as the only need we have for the elrsr is to figure out if an > >LR is inactive when we

[PULL 1/2] KVM: arm/arm64: Fix arch timers with userspace irqchips

When introducing support for irqchip in userspace we needed a way to mask the timer signal to prevent the guest continuously exiting due to a screaming timer. We did this by disabling the corresponding percpu interrupt on the host interrupt controller, because we cannot rely on the host system

[PULL 0/2] KVM/ARM Fixes for v4.16

Hi Paolo and Radim, Here's the first round of KVM/ARM fixes for v4.16. Not much in here; we fix the interaction of userspace irqchip VMs with in-kernel irqchip VMs and make sure we can build 32-bit KVM/ARM with gcc-8. The following changes since commit 7928b2cbe55b2a410a0f5c1f154610059c57b1b2:

Re: [PATCH] arm64: rename the function arm64_is_ras_serror() to avoid confusion

Hi Dongjiu Geng, On 22/02/18 18:02, Dongjiu Geng wrote: > The RAS SError Syndrome can be Implementation-Defined, > arm64_is_ras_serror() is used to judge whether it is RAS SError, > but arm64_is_ras_serror() does not include this judgement. In order > to avoid function name confusion, we rename

[PULL 2/2] ARM: kvm: fix building with gcc-8

From: Arnd Bergmann In banked-sr.c, we use a top-level '__asm__(".arch_extension virt")' statement to allow compilation of a multi-CPU kernel for ARMv6 and older ARMv7-A that don't normally support access to the banked registers. This is considered to be a programming error by

Re: [PATCH 01/11] ACPI / APEI: Move the estatus queue code up, and under its own ifdef

Hi Borislav, On 20/02/18 19:28, Borislav Petkov wrote: > On Thu, Feb 15, 2018 at 06:55:56PM +, James Morse wrote: >> +#ifdef CONFIG_HAVE_ACPI_APEI_NMI >> +/* >> + * While printk() now has an in_nmi() path, the handling for CPER records >> + * does not. For example, memory_failure_queue()

Re: [PATCH 01/11] ACPI / APEI: Move the estatus queue code up, and under its own ifdef

On Fri, Feb 23, 2018 at 06:02:21PM +, James Morse wrote: > Sure. I reckon your English grammar is better than mine, is this better?: Bah, you must be joking :-) > | In any NMI-like handler, memory from ghes_estatus_pool is used to save > | estatus, and added to the ghes_estatus_llist.

Re: [PATCH 02/11] ACPI / APEI: Generalise the estatus queue's add/remove and notify code

Hi Punit, On 20/02/18 18:26, Punit Agrawal wrote: > James Morse writes: > >> To support asynchronous NMI-like notifications on arm64 we need to use >> the estatus-queue. These patches refactor it to allow multiple APEI >> notification types to use it. >> >> Refactor the

Re: [PATCH v4 29/40] KVM: arm64: Prepare to handle deferred save/restore of 32-bit registers

Hi Christoffer, On 15/02/18 21:03, Christoffer Dall wrote: 32-bit registers are not used by a 64-bit host kernel and can be deferred, but we need to rework the accesses to this register to access the latest value depending on whether or not guest system registers are loaded on the CPU or only

Re: [PATCH v4 31/40] KVM: arm64: Move common VHE/non-VHE trap config in separate functions

Hi Christoffer, On 15/02/18 21:03, Christoffer Dall wrote: @@ -85,37 +123,14 @@ static void __hyp_text __activate_traps(struct kvm_vcpu *vcpu) { u64 hcr = vcpu->arch.hcr_el2; - /* -* We are about to set CPTR_EL2.TFP to trap all floating point -* register accesses

Re: [PATCH v4 35/40] KVM: arm/arm64: Get rid of vgic_elrsr

Hi Christoffer, On 15/02/18 21:03, Christoffer Dall wrote: There is really no need to store the vgic_elrsr on the VGIC data structures as the only need we have for the elrsr is to figure out if an LR is inactive when we save the VGIC state upon returning from the guest. We can might as well