On 19 February 2015 at 13:40, Marc Zyngier marc.zyng...@arm.com wrote:
On 19/02/15 10:54, Ard Biesheuvel wrote:
---
arch/arm/kvm/mmu.c | 2 +-
arch/arm64/include/asm/kvm_arm.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/kvm/mmu.c b/arch/arm
On 20 February 2015 at 14:29, Andrew Jones drjo...@redhat.com wrote:
On Thu, Feb 19, 2015 at 06:57:24PM +0100, Paolo Bonzini wrote:
On 19/02/2015 18:55, Andrew Jones wrote:
(I don't have an exact number for how many times it went to EL1
because
access_mair() doesn't have a trace
On 19 February 2015 at 14:50, Alexander Graf ag...@suse.de wrote:
On 19.02.15 11:54, Ard Biesheuvel wrote:
This is a 0th order approximation of how we could potentially force the guest
to avoid uncached mappings, at least from the moment the MMU is on. (Before
that, all of memory
On 16 March 2015 at 15:28, Christoffer Dall christoffer.d...@linaro.org wrote:
On Fri, Mar 06, 2015 at 03:34:39PM +0100, Ard Biesheuvel wrote:
The page size and the number of translation levels, and hence the supported
virtual address range, are build-time configurables on arm64 whose optimal
unnecessarily if the code
was exactly 1 page in size.
Tested-by: Marc Zyngier marc.zyng...@arm.com
Reviewed-by: Marc Zyngier marc.zyng...@arm.com
Signed-off-by: Ard Biesheuvel ard.biesheu...@linaro.org
---
arch/arm/kernel/vmlinux.lds.S | 26 ++---
arch/arm/kvm/init.S
marc.zyng...@arm.com
Signed-off-by: Ard Biesheuvel ard.biesheu...@linaro.org
---
arch/arm/kernel/vmlinux.lds.S | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index b31aa73e8076..2787eb8d3616 100644
--- a/arch
these two
tables into one.
Tested-by: Marc Zyngier marc.zyng...@arm.com
Reviewed-by: Marc Zyngier marc.zyng...@arm.com
Signed-off-by: Ard Biesheuvel ard.biesheu...@linaro.org
---
arch/arm/include/asm/kvm_mmu.h | 10 ++
arch/arm/kvm/mmu.c | 27 +--
arch
it as a single
series.
Ard Biesheuvel (3):
arm64: mm: increase VA range of identity map
ARM, arm64: kvm: get rid of the bounce page
arm64: KVM: use ID map with increased VA range if required
Arnd Bergmann (1):
ARM: KVM: avoid HYP init code too big error
arch/arm/include/asm/kvm_mmu.h | 10
for the identity mapping only, and only when actually needed, i.e.,
when system RAM's offset is found to be out of reach at runtime.
Tested-by: Laura Abbott lau...@codeaurora.org
Reviewed-by: Catalin Marinas catalin.mari...@arm.com
Tested-by: Marc Zyngier marc.zyng...@arm.com
Signed-off-by: Ard Biesheuvel
On 26 March 2015 at 19:45, Stefano Stabellini
stefano.stabell...@eu.citrix.com wrote:
On Thu, 26 Mar 2015, Andrew Jones wrote:
On Wed, Mar 25, 2015 at 10:44:42AM +0100, Andrew Jones wrote:
Hello ARM virt maintainers,
I'd like to start a discussion about supporting virt-what[1]. virt-what
On 26 March 2015 at 09:09, Riku Voipio riku.voi...@linaro.org wrote:
On 25 March 2015 at 21:32, Ard Biesheuvel ard.biesheu...@linaro.org wrote:
On 25 March 2015 at 17:14, Ard Biesheuvel ard.biesheu...@linaro.org wrote:
On 25 March 2015 at 17:14, Ard Biesheuvel ard.biesheu...@linaro.org wrote
On 14 April 2015 at 13:07, Christoffer Dall christoffer.d...@linaro.org wrote:
On Mon, Apr 13, 2015 at 11:04:00AM +0200, Ard Biesheuvel wrote:
On 27 March 2015 at 01:02, Ard Biesheuvel ard.biesheu...@linaro.org wrote:
On 26 March 2015 at 09:09, Riku Voipio riku.voi...@linaro.org wrote:
On 25
On 11 May 2015 at 11:05, Christoffer Dall christoffer.d...@linaro.org wrote:
On Sat, May 09, 2015 at 10:10:56PM +0200, Ard Biesheuvel wrote:
On 9 May 2015 at 22:07, Christoffer Dall christoffer.d...@linaro.org wrote:
On Fri, May 08, 2015 at 05:08:42PM +0100, Russell King wrote:
BSYM() should
On 9 May 2015 at 22:07, Christoffer Dall christoffer.d...@linaro.org wrote:
On Fri, May 08, 2015 at 05:08:42PM +0100, Russell King wrote:
BSYM() should only be used when refering to local symbols in the same
assembly file which are resolved by the assembler, and not for
linker-fixed up
On 14 May 2015 at 16:41, Michael S. Tsirkin m...@redhat.com wrote:
On Thu, May 14, 2015 at 04:19:23PM +0200, Laszlo Ersek wrote:
On 05/14/15 15:48, Michael S. Tsirkin wrote:
On Thu, May 14, 2015 at 03:32:10PM +0200, Laszlo Ersek wrote:
On 05/14/15 15:00, Andrew Jones wrote:
On Thu, May 14,
On 27 March 2015 at 01:02, Ard Biesheuvel ard.biesheu...@linaro.org wrote:
On 26 March 2015 at 09:09, Riku Voipio riku.voi...@linaro.org wrote:
On 25 March 2015 at 21:32, Ard Biesheuvel ard.biesheu...@linaro.org wrote:
On 25 March 2015 at 17:14, Ard Biesheuvel ard.biesheu...@linaro.org wrote
This fixes two instances where a pgprot_t is used as the operand
of a bitwise operation. In order to comply with STRICT_MM_TYPECHECKS,
bitwise arithmetic on a pgprot_t should go via the pgprot_val()
accessor.
Cc: kvmarm@lists.cs.columbia.edu
Signed-off-by: Ard Biesheuvel ard.biesheu
On 9 November 2015 at 17:21, Christoffer Dall
<christoffer.d...@linaro.org> wrote:
> On Fri, Nov 06, 2015 at 12:43:08PM +0100, Ard Biesheuvel wrote:
>> The open coded tests for checking whether a PTE maps a page as
>> uncached use a flawed 'pte_val(xxx) & CONST !=
On 9 November 2015 at 17:35, Christoffer Dall
<christoffer.d...@linaro.org> wrote:
> On Mon, Nov 09, 2015 at 05:27:40PM +0100, Ard Biesheuvel wrote:
>> On 9 November 2015 at 17:21, Christoffer Dall
>> <christoffer.d...@linaro.org> wrote:
>> > On Fri, N
(adding lists)
On 10 November 2015 at 10:45, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
> Hi all,
>
> I wonder if this is a better way to address the problem. It looks at
> the nature of the memory rather than the nature of the mapping, which
> is probably a mo
On 16 November 2015 at 14:11, Marc Zyngier wrote:
> Add the panic handler, together with the small bits of assembly
> code to call the kernel's panic implementation.
>
> Signed-off-by: Marc Zyngier
> ---
> arch/arm64/kvm/hyp/hyp-entry.S | 11
On 10 November 2015 at 13:22, Christoffer Dall
<christoffer.d...@linaro.org> wrote:
> On Tue, Nov 10, 2015 at 10:45:37AM +0100, Ard Biesheuvel wrote:
>> Hi all,
>>
>> I wonder if this is a better way to address the problem. It looks at
>> the nature of
On 10 November 2015 at 14:40, Christoffer Dall
<christoffer.d...@linaro.org> wrote:
> On Tue, Nov 10, 2015 at 02:15:45PM +0100, Ard Biesheuvel wrote:
>> On 10 November 2015 at 13:22, Christoffer Dall
>> <christoffer.d...@linaro.org> wrote:
>> > On Tue, N
Cc: Laszlo Ersek <ler...@redhat.com>
> Cc: Ard Biesheuvel <ard.biesheu...@linaro.org>
> Cc: Drew Jones <drjo...@redhat.com>
> Cc: Wei Huang <w...@redhat.com>
> Cc: Peter Maydell <peter.mayd...@linaro.org>
> Signed-off-by: Christoffer Dall <christoffer
s a spin on the FVP Base model to check UEFI booting,
and everything seems to work fine. (I tested 2-level and 3-level)
I didn't test the KVM changes, so for all patches except those:
Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
Tested-by: Ard Biesheuvel <ard.biesheu...@l
On 13 August 2015 at 19:29, Catalin Marinas wrote:
> On Thu, Aug 13, 2015 at 03:45:07PM +0100, Suzuki K. Poulose wrote:
>> On 13/08/15 13:28, Steve Capper wrote:
>> >On 13 August 2015 at 12:34, Suzuki K. Poulose
>> >wrote:
>> >> __enable_mmu:
>>
On 2 September 2015 at 11:48, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
> On 13 August 2015 at 19:29, Catalin Marinas <catalin.mari...@arm.com> wrote:
>> On Thu, Aug 13, 2015 at 03:45:07PM +0100, Suzuki K. Poulose wrote:
>>> On 13/08/15 13:28, Steve Capper
On 5 October 2015 at 14:02, Suzuki K. Poulose <suzuki.poul...@arm.com> wrote:
> On 02/10/15 16:49, Catalin Marinas wrote:
>>
>> On Tue, Sep 15, 2015 at 04:41:18PM +0100, Suzuki K. Poulose wrote:
>>>
>>> From: Ard Biesheuvel <ard.biesheu...@linaro.
Hi Pavel,
Thanks for getting to the bottom of this.
On 1 December 2015 at 14:03, Pavel Fedin wrote:
> This function takes stage-II physical addresses (A.K.A. IPA), on input, not
> real physical addresses. This causes kvm_is_device_pfn() to return wrong
> values, depending
On 2 December 2015 at 19:50, Christoffer Dall
wrote:
> On Tue, Dec 01, 2015 at 04:03:52PM +0300, Pavel Fedin wrote:
>> This function takes stage-II physical addresses (A.K.A. IPA), on input, not
>> real physical addresses. This causes kvm_is_device_pfn() to return
On 4 December 2015 at 02:58, Ben Hutchings <b...@decadent.org.uk> wrote:
> On Wed, 2015-12-02 at 18:41 +0100, Ard Biesheuvel wrote:
>> Hi Pavel,
>>
>> Thanks for getting to the bottom of this.
>>
>> On 1 December 2015 at 14:03, Pavel Fedin <p.fe...@sa
rly for a PTE's uncachedness")
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm/kvm/mmu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
index 7dace909d5cf..61d96a645ff3 100644
--- a/arch/arm/kvm/mmu.
On 3 December 2015 at 08:14, Pavel Fedin wrote:
> Hello!
>
>> > diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
>> > index 7dace90..51ad98f 100644
>> > --- a/arch/arm/kvm/mmu.c
>> > +++ b/arch/arm/kvm/mmu.c
>> > @@ -310,7 +310,8 @@ static void stage2_flush_ptes(struct
rly for a PTE's uncachedness")
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm/kvm/mmu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
index 7dace909d5cf..9708c342795f 100644
--- a/arch/arm/kvm/mmu.
PLEASE disregard, this patch is wrong. v2 coming up
On 3 December 2015 at 09:20, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
> Commit e6fab5442345 ("ARM/arm64: KVM: test properly for a PTE's
> uncachedness") modified the logic to test whether a HYP or stage-2
> map
On 24 June 2016 at 16:04, Ard Biesheuvel <ard.biesheu...@linaro.org> wrote:
[...]
> Note that this issue not only affects framebuffers on PCI cards, it
> also affects emulated USB host controllers (perhaps Alex can remind us
> which one exactly?)
Actually, looking at the QEMU so
On 28 January 2016 at 21:12, Chris Metcalf wrote:
> On 01/27/2016 04:12 AM, Marc Zyngier wrote:
>>
>> On 26/01/16 20:43, Chris Metcalf wrote:
>>>
>>> On 01/18/2016 04:28 AM, Marc Zyngier wrote:
Hi Chris,
On 15/01/16 20:02, Chris Metcalf wrote:
>
>
On 1 February 2016 at 17:20, Marc Zyngier wrote:
> On 01/02/16 15:36, Catalin Marinas wrote:
>> On Mon, Feb 01, 2016 at 01:34:16PM +, Marc Zyngier wrote:
>>> On 01/02/16 13:16, Christoffer Dall wrote:
On Mon, Jan 25, 2016 at 03:53:40PM +, Marc Zyngier wrote:
macro on one.
That was the whoie point of the opaque struct type in the original
patch that introduced this macro, to disallow references lacking the
&, but unfortunately, that was incompatible with the other VHE
changes.
With that fixed
Acked-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
<marc.zyng...@arm.com>
Acked-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
> ---
> Catalin,
>
> Would you mind merging this on top of arm64/for-next/core? I just
> verified that this prevents yet another mismerge between the arm64 and
> KVM trees.
>
> Thanks,
On 26 July 2016 at 09:34, Shannon Zhao wrote:
> Hi,
>
> Recently I'm trying to use usb keyboard and mouse with QEMU on ARM64. Below
> is my QEMU command line,
> host and guest kernel both are 4.7.0-rc7+, and I ran it on Hikey board.
>
> qemu-system-aarch64 \
>
On 27 June 2016 at 15:35, Christoffer Dall <christoffer.d...@linaro.org> wrote:
> On Mon, Jun 27, 2016 at 02:30:46PM +0200, Ard Biesheuvel wrote:
>> On 27 June 2016 at 12:34, Christoffer Dall <christoffer.d...@linaro.org>
>> wrote:
>> > On Mon, Jun 27, 2016
On 27 June 2016 at 12:34, Christoffer Dall <christoffer.d...@linaro.org> wrote:
> On Mon, Jun 27, 2016 at 11:47:18AM +0200, Ard Biesheuvel wrote:
>> On 27 June 2016 at 11:16, Christoffer Dall <christoffer.d...@linaro.org>
>> wrote:
>> > Hi,
>> >
>
On 27 June 2016 at 11:16, Christoffer Dall <christoffer.d...@linaro.org> wrote:
> Hi,
>
> I'm going to ask some stupid questions here...
>
> On Fri, Jun 24, 2016 at 04:04:45PM +0200, Ard Biesheuvel wrote:
>> Hi all,
>>
>> This old subject came up again
; On Mon, Jun 27, 2016 at 03:57:28PM +0200, Ard Biesheuvel wrote:
>> > >> So if vga-pci.c is the only problematic device, for which a reasonable
>> > >> alternative exists (virtio-gpu), I think the only feasible solution is
>> > >> to educate QEMU not to
On 30 June 2016 at 12:16, Marc Zyngier wrote:
> On 30/06/16 10:22, Marc Zyngier wrote:
>> On 28/06/16 13:42, Christoffer Dall wrote:
>>> On Tue, Jun 07, 2016 at 11:58:25AM +0100, Marc Zyngier wrote:
As we move towards a selectable HYP VA range, it is obvious that
On 30 June 2016 at 13:02, Marc Zyngier <marc.zyng...@arm.com> wrote:
> On 30/06/16 11:42, Ard Biesheuvel wrote:
>> On 30 June 2016 at 12:16, Marc Zyngier <marc.zyng...@arm.com> wrote:
>>> On 30/06/16 10:22, Marc Zyngier wrote:
>>>> On 28/06/16 13:42, Ch
On 28 June 2016 at 12:55, Laszlo Ersek <ler...@redhat.com> wrote:
> On 06/27/16 12:34, Christoffer Dall wrote:
>> On Mon, Jun 27, 2016 at 11:47:18AM +0200, Ard Biesheuvel wrote:
>
>>> So first of all, let me reiterate that I could only find a single
>>> inst
On 17 February 2017 at 15:44, Marc Zyngier wrote:
> In order to restore HYP mode to its original condition, KVM currently
> implements __kvm_hyp_reset(). As we're moving towards a hyp-stub
> defined API, it becomes necessary to implement HVC_RESET_VECTORS.
>
> This patch
On 17 February 2017 at 15:44, Marc Zyngier wrote:
> In order to restore HYP mode to its original condition, KVM currently
> implements __kvm_hyp_reset(). As we're moving towards a hyp-stub
> defined API, it becomes necessary to implement HVC_RESET_VECTORS.
>
> This patch
On 17 February 2017 at 15:44, Marc Zyngier wrote:
> It is not really obvious why the restart address should be in r3
> when communicated to the hyp-stub. r1 should be perfectly adequate,
> and consistent with the rest of the code.
>
> Signed-off-by: Marc Zyngier
, and the linear alias of the init region is always mapped writable
(but never executable).
Since the alternatives descriptions themselves are read-only data, move
those into the .init.text region.
Reviewed-by: Laura Abbott <labb...@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheu...@l
between the segments results in a peculiar situation where other unrelated
allocations end up right in the middle of the kernel Image, which is
probably a bad idea (#5). See below for an example.
- add acks
Ard Biesheuvel (5):
arm: kvm: move kvm_vgic_global_state out of .text section
arm64
Zyngier <marc.zyng...@arm.com>
Reviewed-by: Laura Abbott <labb...@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
virt/kvm/arm/vgic/vgic.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm
appropriate here.
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/mm/mmu.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 2131521ddc24..9e0ec1a8cd3b 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/ar
patching has completed.
Reviewed-by: Laura Abbott <labb...@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/include/asm/mmu.h| 1 +
arch/arm64/kernel/alternative.c | 2 +-
arch/arm64/kernel/smp.c | 1 +
arch/arm64/mm/mmu.c
<keesc...@chromium.org>
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/mm/mmu.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 7ed981c7f4c0..e97f1ce967ec 100644
--- a/arch/arm64/mm/mmu.c
+
> On 10 Feb 2017, at 18:49, Suzuki K Poulose <suzuki.poul...@arm.com> wrote:
>
>> On 10/02/17 17:16, Ard Biesheuvel wrote:
>> One important rule of thumb when designing a secure software system is
>> that memory should never be writable and executable at the
by:
- making the alternatives patching use the linear mapping
- splitting the init region into separate text and data regions
This removes all RWX mappings except the really early one created
in head.S (which we could perhaps fix in the future as well)
Ard Biesheuvel (4):
arm: kvm: move
patching has completed.
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/include/asm/mmu.h| 1 +
arch/arm64/kernel/alternative.c | 6 ++---
arch/arm64/kernel/smp.c | 1 +
arch/arm64/mm/mmu.c | 25
4 files changed, 25 inse
Now that alternatives patching code no longer relies on the primary
mapping of .text being writable, we can remove the code that removes
the writable permissions post-init time, and map it read-only from
the outset.
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/ar
mapping entirely.
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/include/asm/sections.h | 3 +-
arch/arm64/kernel/vmlinux.lds.S | 32 ++--
arch/arm64/mm/init.c | 3 +-
arch/arm64/mm/mmu.c | 12 +---
4 files chang
> On 14 Feb 2017, at 15:57, Mark Rutland <mark.rutl...@arm.com> wrote:
>
>> On Sat, Feb 11, 2017 at 08:23:05PM +0000, Ard Biesheuvel wrote:
>> Now that alternatives patching code no longer relies on the primary
>> mapping of .text being writable, we ca
> On 14 Feb 2017, at 17:40, Mark Rutland <mark.rutl...@arm.com> wrote:
>
>> On Tue, Feb 14, 2017 at 04:15:11PM +0000, Ard Biesheuvel wrote:
>>
>>>> On 14 Feb 2017, at 15:57, Mark Rutland <mark.rutl...@arm.com> wrote:
>>>>
>>>&
-by: Mark Rutland <mark.rutl...@arm.com>
Tested-by: Mark Rutland <mark.rutl...@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/mm/mmu.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/mm/mmu.c b/arch/ar
patching has completed.
Reviewed-by: Laura Abbott <labb...@redhat.com>
Reviewed-by: Mark Rutland <mark.rutl...@arm.com>
Tested-by: Mark Rutland <mark.rutl...@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/include/asm/mmu.h| 1 +
arch/ar
, and the linear alias of the init region is always mapped writable
(but never executable).
Since the alternatives descriptions themselves are read-only data, move
those into the .init.text region.
Reviewed-by: Laura Abbott <labb...@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheu...@l
of the kernel Image, which is
probably a bad idea (#5). See below for an example.
- add acks
Ard Biesheuvel (5):
arm: kvm: move kvm_vgic_global_state out of .text section
arm64: mmu: move TLB maintenance from callers to create_mapping_late()
arm64: alternatives: apply boot time fixups via
Zyngier <marc.zyng...@arm.com>
Reviewed-by: Laura Abbott <labb...@redhat.com>
Reviewed-by: Mark Rutland <mark.rutl...@arm.com>
Tested-by: Mark Rutland <mark.rutl...@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
virt/kvm/arm/vgic/vgic.c | 4 +++-
ovides more detail on for processor error logs.
>
> Signed-off-by: Tyler Baicar <tbai...@codeaurora.org>
> Signed-off-by: Jonathan (Zhixiong) Zhang <zjzh...@codeaurora.org>
> Signed-off-by: Naveen Kaje <nk...@codeaurora.org>
> Reviewed-by: James Morse <james.mo
On 15 February 2017 at 19:51, Tyler Baicar wrote:
> ARM APEI extension proposal added SEA (Synchronous External Abort)
> notification type for ARMv8.
> Add a new GHES error source handling function for SEA. If an error
> source's notification type is SEA, then this
a.org>
> Reviewed-by: James Morse <james.mo...@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
> ---
> drivers/acpi/apei/ghes.c| 9 ---
> drivers/firmware/efi/cper.c | 63
> +++--
> include/acpi/
On 16 September 2016 at 13:44, Alexander Graf wrote:
>
>> On 16 Sep 2016, at 14:40, Paolo Bonzini wrote:
>>
>>
>>
>> On 16/09/2016 14:29, Christoffer Dall wrote:
It may be useful for migrating a gicv2 VM to a gicv3 host without gicv2
emulation as
On 17 September 2016 at 16:38, Peter Maydell <peter.mayd...@linaro.org> wrote:
> On 17 September 2016 at 16:28, Ard Biesheuvel <ard.biesheu...@linaro.org>
> wrote:
>> Another thing to keep in mind is that GICv2
>> compatibility is disabled on the non-secure sid
> make sure that the FP/ASIMD is supported.
>
> Cc: Catalin Marinas <catalin.mari...@arm.com>
> Cc: Will Deacon <will.dea...@arm.com>
> Cc: Christoffer Dall <christoffer.d...@linaro.org>
> Cc: Marc Zyngier <marc.zyng...@arm.com>
> Cc: Ard Biesheuvel
On 9 March 2017 at 20:33, Mark Rutland <mark.rutl...@arm.com> wrote:
> On Thu, Mar 09, 2017 at 09:25:12AM +0100, Ard Biesheuvel wrote:
>> +static inline u64 pte_cont_addr_end(u64 addr, u64 end)
>> +{
>> + return min((addr + CONT_PTE_SIZE) & CONT_PTE_MASK, end);
&
-by: Mark Rutland <mark.rutl...@arm.com>
Tested-by: Mark Rutland <mark.rutl...@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/mm/mmu.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/mm/mmu.c b/arch/ar
Zyngier <marc.zyng...@arm.com>
Reviewed-by: Laura Abbott <labb...@redhat.com>
Reviewed-by: Mark Rutland <mark.rutl...@arm.com>
Tested-by: Mark Rutland <mark.rutl...@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
virt/kvm/arm/vgic/vgic.c | 4 +++-
, and the linear alias of the init region is always mapped writable
(but never executable).
Since the alternatives descriptions themselves are read-only data, move
those into the .init.text region.
Reviewed-by: Laura Abbott <labb...@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheu...@l
configuration only consists of PGDs and PTEs, and the
added complexity of dealing with folded PMDs is not justified considering
that 16 GB contiguous ranges are likely to be ignored by the hardware (and
16k/2 levels is a niche configuration)
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.
patching has completed.
Reviewed-by: Laura Abbott <labb...@redhat.com>
Reviewed-by: Mark Rutland <mark.rutl...@arm.com>
Tested-by: Mark Rutland <mark.rutl...@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/include/asm/mmu.h| 1 +
arch/ar
by external debuggers to manage software breakpoints (as pointed
out by Mark), add an early_param() check for rodata=, and use RWX
permissions if it set to 'off'.
Reviewed-by: Laura Abbott <labb...@redhat.com>
Reviewed-by: Kees Cook <keesc...@chromium.org>
Signed-off-by: Ard Biesheuvel
In preparation of extending the policy for manipulating kernel mappings
with whether or not contiguous hints may be used in the page tables,
replace the bool 'page_mappings_only' with a flags field and a flag
NO_BLOCK_MAPPINGS.
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
configuration only consists of PGDs and PTEs, and the
added complexity of dealing with folded PMDs is not justified considering
that 16 GB contiguous ranges are likely to be ignored by the hardware (and
16k/2 levels is a niche configuration)
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.
-by: Mark Rutland <mark.rutl...@arm.com>
Tested-by: Mark Rutland <mark.rutl...@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/mm/mmu.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/mm/mmu.c b/arch/ar
patching has completed.
Reviewed-by: Laura Abbott <labb...@redhat.com>
Reviewed-by: Mark Rutland <mark.rutl...@arm.com>
Tested-by: Mark Rutland <mark.rutl...@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/include/asm/mmu.h| 1 +
arch/ar
Zyngier <marc.zyng...@arm.com>
Reviewed-by: Laura Abbott <labb...@redhat.com>
Reviewed-by: Mark Rutland <mark.rutl...@arm.com>
Tested-by: Mark Rutland <mark.rutl...@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
virt/kvm/arm/vgic/vgic.c | 4 +++-
commit log of #2
- add acks
Ard Biesheuvel (10):
arm: kvm: move kvm_vgic_global_state out of .text section
arm64: mmu: move TLB maintenance from callers to create_mapping_late()
arm64: alternatives: apply boot time fixups via the linear mapping
arm64: mmu: map .text as read-only from
rutl...@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/mm/mmu.c | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index df377fbe464e..300e98e8cd63 100644
--- a/arch/arm64/mm/m
A mapping with the contiguous bit cannot be safely manipulated while
live, regardless of whether the bit changes between the old and new
mapping. So take this into account when deciding whether the change
is safe.
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/mm
can use block mappings unconditionally.
Note that this applies equally to the linear alias of text/rodata:
we will never have dynamic allocations there given that the same
memory is statically in use by the kernel image.
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/ar
;
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/include/asm/sections.h | 2 ++
arch/arm64/kernel/vmlinux.lds.S | 25 +---
arch/arm64/mm/mmu.c | 12 ++
3 files changed, 26 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/incl
Align the function prototype of alloc_init_pte() with its pmd and pud
counterparts by replacing the pfn parameter with the equivalent physical
address.
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/mm/mmu.c | 8
1 file changed, 4 insertions(+), 4 del
On 7 March 2017 at 17:46, Mark Rutland <mark.rutl...@arm.com> wrote:
> Hi,
>
> On Sat, Mar 04, 2017 at 02:30:48PM +, Ard Biesheuvel wrote:
>> This is the third attempt at enabling the use of contiguous hints for
>> kernel mappings. The most recent attempt 0bfc
On 24 April 2017 at 18:00, Will Deacon wrote:
> Hi Matthias,
>
> On Thu, Apr 20, 2017 at 11:30:53AM -0700, Matthias Kaehlcke wrote:
>> Many inline assembly statements don't include the 'x' modifier when
>> using xN registers as operands. This is perfectly valid, however it
>>
_flag(TIF_FOREIGN_FPSTATE);
> + }
>
> /* Invalidate any task state remaining in the fpsimd regs: */
> __this_cpu_write(fpsimd_last_state, NULL);
Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
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Hi Dave,
On 9 August 2017 at 13:05, Dave Martin wrote:
> This patch adds the core support for switching and managing the SVE
> architectural state of user tasks.
>
> Calls to the existing FPSIMD low-level save/restore functions are
> factored out as new functions
e_used))) {
> + char const *sve_state = this_cpu_ptr(efi_sve_state);
> +
> + sve_load_state(sve_state + sve_ffr_offset(sve_max_vl),
> + _cpu_ptr(_fpsimd_state)->fpsr,
&g
is verbosity isn't strictly needed.
>
> For consistency, this patch simplifies the affected calls. This
> should have no impact on behaviour.
>
> Signed-off-by: Dave Martin <dave.mar...@arm.com>
Acked-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
> ---
> arch/ar
On 9 August 2017 at 22:05, Tony Lindgren <t...@atomide.com> wrote:
> * Ard Biesheuvel <ard.biesheu...@linaro.org> [170809 12:24]:
>> On 9 August 2017 at 20:05, Tony Lindgren <t...@atomide.com> wrote:
>> > * Ard Biesheuvel <ard.biesheu...@linaro.org> [1
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