Re: libvirt-6.5.0 breaks host passthrough migration

2020-07-10 Thread Jiri Denemark
On Sun, Jul 05, 2020 at 12:45:55 -0400, Mark Mielke wrote:
> Hi all:
> 
> With 6.4.0, live migration was working fine with Qemu 5.0. After trying out
> 6.5.0, migration broke with the following error:
> 
> libvirt.libvirtError: internal error: unable to execute QEMU command
> 'migrate': State blocked by non-migratable CPU device (invtsc flag)

Could you please describe the reproducer steps? For example, was the
domain you're trying to migrate already running when you upgrade libvirt
or is it freshly started by the new libvirt?

And it would be helpful to see the  element as shown by virsh
dumpxml before you try to start the domain as well as the QEMU command
line libvirt used to start the domain (in
/var/log/libvirt/qemu/$VM.log).

> I believe I traced the error back to this commit:
> 
> commit 201bd5db639c063862b0c1b1abfab9a9a7c92591
> Author: Jiri Denemark 
> Date:   Tue Jun 2 15:34:07 2020 +0200
> 
> qemu: Fill default value in //cpu/@migratable attribute
> 
> Before QEMU introduced migratable CPU property, "-cpu host" included all
> features that could be enabled on the host, even those which would block
> migration. In other words, the default was equivalent to migratable=off.
> When the migratable property was introduced, the default changed to
> migratable=on. Let's record the default in domain XML.
> 
> Signed-off-by: Jiri Denemark 
> Reviewed-by: Michal Privoznik 
> 
> 
> Before this change, qemu was still being launched with "-cpu host", which
> for any somewhat modern version of qemu, defaults to migratable=on. The
> above comment acknowledges this, however, the implementation chooses the
> pessimistic and ancient (and no longer applicable!) value of migratable=off:
> 
> +if (qemuCaps &&
> +def->cpu->mode == VIR_CPU_MODE_HOST_PASSTHROUGH &&
> +!def->cpu->migratable) {
> +if (virQEMUCapsGet(qemuCaps, QEMU_CAPS_CPU_MIGRATABLE))
> +def->cpu->migratable = VIR_TRISTATE_SWITCH_ON;
> 
> *+else if (ARCH_IS_X86(def->os.arch))+
>  def->cpu->migratable = VIR_TRISTATE_SWITCH_OFF;*
> +}

The implementation seems to be doing exactly what the commit message
says. The migratable=off default should be used only when QEMU does not
support -cpu host,migratable=on|off, that is only when QEMU is very old.
Every non-ancient version of libvirt should have the
QEMU_CAPS_CPU_MIGRATABLE set and thus this code should choose
migrateble=on default.

> I think it is not a requirement for "migratable=XXX" to be explicit in
> libvirt. However, if there is some reason I am unaware of, and it is
> important for libvirt to know, then I think it is important for libvirt to
> find out the authoritative state rather than guessing.

Explicit defaults are always better for two reasons: they are visible to
users and they don't silently change.

Jirka



[libvirt PATCH 3/4] cpu_map: Add missing x86 features in 0x80000008 CPUID leaf

2020-06-17 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/cpu_map/x86_features.xml| 6 ++
 tests/cputestdata/x86_64-cpuid-Cooperlake-enabled.xml   | 2 +-
 tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml  | 1 +
 .../cputestdata/x86_64-cpuid-EPYC-7601-32-Core-disabled.xml | 2 +-
 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-guest.xml  | 1 +
 tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-host.xml   | 1 +
 .../x86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml| 2 +-
 .../x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml   | 1 +
 .../x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml| 1 +
 .../x86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml| 2 +-
 .../x86_64-cpuid-Hygon-C86-7185-32-core-guest.xml   | 1 +
 .../x86_64-cpuid-Hygon-C86-7185-32-core-host.xml| 1 +
 .../x86_64-cpuid-Ryzen-7-1800X-Eight-Core-disabled.xml  | 2 +-
 .../x86_64-cpuid-Ryzen-7-1800X-Eight-Core-guest.xml | 1 +
 .../x86_64-cpuid-Ryzen-7-1800X-Eight-Core-host.xml  | 1 +
 .../x86_64-cpuid-Ryzen-9-3900X-12-Core-disabled.xml | 1 +
 .../x86_64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml  | 2 +-
 .../x86_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml| 2 ++
 .../cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml | 2 ++
 .../cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-json.xml | 1 +
 tests/domaincapsdata/qemu_5.1.0-q35.x86_64.xml  | 2 ++
 tests/domaincapsdata/qemu_5.1.0.x86_64.xml  | 2 ++
 22 files changed, 31 insertions(+), 6 deletions(-)

diff --git a/src/cpu_map/x86_features.xml b/src/cpu_map/x86_features.xml
index 81d1ad5c69..cb250555f6 100644
--- a/src/cpu_map/x86_features.xml
+++ b/src/cpu_map/x86_features.xml
@@ -493,12 +493,18 @@
   
 
   
+  
+
+  
   
 
   
   
 
   
+  
+
+  
   
 
   
diff --git a/tests/cputestdata/x86_64-cpuid-Cooperlake-enabled.xml 
b/tests/cputestdata/x86_64-cpuid-Cooperlake-enabled.xml
index 2d7f83c80f..1d91c3efa8 100644
--- a/tests/cputestdata/x86_64-cpuid-Cooperlake-enabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-Cooperlake-enabled.xml
@@ -6,6 +6,6 @@
   
   
   
-  
+  
   
 
diff --git a/tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml 
b/tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml
index fb319d547c..c89e0e5350 100644
--- a/tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml
+++ b/tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml
@@ -10,6 +10,7 @@
   
   
   
+  
   
   
 
diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-disabled.xml
index d9045c88d5..c26c9c7be3 100644
--- a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-disabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-disabled.xml
@@ -4,5 +4,5 @@
   
   
   
-  
+  
 
diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-guest.xml 
b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-guest.xml
index b75196aac5..612e571609 100644
--- a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-guest.xml
+++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-guest.xml
@@ -14,4 +14,5 @@
   
   
   
+  
 
diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-host.xml 
b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-host.xml
index fd84b526db..7498d924e2 100644
--- a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-host.xml
+++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-host.xml
@@ -15,4 +15,5 @@
   
   
   
+  
 
diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml
index 429d84d031..a7f4fa3f01 100644
--- a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml
@@ -4,5 +4,5 @@
   
   
   
-  
+  
 
diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml 
b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml
index 5044c8cc35..96fdea306f 100644
--- a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml
+++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml
@@ -14,5 +14,6 @@
   
   
   
+  
   
 
diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml 
b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml
index d7d5ce88d9..4fff74f3aa 100644
--- a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml
+++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml
@@ -15,4 +15,5 @@
   
   
   
+  
 
diff --git a/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml
index d9045c88d5..c26c9c7be3 100644
--- a/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml
@@ -4,5 +4,5 @@
   
   
   
-  
+  
 
diff --git a/tests/cputestdata

[libvirt PATCH 4/4] cpu_map: Add missing AMD SVM features

2020-06-17 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/cpu_map/x86_features.xml  | 32 +++
 .../x86_64-cpuid-A10-5800K-disabled.xml   |  1 +
 .../x86_64-cpuid-A10-5800K-enabled.xml|  1 +
 .../x86_64-cpuid-A10-5800K-guest.xml  | 10 ++
 .../x86_64-cpuid-A10-5800K-host.xml   | 10 ++
 .../x86_64-cpuid-A10-5800K-json.xml   |  2 ++
 ...86_64-cpuid-EPYC-7601-32-Core-disabled.xml |  1 +
 ...x86_64-cpuid-EPYC-7601-32-Core-enabled.xml |  1 +
 .../x86_64-cpuid-EPYC-7601-32-Core-guest.xml  | 10 ++
 .../x86_64-cpuid-EPYC-7601-32-Core-host.xml   | 10 ++
 ...-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml |  1 +
 ...4-cpuid-EPYC-7601-32-Core-ibpb-enabled.xml |  1 +
 ..._64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml | 10 ++
 ...6_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml | 10 ++
 ...6_64-cpuid-EPYC-7601-32-Core-ibpb-json.xml |  2 ++
 .../x86_64-cpuid-EPYC-7601-32-Core-json.xml   |  2 ++
 .../x86_64-cpuid-FX-8150-guest.xml| 10 ++
 .../cputestdata/x86_64-cpuid-FX-8150-host.xml | 10 ++
 ...-cpuid-Hygon-C86-7185-32-core-disabled.xml |  1 +
 ...4-cpuid-Hygon-C86-7185-32-core-enabled.xml |  1 +
 ..._64-cpuid-Hygon-C86-7185-32-core-guest.xml | 10 ++
 ...6_64-cpuid-Hygon-C86-7185-32-core-host.xml | 10 ++
 ...6_64-cpuid-Hygon-C86-7185-32-core-json.xml |  2 ++
 .../x86_64-cpuid-Opteron-1352-guest.xml   |  3 ++
 .../x86_64-cpuid-Opteron-1352-host.xml|  3 ++
 .../x86_64-cpuid-Opteron-2350-disabled.xml|  1 +
 .../x86_64-cpuid-Opteron-2350-enabled.xml |  1 +
 .../x86_64-cpuid-Opteron-2350-guest.xml   |  3 ++
 .../x86_64-cpuid-Opteron-2350-host.xml|  3 ++
 .../x86_64-cpuid-Opteron-2350-json.xml|  1 +
 .../x86_64-cpuid-Opteron-6234-disabled.xml|  1 +
 .../x86_64-cpuid-Opteron-6234-enabled.xml |  1 +
 .../x86_64-cpuid-Opteron-6234-guest.xml   | 10 ++
 .../x86_64-cpuid-Opteron-6234-host.xml| 10 ++
 .../x86_64-cpuid-Opteron-6234-json.xml|  2 ++
 .../x86_64-cpuid-Opteron-6282-guest.xml   | 10 ++
 .../x86_64-cpuid-Opteron-6282-host.xml| 10 ++
 .../x86_64-cpuid-Phenom-B95-disabled.xml  |  1 +
 .../x86_64-cpuid-Phenom-B95-enabled.xml   |  1 +
 .../x86_64-cpuid-Phenom-B95-guest.xml |  4 +++
 .../x86_64-cpuid-Phenom-B95-host.xml  |  4 +++
 .../x86_64-cpuid-Phenom-B95-json.xml  |  2 ++
 ...puid-Ryzen-7-1800X-Eight-Core-disabled.xml |  1 +
 ...cpuid-Ryzen-7-1800X-Eight-Core-enabled.xml |  1 +
 ...4-cpuid-Ryzen-7-1800X-Eight-Core-guest.xml | 10 ++
 ...64-cpuid-Ryzen-7-1800X-Eight-Core-host.xml | 10 ++
 ...64-cpuid-Ryzen-7-1800X-Eight-Core-json.xml |  2 ++
 ...4-cpuid-Ryzen-9-3900X-12-Core-disabled.xml |  1 +
 ...64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml |  1 +
 ...6_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml | 10 ++
 ...86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml | 10 ++
 ...86_64-cpuid-Ryzen-9-3900X-12-Core-json.xml |  2 ++
 .../domaincapsdata/qemu_3.0.0-tcg.x86_64.xml  |  1 +
 .../domaincapsdata/qemu_3.1.0-tcg.x86_64.xml  |  1 +
 .../domaincapsdata/qemu_4.0.0-tcg.x86_64.xml  |  2 ++
 .../domaincapsdata/qemu_4.1.0-tcg.x86_64.xml  |  2 ++
 .../domaincapsdata/qemu_4.2.0-tcg.x86_64.xml  |  2 ++
 .../domaincapsdata/qemu_5.0.0-tcg.x86_64.xml  |  2 ++
 .../domaincapsdata/qemu_5.1.0-q35.x86_64.xml  |  2 ++
 .../domaincapsdata/qemu_5.1.0-tcg.x86_64.xml  |  2 ++
 tests/domaincapsdata/qemu_5.1.0.x86_64.xml|  2 ++
 .../cpu-host-model-cmt.x86_64-4.0.0.args  |  6 ++--
 62 files changed, 286 insertions(+), 3 deletions(-)

diff --git a/src/cpu_map/x86_features.xml b/src/cpu_map/x86_features.xml
index cb250555f6..a55f52b16c 100644
--- a/src/cpu_map/x86_features.xml
+++ b/src/cpu_map/x86_features.xml
@@ -515,6 +515,38 @@
 
   
 
+  
+  
+
+  
+  
+
+  
+  
+
+  
+  
+
+  
+  
+
+  
+  
+
+  
+  
+
+  
+  
+
+  
+  
+
+  
+  
+
+  
+
   
   
 
diff --git a/tests/cputestdata/x86_64-cpuid-A10-5800K-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-A10-5800K-disabled.xml
index 6ed5b3573b..3bacf2cf95 100644
--- a/tests/cputestdata/x86_64-cpuid-A10-5800K-disabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-A10-5800K-disabled.xml
@@ -3,4 +3,5 @@
   
   
   
+  
 
diff --git a/tests/cputestdata/x86_64-cpuid-A10-5800K-enabled.xml 
b/tests/cputestdata/x86_64-cpuid-A10-5800K-enabled.xml
index 5cae0b7130..f6afbe2cb3 100644
--- a/tests/cputestdata/x86_64-cpuid-A10-5800K-enabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-A10-5800K-enabled.xml
@@ -3,4 +3,5 @@
   
   
   
+  
 
diff --git a/tests/cputestdata/x86_64-cpuid-A10-5800K-guest.xml 
b/tests/cputestdata/x86_64-cpuid-A10-5800K-guest.xml
index 98a95e1c41..8401e53d30 100644
--- a/tests/cputestdata/x86_64-cpuid-A10-5800K-guest.xml
+++ b/tests/cputestdata/x86_64-cpuid-A10-5800K-guest.xml
@@ -22,4 +22,14 @@
   
   
   
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
 
diff --git a/tests/cputestdata/x86_64-cpuid-A10-5800K-host.xml 
b/tests/cputestdata/x86_64

[libvirt PATCH 1/4] cpu_map: Request test files update when adding x86 features

2020-06-17 Thread Jiri Denemark
The CPUID data in *-{disabled,enabled}.xml convert feature names from
the corresponding *.json file into raw CPUID and MSR data and thus some
of them may need to be updated when new features are added into the CPU
map.

Signed-off-by: Jiri Denemark 
---
 src/cpu_map/x86_features.xml   | 7 +++
 tests/cputestdata/x86_64-cpuid-Core-i5-6600-disabled.xml   | 1 +
 .../x86_64-cpuid-Core-i7-5600U-arat-disabled.xml   | 1 +
 tests/cputestdata/x86_64-cpuid-Core-i7-5600U-disabled.xml  | 1 +
 .../x86_64-cpuid-Core-i7-5600U-ibrs-disabled.xml   | 2 +-
 tests/cputestdata/x86_64-cpuid-Core-i7-7700-disabled.xml   | 1 +
 .../x86_64-cpuid-EPYC-7601-32-Core-disabled.xml| 1 +
 .../x86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml   | 1 +
 .../x86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml   | 1 +
 .../x86_64-cpuid-Ryzen-7-1800X-Eight-Core-disabled.xml | 1 +
 .../cputestdata/x86_64-cpuid-Xeon-E3-1245-v5-disabled.xml  | 1 +
 .../cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-disabled.xml  | 2 +-
 .../cputestdata/x86_64-cpuid-Xeon-E5-2650-v4-disabled.xml  | 2 +-
 tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-disabled.xml | 2 +-
 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6148-disabled.xml | 2 +-
 .../x86_64-cpuid-Xeon-Platinum-8268-disabled.xml   | 3 ++-
 16 files changed, 23 insertions(+), 6 deletions(-)

diff --git a/src/cpu_map/x86_features.xml b/src/cpu_map/x86_features.xml
index 8525ae0fa5..e91a7b5055 100644
--- a/src/cpu_map/x86_features.xml
+++ b/src/cpu_map/x86_features.xml
@@ -1,3 +1,10 @@
+
 
   
   
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i5-6600-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-Core-i5-6600-disabled.xml
index 510cd97a5b..040c0df183 100644
--- a/tests/cputestdata/x86_64-cpuid-Core-i5-6600-disabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-Core-i5-6600-disabled.xml
@@ -1,5 +1,6 @@
 
 
   
+  
   
 
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-arat-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-arat-disabled.xml
index 601554a815..edce01618a 100644
--- a/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-arat-disabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-arat-disabled.xml
@@ -2,5 +2,6 @@
 
   
   
+  
   
 
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-disabled.xml
index 4a0477f788..fa9571c29d 100644
--- a/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-disabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-disabled.xml
@@ -1,5 +1,6 @@
 
 
   
+  
   
 
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-disabled.xml
index 5c9cfa9bd6..91ae45d24b 100644
--- a/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-disabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-disabled.xml
@@ -1,6 +1,6 @@
 
 
   
-  
+  
   
 
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-7700-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-Core-i7-7700-disabled.xml
index fcdcc97e0e..ce51903e53 100644
--- a/tests/cputestdata/x86_64-cpuid-Core-i7-7700-disabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-Core-i7-7700-disabled.xml
@@ -1,6 +1,7 @@
 
 
   
+  
   
   
 
diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-disabled.xml
index 747d725acf..d9045c88d5 100644
--- a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-disabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-disabled.xml
@@ -4,4 +4,5 @@
   
   
   
+  
 
diff --git a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml
index af43fca98d..429d84d031 100644
--- a/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml
@@ -4,4 +4,5 @@
   
   
   
+  
 
diff --git a/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml
index 747d725acf..d9045c88d5 100644
--- a/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml
@@ -4,4 +4,5 @@
   
   
   
+  
 
diff --git 
a/tests/cputestdata/x86_64-cpuid-Ryzen-7-1800X-Eight-Core-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-Ryzen-7-1800X-Eight-Core-disabled.xml
index b085050618..7dbacf982d 100644
--- a/tests/cputestdata/x86_64-cpuid-Ryzen-7-1800X-Eight-Core-disabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-Ryzen-7-1800X-Eight-Core-disabled.xml
@@ -5,4 +5,5 @@
   
   
   
+  
 
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E3-1245-v5-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-Xeon-E3-1245-v5-disabled.xml
index 4a0477f788..fa9571c29d 100644
--- a/tests/cputestdata/x86_64-cpuid-Xeon-E3-1245-v5-disabled.xml
+++ b/tests/cputestdata/x86_64

[libvirt PATCH 2/4] cpu_map: Add missing x86 features in 0x7 CPUID leaf

2020-06-17 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/cpu_map/x86_features.xml | 12 
 .../x86_64-cpuid-Ice-Lake-Server-disabled.xml|  2 +-
 .../x86_64-cpuid-Ice-Lake-Server-guest.xml   |  1 +
 .../x86_64-cpuid-Ice-Lake-Server-host.xml|  1 +
 .../x86_64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml   |  2 +-
 .../x86_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml |  1 +
 .../x86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml  |  1 +
 .../x86_64-cpuid-Ryzen-9-3900X-12-Core-json.xml  |  1 +
 tests/domaincapsdata/qemu_5.1.0-q35.x86_64.xml   |  1 +
 tests/domaincapsdata/qemu_5.1.0.x86_64.xml   |  1 +
 10 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/src/cpu_map/x86_features.xml b/src/cpu_map/x86_features.xml
index e91a7b5055..81d1ad5c69 100644
--- a/src/cpu_map/x86_features.xml
+++ b/src/cpu_map/x86_features.xml
@@ -293,6 +293,9 @@
   
 
   
+  
+
+  
   
 
   
@@ -317,9 +320,18 @@
   
 
   
+  
+
+  
   
 
   
+  
+
+  
+  
+
+  
 
   
 
diff --git a/tests/cputestdata/x86_64-cpuid-Ice-Lake-Server-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-Ice-Lake-Server-disabled.xml
index 62c6bad612..ce65579bcc 100644
--- a/tests/cputestdata/x86_64-cpuid-Ice-Lake-Server-disabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-Ice-Lake-Server-disabled.xml
@@ -1,7 +1,7 @@
 
 
   
-  
+  
   
   
 
diff --git a/tests/cputestdata/x86_64-cpuid-Ice-Lake-Server-guest.xml 
b/tests/cputestdata/x86_64-cpuid-Ice-Lake-Server-guest.xml
index 4676f3aa7d..9b75ace710 100644
--- a/tests/cputestdata/x86_64-cpuid-Ice-Lake-Server-guest.xml
+++ b/tests/cputestdata/x86_64-cpuid-Ice-Lake-Server-guest.xml
@@ -23,6 +23,7 @@
   
   
   
+  
   
   
   
diff --git a/tests/cputestdata/x86_64-cpuid-Ice-Lake-Server-host.xml 
b/tests/cputestdata/x86_64-cpuid-Ice-Lake-Server-host.xml
index 35b9e39629..efbf9d363b 100644
--- a/tests/cputestdata/x86_64-cpuid-Ice-Lake-Server-host.xml
+++ b/tests/cputestdata/x86_64-cpuid-Ice-Lake-Server-host.xml
@@ -24,6 +24,7 @@
   
   
   
+  
   
   
   
diff --git a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml 
b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml
index 641032e1b6..80bcccd009 100644
--- a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml
@@ -2,7 +2,7 @@
 
   
   
-  
+  
   
   
   
diff --git a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml 
b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml
index 86e96e07ef..ec12363e71 100644
--- a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml
+++ b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml
@@ -6,6 +6,7 @@
   
   
   
+  
   
   
   
diff --git a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml 
b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml
index c63fb00cfa..dee05585aa 100644
--- a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml
+++ b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml
@@ -7,6 +7,7 @@
   
   
   
+  
   
   
   
diff --git a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-json.xml 
b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-json.xml
index 154c2af77d..735ec8ea2d 100644
--- a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-json.xml
+++ b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-json.xml
@@ -7,6 +7,7 @@
   
   
   
+  
   
   
   
diff --git a/tests/domaincapsdata/qemu_5.1.0-q35.x86_64.xml 
b/tests/domaincapsdata/qemu_5.1.0-q35.x86_64.xml
index d0917652e1..6b061b82de 100644
--- a/tests/domaincapsdata/qemu_5.1.0-q35.x86_64.xml
+++ b/tests/domaincapsdata/qemu_5.1.0-q35.x86_64.xml
@@ -44,6 +44,7 @@
   
   
   
+  
   
   
   
diff --git a/tests/domaincapsdata/qemu_5.1.0.x86_64.xml 
b/tests/domaincapsdata/qemu_5.1.0.x86_64.xml
index f33066759d..def35db95f 100644
--- a/tests/domaincapsdata/qemu_5.1.0.x86_64.xml
+++ b/tests/domaincapsdata/qemu_5.1.0.x86_64.xml
@@ -43,6 +43,7 @@
   
   
   
+  
   
   
   
-- 
2.27.0



[libvirt PATCH 0/4] cpu_map: Add some missing x86 features

2020-06-17 Thread Jiri Denemark
The features were added to QEMU long ago.

Jiri Denemark (4):
  cpu_map: Request test files update when adding x86 features
  cpu_map: Add missing x86 features in 0x7 CPUID leaf
  cpu_map: Add missing x86 features in 0x8008 CPUID leaf
  cpu_map: Add missing AMD SVM features

 src/cpu_map/x86_features.xml  | 57 +++
 .../x86_64-cpuid-A10-5800K-disabled.xml   |  1 +
 .../x86_64-cpuid-A10-5800K-enabled.xml|  1 +
 .../x86_64-cpuid-A10-5800K-guest.xml  | 10 
 .../x86_64-cpuid-A10-5800K-host.xml   | 10 
 .../x86_64-cpuid-A10-5800K-json.xml   |  2 +
 .../x86_64-cpuid-Cooperlake-enabled.xml   |  2 +-
 .../x86_64-cpuid-Cooperlake-json.xml  |  1 +
 .../x86_64-cpuid-Core-i5-6600-disabled.xml|  1 +
 ...6_64-cpuid-Core-i7-5600U-arat-disabled.xml |  1 +
 .../x86_64-cpuid-Core-i7-5600U-disabled.xml   |  1 +
 ...6_64-cpuid-Core-i7-5600U-ibrs-disabled.xml |  2 +-
 .../x86_64-cpuid-Core-i7-7700-disabled.xml|  1 +
 ...86_64-cpuid-EPYC-7601-32-Core-disabled.xml |  2 +
 ...x86_64-cpuid-EPYC-7601-32-Core-enabled.xml |  1 +
 .../x86_64-cpuid-EPYC-7601-32-Core-guest.xml  | 11 
 .../x86_64-cpuid-EPYC-7601-32-Core-host.xml   | 11 
 ...-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml |  2 +
 ...4-cpuid-EPYC-7601-32-Core-ibpb-enabled.xml |  1 +
 ..._64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml | 11 
 ...6_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml | 11 
 ...6_64-cpuid-EPYC-7601-32-Core-ibpb-json.xml |  2 +
 .../x86_64-cpuid-EPYC-7601-32-Core-json.xml   |  2 +
 .../x86_64-cpuid-FX-8150-guest.xml| 10 
 .../cputestdata/x86_64-cpuid-FX-8150-host.xml | 10 
 ...-cpuid-Hygon-C86-7185-32-core-disabled.xml |  2 +
 ...4-cpuid-Hygon-C86-7185-32-core-enabled.xml |  1 +
 ..._64-cpuid-Hygon-C86-7185-32-core-guest.xml | 11 
 ...6_64-cpuid-Hygon-C86-7185-32-core-host.xml | 11 
 ...6_64-cpuid-Hygon-C86-7185-32-core-json.xml |  2 +
 .../x86_64-cpuid-Ice-Lake-Server-disabled.xml |  2 +-
 .../x86_64-cpuid-Ice-Lake-Server-guest.xml|  1 +
 .../x86_64-cpuid-Ice-Lake-Server-host.xml |  1 +
 .../x86_64-cpuid-Opteron-1352-guest.xml   |  3 +
 .../x86_64-cpuid-Opteron-1352-host.xml|  3 +
 .../x86_64-cpuid-Opteron-2350-disabled.xml|  1 +
 .../x86_64-cpuid-Opteron-2350-enabled.xml |  1 +
 .../x86_64-cpuid-Opteron-2350-guest.xml   |  3 +
 .../x86_64-cpuid-Opteron-2350-host.xml|  3 +
 .../x86_64-cpuid-Opteron-2350-json.xml|  1 +
 .../x86_64-cpuid-Opteron-6234-disabled.xml|  1 +
 .../x86_64-cpuid-Opteron-6234-enabled.xml |  1 +
 .../x86_64-cpuid-Opteron-6234-guest.xml   | 10 
 .../x86_64-cpuid-Opteron-6234-host.xml| 10 
 .../x86_64-cpuid-Opteron-6234-json.xml|  2 +
 .../x86_64-cpuid-Opteron-6282-guest.xml   | 10 
 .../x86_64-cpuid-Opteron-6282-host.xml| 10 
 .../x86_64-cpuid-Phenom-B95-disabled.xml  |  1 +
 .../x86_64-cpuid-Phenom-B95-enabled.xml   |  1 +
 .../x86_64-cpuid-Phenom-B95-guest.xml |  4 ++
 .../x86_64-cpuid-Phenom-B95-host.xml  |  4 ++
 .../x86_64-cpuid-Phenom-B95-json.xml  |  2 +
 ...puid-Ryzen-7-1800X-Eight-Core-disabled.xml |  2 +
 ...cpuid-Ryzen-7-1800X-Eight-Core-enabled.xml |  1 +
 ...4-cpuid-Ryzen-7-1800X-Eight-Core-guest.xml | 11 
 ...64-cpuid-Ryzen-7-1800X-Eight-Core-host.xml | 11 
 ...64-cpuid-Ryzen-7-1800X-Eight-Core-json.xml |  2 +
 ...4-cpuid-Ryzen-9-3900X-12-Core-disabled.xml |  2 +
 ...64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml |  5 +-
 ...6_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml | 13 +
 ...86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml | 13 +
 ...86_64-cpuid-Ryzen-9-3900X-12-Core-json.xml |  4 ++
 .../x86_64-cpuid-Xeon-E3-1245-v5-disabled.xml |  1 +
 .../x86_64-cpuid-Xeon-E5-2623-v4-disabled.xml |  2 +-
 .../x86_64-cpuid-Xeon-E5-2650-v4-disabled.xml |  2 +-
 .../x86_64-cpuid-Xeon-Gold-5115-disabled.xml  |  2 +-
 .../x86_64-cpuid-Xeon-Gold-6148-disabled.xml  |  2 +-
 ...6_64-cpuid-Xeon-Platinum-8268-disabled.xml |  3 +-
 .../domaincapsdata/qemu_3.0.0-tcg.x86_64.xml  |  1 +
 .../domaincapsdata/qemu_3.1.0-tcg.x86_64.xml  |  1 +
 .../domaincapsdata/qemu_4.0.0-tcg.x86_64.xml  |  2 +
 .../domaincapsdata/qemu_4.1.0-tcg.x86_64.xml  |  2 +
 .../domaincapsdata/qemu_4.2.0-tcg.x86_64.xml  |  2 +
 .../domaincapsdata/qemu_5.0.0-tcg.x86_64.xml  |  2 +
 .../domaincapsdata/qemu_5.1.0-q35.x86_64.xml  |  5 ++
 .../domaincapsdata/qemu_5.1.0-tcg.x86_64.xml  |  2 +
 tests/domaincapsdata/qemu_5.1.0.x86_64.xml|  5 ++
 .../cpu-host-model-cmt.x86_64-4.0.0.args  |  6 +-
 78 files changed, 357 insertions(+), 13 deletions(-)

-- 
2.27.0



Re: [libvirt PATCH] docs: add kbase entry showing KVM real time guest config

2020-06-15 Thread Jiri Denemark
  
> + 
> +   
> +   
> + 33554432
> + 1572864
> + 0
> + 26
> + 
> +   
> +   
> + 
> + 
> +   
> +   
> +   
> +   
> +   
> +   
> +   
> +   
> +  
> +   
> + 
> +   
> +
> +Be aware that CPU ID numbers are not always allocated sequentially as shown
> +here. It is not unusual to see IDs interleaved between sockets on the two 
> NUMA
> +nodes, such that ``0-3,8-11`` are be on the first node and ``4-7,12-15`` are 
> on

s/are be /are /

> +the second node.  Carefully check the ``virsh capabilities`` output to 
> determine
> +the CPU ID numbers when configiring both ``isolcpus`` and the guest 
> ``cpuset``
> +values.
> +
> +Guest configuration
> +===
> +
> +What follows is an overview of the key parts of the domain XML that need to 
> be
> +configured to achieve low latency for real time workflows. The following 
> example
> +will assume a 4 CPU guest, requiring 16 GB of RAM. It is intended to be 
> placed
> +on the second host NUMA node.
> +
> +CPU configuration
> +-
> +
> +Real time KVM guests intended to run Linux should have a minimum of 2 CPUs.
> +One vCPU is for running non-real time processes and performing I/O. The other
> +vCPUs will run real time applications. Some non-Linux OS may not require a
> +special non-real time CPU to be available, in which case the 2 CPU minimum 
> would
> +not apply.
> +
> +Each guest CPU, even the non-real time one, needs to be pinned to a dedicated
> +host core that is in the `isolcpus` reserved set. The QEMU emulator threads
> +also need to be pinned to host CPUs that are not in the `isolcpus` reserved 
> set.

Seeing "also" I'd expect even emulator threads need to be pinned to CPUs
in the isolcpus set. If this is not the case and "that are not in the
isolcpus reserved set" part is correct, I suggest removing "also" or
emphasize the different sets of host CPUs. For example: "also need to be
pinned to host CPUs, but ..."

> +The vCPUs need to be given a real time CPU schedular policy.
> +
> +When configuring the `guest CPU count 
> <../formatdomain.html#elementsCPUAllocation>`_,
> +do not include any CPU affinity are this stage:

s/are/at/

> +
> +::
> +
> +   4
> +
> +The guest CPUs now need to be placed individually. In this case, they will 
> all
> +be put within the same host socket, such that they can be exposed as core
> +siblings. This is achieved using the `CPU tunning config 
> <../formatdomain.html#elementsCPUTuning>`_:
> +
> +::
> +
> +   
> + 
> + 
> + 
> + 
> + 
> + 
> +   
> +
> +The `guest CPU model `_ now needs to be
> +configured to pass through the host model unchanged, with topology matching 
> the
> +placement:
> +
> +::
> +
> +   
> + 
> + 
> +   
> +
> +The performance monitoring unit virtualization needs to be disabled
> +via the `hypervisor features <../formatdomain.html#elementsFeatures>`_:
> +
> +::
> +
> +   
> + ...
> + 
> +   
> +
> +
> +Memory configuration
> +
> +
> +The host memory used for guest RAM needs to be allocated from huge pages on 
> the
> +second NUMA node, and all other memory allocation needs to be locked into RAM
> +with memory page sharing disabled.
> +This is achieved by using the `memory backing config 
> `_:
> +
> +::
> +
> +   
> + 
> +   
> + 
> + 
> + 
> +   
> +
> +
> +Device configuration
> +
> +
> +Libvirt adds a few devices by default to maintain historical QEMU 
> configuration
> +behaviour. It is unlikely these devices are required by real time guests, so 
> it
> +is wise to disable them. Remove all USB controllers that may exist in the XML
> +config and replace them with:
> +
> +::
> +
> +   
> +
> +Similarly the memory balloon config should be changed to
> +
> +::
> +
> +   
> +
> +If the guest had a graphical console at installation time this can also be
> +disabled, with remote access being over SSH, with a minimal serial console
> +for emergencies.

With the above minor issues addressed:

Reviewed-by: Jiri Denemark 



Re: [PATCH 0/2] virDevMapperGetTargetsImpl: Check for dm major properly

2020-06-15 Thread Jiri Denemark
On Thu, Jun 11, 2020 at 13:44:46 +0200, Michal Privoznik wrote:
> *** BLURB HERE ***
> 
> Michal Prívozník (2):
>   util: Move virIsDevMapperDevice() to virdevmapper.c
>   virDevMapperGetTargetsImpl: Check for dm major properly
> 
>  src/libvirt_private.syms   |  2 +-
>  src/storage/parthelper.c   |  2 +-
>  src/storage/storage_backend_disk.c |  1 +
>  src/util/virdevmapper.c| 33 ++
>  src/util/virdevmapper.h|  3 +++
>  src/util/virutil.c | 24 --
>  src/util/virutil.h |  2 --
>  7 files changed, 31 insertions(+), 36 deletions(-)

Reviewed-by: Jiri Denemark 



[libvirt PATCH 2/2] qemuxml2*test: Add cases for CPU pinning to large host CPU IDs

2020-06-11 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 .../cputune-cpuset-big-id.x86_64-latest.args  | 39 +
 .../cputune-cpuset-big-id.xml | 33 ++
 tests/qemuxml2argvtest.c  |  1 +
 .../cputune-cpuset-big-id.x86_64-latest.xml   | 43 +++
 tests/qemuxml2xmltest.c   |  1 +
 5 files changed, 117 insertions(+)
 create mode 100644 
tests/qemuxml2argvdata/cputune-cpuset-big-id.x86_64-latest.args
 create mode 100644 tests/qemuxml2argvdata/cputune-cpuset-big-id.xml
 create mode 100644 
tests/qemuxml2xmloutdata/cputune-cpuset-big-id.x86_64-latest.xml

diff --git a/tests/qemuxml2argvdata/cputune-cpuset-big-id.x86_64-latest.args 
b/tests/qemuxml2argvdata/cputune-cpuset-big-id.x86_64-latest.args
new file mode 100644
index 00..b086ebe776
--- /dev/null
+++ b/tests/qemuxml2argvdata/cputune-cpuset-big-id.x86_64-latest.args
@@ -0,0 +1,39 @@
+LC_ALL=C \
+PATH=/bin \
+HOME=/tmp/lib/domain--1-QEMUGuest1 \
+USER=test \
+LOGNAME=test \
+XDG_DATA_HOME=/tmp/lib/domain--1-QEMUGuest1/.local/share \
+XDG_CACHE_HOME=/tmp/lib/domain--1-QEMUGuest1/.cache \
+XDG_CONFIG_HOME=/tmp/lib/domain--1-QEMUGuest1/.config \
+QEMU_AUDIO_DRV=none \
+/usr/bin/qemu-system-x86_64 \
+-name guest=QEMUGuest1,debug-threads=on \
+-S \
+-object secret,id=masterKey0,format=raw,\
+file=/tmp/lib/domain--1-QEMUGuest1/master-key.aes \
+-machine pc,accel=tcg,usb=off,dump-guest-core=off \
+-cpu qemu64 \
+-m 214 \
+-overcommit mem-lock=off \
+-smp 2,sockets=2,cores=1,threads=1 \
+-uuid c7a5fdbd-edaf-9455-926a-d65c16db1809 \
+-display none \
+-no-user-config \
+-nodefaults \
+-chardev socket,id=charmonitor,fd=1729,server,nowait \
+-mon chardev=charmonitor,id=monitor,mode=control \
+-rtc base=utc \
+-no-shutdown \
+-no-acpi \
+-boot strict=on \
+-device piix3-usb-uhci,id=usb,bus=pci.0,addr=0x1.0x2 \
+-blockdev '{"driver":"host_device","filename":"/dev/HostVG/QEMUGuest1",\
+"node-name":"libvirt-1-storage","auto-read-only":true,"discard":"unmap"}' \
+-blockdev '{"node-name":"libvirt-1-format","read-only":false,"driver":"raw",\
+"file":"libvirt-1-storage"}' \
+-device ide-hd,bus=ide.0,unit=0,drive=libvirt-1-format,id=ide0-0-0,bootindex=1 
\
+-device virtio-balloon-pci,id=balloon0,bus=pci.0,addr=0x2 \
+-sandbox on,obsolete=deny,elevateprivileges=deny,spawn=deny,\
+resourcecontrol=deny \
+-msg timestamp=on
diff --git a/tests/qemuxml2argvdata/cputune-cpuset-big-id.xml 
b/tests/qemuxml2argvdata/cputune-cpuset-big-id.xml
new file mode 100644
index 00..52e2df4082
--- /dev/null
+++ b/tests/qemuxml2argvdata/cputune-cpuset-big-id.xml
@@ -0,0 +1,33 @@
+
+  QEMUGuest1
+  c7a5fdbd-edaf-9455-926a-d65c16db1809
+  219136
+  219136
+  2
+  
+
+
+  
+  
+hvm
+
+  
+  
+  destroy
+  restart
+  destroy
+  
+/usr/bin/qemu-system-x86_64
+
+  
+  
+  
+
+
+
+
+
+
+
+  
+
diff --git a/tests/qemuxml2argvtest.c b/tests/qemuxml2argvtest.c
index 02f8846e57..d5b2a21b5a 100644
--- a/tests/qemuxml2argvtest.c
+++ b/tests/qemuxml2argvtest.c
@@ -1901,6 +1901,7 @@ mymain(void)
 DO_TEST("vcpu-placement-static",
 QEMU_CAPS_KVM,
 QEMU_CAPS_OBJECT_IOTHREAD);
+DO_TEST_CAPS_LATEST("cputune-cpuset-big-id");
 
 DO_TEST("numatune-memory", NONE);
 DO_TEST_PARSE_ERROR("numatune-memory-invalid-nodeset", NONE);
diff --git a/tests/qemuxml2xmloutdata/cputune-cpuset-big-id.x86_64-latest.xml 
b/tests/qemuxml2xmloutdata/cputune-cpuset-big-id.x86_64-latest.xml
new file mode 100644
index 00..8405829bb6
--- /dev/null
+++ b/tests/qemuxml2xmloutdata/cputune-cpuset-big-id.x86_64-latest.xml
@@ -0,0 +1,43 @@
+
+  QEMUGuest1
+  c7a5fdbd-edaf-9455-926a-d65c16db1809
+  219136
+  219136
+  2
+  
+
+
+  
+  
+hvm
+
+  
+  
+qemu64
+  
+  
+  destroy
+  restart
+  destroy
+  
+/usr/bin/qemu-system-x86_64
+
+  
+  
+  
+  
+
+
+  
+
+
+  
+
+
+
+
+
+  
+
+  
+
diff --git a/tests/qemuxml2xmltest.c b/tests/qemuxml2xmltest.c
index 157e686f2a..7fc8a7d61f 100644
--- a/tests/qemuxml2xmltest.c
+++ b/tests/qemuxml2xmltest.c
@@ -553,6 +553,7 @@ mymain(void)
 DO_TEST("vcpu-placement-static",
 QEMU_CAPS_KVM,
 QEMU_CAPS_OBJECT_IOTHREAD);
+DO_TEST_CAPS_LATEST("cputune-cpuset-big-id");
 
 DO_TEST("smp", NONE);
 DO_TEST("iothreads", NONE);
-- 
2.27.0



[libvirt PATCH 1/2] conf: Increase cpuset length limit for CPU pinning

2020-06-11 Thread Jiri Denemark
Domains are now allowed to be pinned to host CPUs with IDs up to 16383.
The new limit is as arbitrary as the old one. It's just bigger.

Signed-off-by: Jiri Denemark 
---
 src/conf/domain_conf.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/conf/domain_conf.h b/src/conf/domain_conf.h
index bda8fb6bce..41715c75f2 100644
--- a/src/conf/domain_conf.h
+++ b/src/conf/domain_conf.h
@@ -2314,7 +2314,7 @@ struct _virDomainHugePage {
 unsigned long long size;/* hugepage size in KiB */
 };
 
-#define VIR_DOMAIN_CPUMASK_LEN 1024
+#define VIR_DOMAIN_CPUMASK_LEN 16384
 
 struct _virDomainIOThreadIDDef {
 bool autofill;
-- 
2.27.0



[libvirt PATCH 0/2] conf: Increase cpuset length limit for CPU pinning

2020-06-11 Thread Jiri Denemark
The tests in patch 2/2 would fail without the first patch.

Jiri Denemark (2):
  conf: Increase cpuset length limit for CPU pinning
  qemuxml2*test: Add cases for CPU pinning to large host CPU IDs

 src/conf/domain_conf.h|  2 +-
 .../cputune-cpuset-big-id.x86_64-latest.args  | 39 +
 .../cputune-cpuset-big-id.xml | 33 ++
 tests/qemuxml2argvtest.c  |  1 +
 .../cputune-cpuset-big-id.x86_64-latest.xml   | 43 +++
 tests/qemuxml2xmltest.c   |  1 +
 6 files changed, 118 insertions(+), 1 deletion(-)
 create mode 100644 
tests/qemuxml2argvdata/cputune-cpuset-big-id.x86_64-latest.args
 create mode 100644 tests/qemuxml2argvdata/cputune-cpuset-big-id.xml
 create mode 100644 
tests/qemuxml2xmloutdata/cputune-cpuset-big-id.x86_64-latest.xml

-- 
2.27.0



[libvirt PATCH 5/5] qemu: Avoid deprecated migrate-set-cache-size QMP command

2020-06-10 Thread Jiri Denemark
The same functionality can be achieved using migrate-set-parameters QMP
command with xbzrle-cache-size parameter.

https://bugzilla.redhat.com/show_bug.cgi?id=1845012

Signed-off-by: Jiri Denemark 
---
 src/qemu/qemu_driver.c   | 26 +-
 src/qemu/qemu_migration_params.c |  3 +--
 2 files changed, 22 insertions(+), 7 deletions(-)

diff --git a/src/qemu/qemu_driver.c b/src/qemu/qemu_driver.c
index 820a54ab2b..460d6703f6 100644
--- a/src/qemu/qemu_driver.c
+++ b/src/qemu/qemu_driver.c
@@ -14028,7 +14028,9 @@ qemuDomainMigrateSetCompressionCache(virDomainPtr dom,
 virQEMUDriverPtr driver = dom->conn->privateData;
 virDomainObjPtr vm;
 qemuDomainObjPrivatePtr priv;
+g_autoptr(qemuMigrationParams) migParams = NULL;
 int ret = -1;
+int rc;
 
 virCheckFlags(0, -1);
 
@@ -14053,13 +14055,27 @@ qemuDomainMigrateSetCompressionCache(virDomainPtr dom,
 goto endjob;
 }
 
-qemuDomainObjEnterMonitor(driver, vm);
-
 VIR_DEBUG("Setting compression cache to %llu B", cacheSize);
-ret = qemuMonitorSetMigrationCacheSize(priv->mon, cacheSize);
+if (virQEMUCapsGet(priv->qemuCaps, QEMU_CAPS_MIGRATION_PARAM_CACHE_SIZE)) {
+if (!(migParams = qemuMigrationParamsNew()))
+goto endjob;
 
-if (qemuDomainObjExitMonitor(driver, vm) < 0)
-ret = -1;
+if (qemuMigrationParamsSetULL(migParams,
+  QEMU_MIGRATION_PARAM_XBZRLE_CACHE_SIZE,
+  cacheSize) < 0)
+goto endjob;
+
+if (qemuMigrationParamsApply(driver, vm, QEMU_ASYNC_JOB_NONE,
+ migParams) < 0)
+goto endjob;
+} else {
+qemuDomainObjEnterMonitor(driver, vm);
+rc = qemuMonitorSetMigrationCacheSize(priv->mon, cacheSize);
+if (qemuDomainObjExitMonitor(driver, vm) < 0 || rc < 0)
+goto endjob;
+}
+
+ret = 0;
 
  endjob:
 qemuDomainObjEndJob(driver, vm);
diff --git a/src/qemu/qemu_migration_params.c b/src/qemu/qemu_migration_params.c
index 810199370f..4be1d93ba5 100644
--- a/src/qemu/qemu_migration_params.c
+++ b/src/qemu/qemu_migration_params.c
@@ -869,8 +869,7 @@ qemuMigrationParamsApply(virQEMUDriverPtr driver,
  * qemuMonitorSetMigrationParams to ignore this parameter.
  */
 if (migParams->params[xbzrle].set &&
-(!priv->job.migParams ||
- !priv->job.migParams->params[xbzrle].set)) {
+!virQEMUCapsGet(priv->qemuCaps, QEMU_CAPS_MIGRATION_PARAM_CACHE_SIZE)) 
{
 if (qemuMonitorSetMigrationCacheSize(priv->mon,
  
migParams->params[xbzrle].value.ull) < 0)
 goto cleanup;
-- 
2.27.0



[libvirt PATCH 1/5] qemu: Probe for a few params supported by migrate-set-parameters

2020-06-10 Thread Jiri Denemark
These parameters were originally set via dedicated commands which are
now deprecated. We want to use migrate-set-parameters instead if
possible.

Signed-off-by: Jiri Denemark 
---
 src/qemu/qemu_capabilities.c   | 8 
 src/qemu/qemu_capabilities.h   | 5 +
 tests/qemucapabilitiesdata/caps_2.10.0.aarch64.xml | 2 ++
 tests/qemucapabilitiesdata/caps_2.10.0.ppc64.xml   | 2 ++
 tests/qemucapabilitiesdata/caps_2.10.0.s390x.xml   | 2 ++
 tests/qemucapabilitiesdata/caps_2.10.0.x86_64.xml  | 2 ++
 tests/qemucapabilitiesdata/caps_2.11.0.s390x.xml   | 3 +++
 tests/qemucapabilitiesdata/caps_2.11.0.x86_64.xml  | 3 +++
 tests/qemucapabilitiesdata/caps_2.12.0.aarch64.xml | 3 +++
 tests/qemucapabilitiesdata/caps_2.12.0.ppc64.xml   | 3 +++
 tests/qemucapabilitiesdata/caps_2.12.0.s390x.xml   | 3 +++
 tests/qemucapabilitiesdata/caps_2.12.0.x86_64.xml  | 3 +++
 tests/qemucapabilitiesdata/caps_2.8.0.s390x.xml| 2 ++
 tests/qemucapabilitiesdata/caps_2.8.0.x86_64.xml   | 2 ++
 tests/qemucapabilitiesdata/caps_2.9.0.ppc64.xml| 2 ++
 tests/qemucapabilitiesdata/caps_2.9.0.s390x.xml| 2 ++
 tests/qemucapabilitiesdata/caps_2.9.0.x86_64.xml   | 2 ++
 tests/qemucapabilitiesdata/caps_3.0.0.ppc64.xml| 3 +++
 tests/qemucapabilitiesdata/caps_3.0.0.riscv32.xml  | 3 +++
 tests/qemucapabilitiesdata/caps_3.0.0.riscv64.xml  | 3 +++
 tests/qemucapabilitiesdata/caps_3.0.0.s390x.xml| 3 +++
 tests/qemucapabilitiesdata/caps_3.0.0.x86_64.xml   | 3 +++
 tests/qemucapabilitiesdata/caps_3.1.0.ppc64.xml| 3 +++
 tests/qemucapabilitiesdata/caps_3.1.0.x86_64.xml   | 3 +++
 tests/qemucapabilitiesdata/caps_4.0.0.aarch64.xml  | 3 +++
 tests/qemucapabilitiesdata/caps_4.0.0.ppc64.xml| 3 +++
 tests/qemucapabilitiesdata/caps_4.0.0.riscv32.xml  | 3 +++
 tests/qemucapabilitiesdata/caps_4.0.0.riscv64.xml  | 3 +++
 tests/qemucapabilitiesdata/caps_4.0.0.s390x.xml| 3 +++
 tests/qemucapabilitiesdata/caps_4.0.0.x86_64.xml   | 3 +++
 tests/qemucapabilitiesdata/caps_4.1.0.x86_64.xml   | 3 +++
 tests/qemucapabilitiesdata/caps_4.2.0.aarch64.xml  | 3 +++
 tests/qemucapabilitiesdata/caps_4.2.0.ppc64.xml| 3 +++
 tests/qemucapabilitiesdata/caps_4.2.0.s390x.xml| 3 +++
 tests/qemucapabilitiesdata/caps_4.2.0.x86_64.xml   | 3 +++
 tests/qemucapabilitiesdata/caps_5.0.0.aarch64.xml  | 3 +++
 tests/qemucapabilitiesdata/caps_5.0.0.ppc64.xml| 3 +++
 tests/qemucapabilitiesdata/caps_5.0.0.riscv64.xml  | 3 +++
 tests/qemucapabilitiesdata/caps_5.0.0.x86_64.xml   | 3 +++
 tests/qemucapabilitiesdata/caps_5.1.0.x86_64.xml   | 3 +++
 40 files changed, 118 insertions(+)

diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c
index aa90eab229..43438cb9fb 100644
--- a/src/qemu/qemu_capabilities.c
+++ b/src/qemu/qemu_capabilities.c
@@ -587,6 +587,11 @@ VIR_ENUM_IMPL(virQEMUCaps,
   "cpu.migratable",
   "query-cpu-model-expansion.migratable",
   "fw_cfg",
+  "migration-param.bandwidth",
+  "migration-param.downtime",
+
+  /* 375 */
+  "migration-param.cache-size",
 );
 
 
@@ -1508,6 +1513,9 @@ static struct virQEMUCapsStringFlags 
virQEMUCapsQMPSchemaQueries[] = {
 { "query-named-block-nodes/arg-type/flat", 
QEMU_CAPS_QMP_QUERY_NAMED_BLOCK_NODES_FLAT },
 { "blockdev-snapshot/$allow-write-only-overlay", 
QEMU_CAPS_BLOCKDEV_SNAPSHOT_ALLOW_WRITE_ONLY },
 { "blockdev-add/arg-type/+file/aio/^io_uring", QEMU_CAPS_AIO_IO_URING },
+{ "migrate-set-parameters/arg-type/max-bandwidth", 
QEMU_CAPS_MIGRATION_PARAM_BANDWIDTH },
+{ "migrate-set-parameters/arg-type/downtime-limit", 
QEMU_CAPS_MIGRATION_PARAM_DOWNTIME },
+{ "migrate-set-parameters/arg-type/xbzrle-cache-size", 
QEMU_CAPS_MIGRATION_PARAM_CACHE_SIZE },
 };
 
 typedef struct _virQEMUCapsObjectTypeProps virQEMUCapsObjectTypeProps;
diff --git a/src/qemu/qemu_capabilities.h b/src/qemu/qemu_capabilities.h
index 0839c50bc4..9dbdc90395 100644
--- a/src/qemu/qemu_capabilities.h
+++ b/src/qemu/qemu_capabilities.h
@@ -568,6 +568,11 @@ typedef enum { /* virQEMUCapsFlags grouping marker for 
syntax-check */
 QEMU_CAPS_CPU_MIGRATABLE, /* -cpu ...,migratable=on|off */
 QEMU_CAPS_QUERY_CPU_MODEL_EXPANSION_MIGRATABLE, /* 
query-cpu-model-expansion supports migratable:false */
 QEMU_CAPS_FW_CFG, /* -fw_cfg command line option */
+QEMU_CAPS_MIGRATION_PARAM_BANDWIDTH, /* max-bandwidth field in 
migrate-set-parameters */
+QEMU_CAPS_MIGRATION_PARAM_DOWNTIME, /* downtime-limit field in 
migrate-set-parameters */
+
+/* 375 */
+QEMU_CAPS_MIGRATION_PARAM_CACHE_SIZE, /* xbzrle-cache-size field in 
migrate-set-parameters */
 
 QEMU_CAPS_LAST /* this must always be the last item */
 } virQEMUCapsFlags;
diff --git a/tests/qemucapabilitiesdata/caps_2.10.0.aarch64.xml 
b/tests/qemucapabilitiesdata/caps_2.1

[libvirt PATCH 2/5] qemu: Avoid deprecated migrate_set_speed QMP command

2020-06-10 Thread Jiri Denemark
The same functionality can be achieved using migrate-set-parameters QMP
command with max-bandwidth parameter.

https://bugzilla.redhat.com/show_bug.cgi?id=1829545

Signed-off-by: Jiri Denemark 
---
 src/qemu/qemu_driver.c  | 18 ++---
 src/qemu/qemu_migration.c   | 53 ++---
 tests/qemumonitorjsontest.c |  2 +-
 3 files changed, 58 insertions(+), 15 deletions(-)

diff --git a/src/qemu/qemu_driver.c b/src/qemu/qemu_driver.c
index 88517ba6a7..779f28dbbb 100644
--- a/src/qemu/qemu_driver.c
+++ b/src/qemu/qemu_driver.c
@@ -14047,6 +14047,7 @@ qemuDomainMigrateSetMaxSpeed(virDomainPtr dom,
 qemuDomainObjPrivatePtr priv;
 bool postcopy = !!(flags & VIR_DOMAIN_MIGRATE_MAX_SPEED_POSTCOPY);
 g_autoptr(qemuMigrationParams) migParams = NULL;
+bool bwParam;
 unsigned long long max;
 int ret = -1;
 
@@ -14085,12 +14086,20 @@ qemuDomainMigrateSetMaxSpeed(virDomainPtr dom,
 
 VIR_DEBUG("Setting migration bandwidth to %luMbs", bandwidth);
 
-if (postcopy) {
+bwParam = virQEMUCapsGet(priv->qemuCaps, 
QEMU_CAPS_MIGRATION_PARAM_BANDWIDTH);
+
+if (postcopy || bwParam) {
+qemuMigrationParam param;
+
 if (!(migParams = qemuMigrationParamsNew()))
 goto endjob;
 
-if (qemuMigrationParamsSetULL(migParams,
-  
QEMU_MIGRATION_PARAM_MAX_POSTCOPY_BANDWIDTH,
+if (postcopy)
+param = QEMU_MIGRATION_PARAM_MAX_POSTCOPY_BANDWIDTH;
+else
+param = QEMU_MIGRATION_PARAM_MAX_BANDWIDTH;
+
+if (qemuMigrationParamsSetULL(migParams, param,
   bandwidth * 1024 * 1024) < 0)
 goto endjob;
 
@@ -14104,9 +14113,10 @@ qemuDomainMigrateSetMaxSpeed(virDomainPtr dom,
 rc = qemuMonitorSetMigrationSpeed(priv->mon, bandwidth);
 if (qemuDomainObjExitMonitor(driver, vm) < 0 || rc < 0)
 goto endjob;
+}
 
+if (!postcopy)
 priv->migMaxBandwidth = bandwidth;
-}
 
 ret = 0;
 
diff --git a/src/qemu/qemu_migration.c b/src/qemu/qemu_migration.c
index 7ee5b5eda8..13427c1203 100644
--- a/src/qemu/qemu_migration.c
+++ b/src/qemu/qemu_migration.c
@@ -3495,6 +3495,7 @@ qemuMigrationSrcRun(virQEMUDriverPtr driver,
 unsigned int cookieFlags = 0;
 bool abort_on_error = !!(flags & VIR_MIGRATE_ABORT_ON_ERROR);
 bool events = virQEMUCapsGet(priv->qemuCaps, QEMU_CAPS_MIGRATION_EVENT);
+bool bwParam = virQEMUCapsGet(priv->qemuCaps, 
QEMU_CAPS_MIGRATION_PARAM_BANDWIDTH);
 bool cancel = false;
 unsigned int waitFlags;
 virDomainDefPtr persistDef = NULL;
@@ -3582,6 +3583,11 @@ qemuMigrationSrcRun(virQEMUDriverPtr driver,
 goto error;
 }
 
+if (bwParam &&
+qemuMigrationParamsSetULL(migParams, 
QEMU_MIGRATION_PARAM_MAX_BANDWIDTH,
+  migrate_speed * 1024 * 1024) < 0)
+goto error;
+
 if (qemuMigrationParamsApply(driver, vm, QEMU_ASYNC_JOB_MIGRATION_OUT,
  migParams) < 0)
 goto error;
@@ -3644,7 +3650,8 @@ qemuMigrationSrcRun(virQEMUDriverPtr driver,
 goto exit_monitor;
 }
 
-if (qemuMonitorSetMigrationSpeed(priv->mon, migrate_speed) < 0)
+if (!bwParam &&
+qemuMonitorSetMigrationSpeed(priv->mon, migrate_speed) < 0)
 goto exit_monitor;
 
 /* connect to the destination qemu if needed */
@@ -5299,24 +5306,41 @@ qemuMigrationSrcToFile(virQEMUDriverPtr driver, 
virDomainObjPtr vm,
qemuDomainAsyncJob asyncJob)
 {
 qemuDomainObjPrivatePtr priv = vm->privateData;
+bool bwParam = virQEMUCapsGet(priv->qemuCaps, 
QEMU_CAPS_MIGRATION_PARAM_BANDWIDTH);
 int rc;
 int ret = -1;
 int pipeFD[2] = { -1, -1 };
 unsigned long saveMigBandwidth = priv->migMaxBandwidth;
 char *errbuf = NULL;
 virErrorPtr orig_err = NULL;
+g_autoptr(qemuMigrationParams) migParams = NULL;
 
 if (qemuMigrationSetDBusVMState(driver, vm) < 0)
 return -1;
 
 /* Increase migration bandwidth to unlimited since target is a file.
  * Failure to change migration speed is not fatal. */
-if (qemuDomainObjEnterMonitorAsync(driver, vm, asyncJob) == 0) {
-qemuMonitorSetMigrationSpeed(priv->mon,
- QEMU_DOMAIN_MIG_BANDWIDTH_MAX);
-priv->migMaxBandwidth = QEMU_DOMAIN_MIG_BANDWIDTH_MAX;
-if (qemuDomainObjExitMonitor(driver, vm) < 0)
+if (bwParam) {
+if (!(migParams = qemuMigrationParamsNew()))
+return -1;
+
+if (qemuMigrationParamsSetULL(migParams,
+  QEMU_MIGRATION_PARAM_MAX_BANDWIDTH,
+  QEMU_DOMAIN_MIG_BANDWIDTH_MAX * 1024 * 
1024) < 0)
+return -1;
+
+if (qemuMigrationParamsApply(driver, vm, asyncJob, migP

[libvirt PATCH 4/5] qemu: Avoid deprecated query-migrate-cache-size QMP command

2020-06-10 Thread Jiri Denemark
The same functionality can be achieved using query-migrate-parameters
QMP command and checking the xbzrle-cache-size parameter.

https://bugzilla.redhat.com/show_bug.cgi?id=1829544

Signed-off-by: Jiri Denemark 
---
 src/qemu/qemu_driver.c  | 21 +
 tests/qemumonitorjsontest.c |  2 +-
 2 files changed, 18 insertions(+), 5 deletions(-)

diff --git a/src/qemu/qemu_driver.c b/src/qemu/qemu_driver.c
index c9a2081487..820a54ab2b 100644
--- a/src/qemu/qemu_driver.c
+++ b/src/qemu/qemu_driver.c
@@ -13967,7 +13967,9 @@ qemuDomainMigrateGetCompressionCache(virDomainPtr dom,
 virQEMUDriverPtr driver = dom->conn->privateData;
 virDomainObjPtr vm;
 qemuDomainObjPrivatePtr priv;
+g_autoptr(qemuMigrationParams) migParams = NULL;
 int ret = -1;
+int rc;
 
 virCheckFlags(0, -1);
 
@@ -13992,12 +13994,23 @@ qemuDomainMigrateGetCompressionCache(virDomainPtr dom,
 goto endjob;
 }
 
-qemuDomainObjEnterMonitor(driver, vm);
+if (virQEMUCapsGet(priv->qemuCaps, QEMU_CAPS_MIGRATION_PARAM_CACHE_SIZE)) {
+if (qemuMigrationParamsFetch(driver, vm, QEMU_ASYNC_JOB_NONE,
+ ) < 0)
+goto endjob;
 
-ret = qemuMonitorGetMigrationCacheSize(priv->mon, cacheSize);
+if (qemuMigrationParamsGetULL(migParams,
+  QEMU_MIGRATION_PARAM_XBZRLE_CACHE_SIZE,
+  cacheSize) < 0)
+goto endjob;
+} else {
+qemuDomainObjEnterMonitor(driver, vm);
+rc = qemuMonitorGetMigrationCacheSize(priv->mon, cacheSize);
+if (qemuDomainObjExitMonitor(driver, vm) < 0 || rc < 0)
+goto endjob;
+}
 
-if (qemuDomainObjExitMonitor(driver, vm) < 0)
-ret = -1;
+ret = 0;
 
  endjob:
 qemuDomainObjEndJob(driver, vm);
diff --git a/tests/qemumonitorjsontest.c b/tests/qemumonitorjsontest.c
index 1c58c333d5..d2cd054dbf 100644
--- a/tests/qemumonitorjsontest.c
+++ b/tests/qemumonitorjsontest.c
@@ -1888,7 +1888,7 @@ 
testQemuMonitorJSONqemuMonitorJSONGetMigrationCacheSize(const void *opaque)
 if (!(test = qemuMonitorTestNewSchema(xmlopt, data->schema)))
 return -1;
 
-qemuMonitorTestSkipDeprecatedValidation(test, false);
+qemuMonitorTestSkipDeprecatedValidation(test, true);
 
 if (qemuMonitorTestAddItem(test, "query-migrate-cache-size",
"{"
-- 
2.27.0



[libvirt PATCH 0/5] Avoid deprecated commands for migration parameters

2020-06-10 Thread Jiri Denemark
Jiri Denemark (5):
  qemu: Probe for a few params supported by migrate-set-parameters
  qemu: Avoid deprecated migrate_set_speed QMP command
  qemu: Avoid deprecated migrate_set_downtime QMP command
  qemu: Avoid deprecated query-migrate-cache-size QMP command
  qemu: Avoid deprecated migrate-set-cache-size QMP command

 src/qemu/qemu_capabilities.c  |  8 ++
 src/qemu/qemu_capabilities.h  |  5 +
 src/qemu/qemu_driver.c| 92 +++
 src/qemu/qemu_migration.c | 53 +--
 src/qemu/qemu_migration_params.c  |  3 +-
 .../caps_2.10.0.aarch64.xml   |  2 +
 .../caps_2.10.0.ppc64.xml |  2 +
 .../caps_2.10.0.s390x.xml |  2 +
 .../caps_2.10.0.x86_64.xml|  2 +
 .../caps_2.11.0.s390x.xml |  3 +
 .../caps_2.11.0.x86_64.xml|  3 +
 .../caps_2.12.0.aarch64.xml   |  3 +
 .../caps_2.12.0.ppc64.xml |  3 +
 .../caps_2.12.0.s390x.xml |  3 +
 .../caps_2.12.0.x86_64.xml|  3 +
 .../qemucapabilitiesdata/caps_2.8.0.s390x.xml |  2 +
 .../caps_2.8.0.x86_64.xml |  2 +
 .../qemucapabilitiesdata/caps_2.9.0.ppc64.xml |  2 +
 .../qemucapabilitiesdata/caps_2.9.0.s390x.xml |  2 +
 .../caps_2.9.0.x86_64.xml |  2 +
 .../qemucapabilitiesdata/caps_3.0.0.ppc64.xml |  3 +
 .../caps_3.0.0.riscv32.xml|  3 +
 .../caps_3.0.0.riscv64.xml|  3 +
 .../qemucapabilitiesdata/caps_3.0.0.s390x.xml |  3 +
 .../caps_3.0.0.x86_64.xml |  3 +
 .../qemucapabilitiesdata/caps_3.1.0.ppc64.xml |  3 +
 .../caps_3.1.0.x86_64.xml |  3 +
 .../caps_4.0.0.aarch64.xml|  3 +
 .../qemucapabilitiesdata/caps_4.0.0.ppc64.xml |  3 +
 .../caps_4.0.0.riscv32.xml|  3 +
 .../caps_4.0.0.riscv64.xml|  3 +
 .../qemucapabilitiesdata/caps_4.0.0.s390x.xml |  3 +
 .../caps_4.0.0.x86_64.xml |  3 +
 .../caps_4.1.0.x86_64.xml |  3 +
 .../caps_4.2.0.aarch64.xml|  3 +
 .../qemucapabilitiesdata/caps_4.2.0.ppc64.xml |  3 +
 .../qemucapabilitiesdata/caps_4.2.0.s390x.xml |  3 +
 .../caps_4.2.0.x86_64.xml |  3 +
 .../caps_5.0.0.aarch64.xml|  3 +
 .../qemucapabilitiesdata/caps_5.0.0.ppc64.xml |  3 +
 .../caps_5.0.0.riscv64.xml|  3 +
 .../caps_5.0.0.x86_64.xml |  3 +
 .../caps_5.1.0.x86_64.xml |  3 +
 tests/qemumonitorjsontest.c   |  6 +-
 44 files changed, 240 insertions(+), 32 deletions(-)

-- 
2.27.0



[libvirt PATCH 3/5] qemu: Avoid deprecated migrate_set_downtime QMP command

2020-06-10 Thread Jiri Denemark
The same functionality can be achieved using migrate-set-parameters QMP
command with downtime-limit parameter.

https://bugzilla.redhat.com/show_bug.cgi?id=1829543

Signed-off-by: Jiri Denemark 
---
 src/qemu/qemu_driver.c  | 27 +++
 tests/qemumonitorjsontest.c |  2 +-
 2 files changed, 24 insertions(+), 5 deletions(-)

diff --git a/src/qemu/qemu_driver.c b/src/qemu/qemu_driver.c
index 779f28dbbb..c9a2081487 100644
--- a/src/qemu/qemu_driver.c
+++ b/src/qemu/qemu_driver.c
@@ -13853,7 +13853,9 @@ qemuDomainMigrateSetMaxDowntime(virDomainPtr dom,
 virQEMUDriverPtr driver = dom->conn->privateData;
 virDomainObjPtr vm;
 qemuDomainObjPrivatePtr priv;
+g_autoptr(qemuMigrationParams) migParams = NULL;
 int ret = -1;
+int rc;
 
 virCheckFlags(0, -1);
 
@@ -13872,10 +13874,27 @@ qemuDomainMigrateSetMaxDowntime(virDomainPtr dom,
 priv = vm->privateData;
 
 VIR_DEBUG("Setting migration downtime to %llums", downtime);
-qemuDomainObjEnterMonitor(driver, vm);
-ret = qemuMonitorSetMigrationDowntime(priv->mon, downtime);
-if (qemuDomainObjExitMonitor(driver, vm) < 0)
-ret = -1;
+
+if (virQEMUCapsGet(priv->qemuCaps, QEMU_CAPS_MIGRATION_PARAM_DOWNTIME)) {
+if (!(migParams = qemuMigrationParamsNew()))
+goto endjob;
+
+if (qemuMigrationParamsSetULL(migParams,
+  QEMU_MIGRATION_PARAM_DOWNTIME_LIMIT,
+  downtime) < 0)
+goto endjob;
+
+if (qemuMigrationParamsApply(driver, vm, QEMU_ASYNC_JOB_NONE,
+ migParams) < 0)
+goto endjob;
+} else {
+qemuDomainObjEnterMonitor(driver, vm);
+rc = qemuMonitorSetMigrationDowntime(priv->mon, downtime);
+if (qemuDomainObjExitMonitor(driver, vm) < 0 || rc < 0)
+goto endjob;
+}
+
+ret = 0;
 
  endjob:
 qemuDomainObjEndJob(driver, vm);
diff --git a/tests/qemumonitorjsontest.c b/tests/qemumonitorjsontest.c
index e8a0508c53..1c58c333d5 100644
--- a/tests/qemumonitorjsontest.c
+++ b/tests/qemumonitorjsontest.c
@@ -3221,7 +3221,7 @@ mymain(void)
 DO_TEST_GEN(qemuMonitorJSONSaveVirtualMemory);
 DO_TEST_GEN(qemuMonitorJSONSavePhysicalMemory);
 DO_TEST_GEN_DEPRECATED(qemuMonitorJSONSetMigrationSpeed, true);
-DO_TEST_GEN_DEPRECATED(qemuMonitorJSONSetMigrationDowntime, false);
+DO_TEST_GEN_DEPRECATED(qemuMonitorJSONSetMigrationDowntime, true);
 DO_TEST_GEN(qemuMonitorJSONMigrate);
 DO_TEST_GEN(qemuMonitorJSONDump);
 DO_TEST_GEN(qemuMonitorJSONGraphicsRelocate);
-- 
2.27.0



Re: [libvirt PATCH 0/9] qemu: Add support for -cpu host, migratable=on|off

2020-06-09 Thread Jiri Denemark
On Tue, Jun 09, 2020 at 12:35:02 +0200, Michal Privoznik wrote:
> On 6/5/20 8:31 PM, Jiri Denemark wrote:
> > 
> > Jiri Denemark (9):
> >conf: Use g_auto* in virCPUDefParseXML
> >qemu: Probe for .migratable property of a CPU
> >qemu: Probe for migrtability support in CPU expansion
> >qemu: Avoid probing unsupported migratable CPU expansion
> >conf: Introduce migratable attribute for the  element
> >conf: Advertise migratable attribute for CPU in domcaps
> >qemu: Advertise migratable attribute for CPU in domcaps
> >qemu: Fill default value in //cpu/@migratable attribute
> >qemu: Pass migratable=on|off property for -cpu host
...
> 
> Is there a BZ link that can be put into one of the commit messages?

No, there's no BZ for this.

> Reviewed-by: Michal Privoznik 

Thanks.

Jirka



[libvirt PATCH 6/9] conf: Advertise migratable attribute for CPU in domcaps

2020-06-05 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 docs/formatdomaincaps.html.in  | 13 +++--
 docs/schemas/domaincaps.rng|  3 +++
 src/conf/domain_capabilities.c | 13 -
 src/conf/domain_capabilities.h |  1 +
 4 files changed, 27 insertions(+), 3 deletions(-)

diff --git a/docs/formatdomaincaps.html.in b/docs/formatdomaincaps.html.in
index 7df9f0bbbf..1506f79818 100644
--- a/docs/formatdomaincaps.html.in
+++ b/docs/formatdomaincaps.html.in
@@ -201,7 +201,12 @@
 domainCapabilities
   ...
   cpu
-mode name='host-passthrough' supported='yes'/
+mode name='host-passthrough' supported='yes'
+  enum name='hostPassthroughMigratable'
+valueon/value
+valueoff/value
+  /enum
+/mode
 mode name='host-model' supported='yes'
   model fallback='allow'Broadwell/model
   vendorIntel/vendor
@@ -227,7 +232,11 @@
 
 
   host-passthrough
-  No mode specific details are provided.
+  
+The hostPassthroughMigratable enum shows possible values
+of the migratable attribute for the cpu element
+with mode='host-passthrough' in the domain XML.
+  
 
   host-model
   
diff --git a/docs/schemas/domaincaps.rng b/docs/schemas/domaincaps.rng
index 682cc82177..325581476d 100644
--- a/docs/schemas/domaincaps.rng
+++ b/docs/schemas/domaincaps.rng
@@ -99,6 +99,9 @@
 host-passthrough
   
   
+  
+
+  
 
   
 
diff --git a/src/conf/domain_capabilities.c b/src/conf/domain_capabilities.c
index 921d795630..0fa8aee78e 100644
--- a/src/conf/domain_capabilities.c
+++ b/src/conf/domain_capabilities.c
@@ -412,10 +412,21 @@ virDomainCapsCPUFormat(virBufferPtr buf,
 virBufferAddLit(buf, "\n");
 virBufferAdjustIndent(buf, 2);
 
-virBufferAsprintf(buf, "\n",
+virBufferAsprintf(buf, "hostPassthrough ? "yes" : "no");
 
+if (cpu->hostPassthrough && cpu->hostPassthroughMigratable.report) {
+virBufferAddLit(buf, ">\n");
+virBufferAdjustIndent(buf, 2);
+ENUM_PROCESS(cpu, hostPassthroughMigratable,
+ virTristateSwitchTypeToString);
+virBufferAdjustIndent(buf, -2);
+virBufferAddLit(buf, "\n");
+} else {
+virBufferAddLit(buf, "/>\n");
+}
+
 virBufferAsprintf(buf, "hostModel) {
diff --git a/src/conf/domain_capabilities.h b/src/conf/domain_capabilities.h
index 9f4a23d015..685d5e2a44 100644
--- a/src/conf/domain_capabilities.h
+++ b/src/conf/domain_capabilities.h
@@ -145,6 +145,7 @@ typedef struct _virDomainCapsCPU virDomainCapsCPU;
 typedef virDomainCapsCPU *virDomainCapsCPUPtr;
 struct _virDomainCapsCPU {
 bool hostPassthrough;
+virDomainCapsEnum hostPassthroughMigratable;
 virCPUDefPtr hostModel;
 virDomainCapsCPUModelsPtr custom;
 };
-- 
2.27.0



[libvirt PATCH 8/9] qemu: Fill default value in //cpu/@migratable attribute

2020-06-05 Thread Jiri Denemark
Before QEMU introduced migratable CPU property, "-cpu host" included all
features that could be enabled on the host, even those which would block
migration. In other words, the default was equivalent to migratable=off.
When the migratable property was introduced, the default changed to
migratable=on. Let's record the default in domain XML.

Signed-off-by: Jiri Denemark 
---
 src/qemu/qemu_domain.c | 14 --
 .../migration-in-params-in.xml |  2 +-
 .../migration-out-params-in.xml|  2 +-
 .../qemuxml2xmloutdata/cpu-check-default-none.xml  |  2 +-
 tests/qemuxml2xmloutdata/cpu-host-kvmclock.xml |  2 +-
 .../cpu-host-passthrough-features.xml  |  2 +-
 tests/qemuxml2xmloutdata/kvm-features.xml  |  2 +-
 7 files changed, 18 insertions(+), 8 deletions(-)

diff --git a/src/qemu/qemu_domain.c b/src/qemu/qemu_domain.c
index 3239ac1a52..2dad823a86 100644
--- a/src/qemu/qemu_domain.c
+++ b/src/qemu/qemu_domain.c
@@ -4792,7 +4792,8 @@ qemuDomainDefSetDefaultCPU(virDomainDefPtr def,
 
 
 static int
-qemuDomainDefCPUPostParse(virDomainDefPtr def)
+qemuDomainDefCPUPostParse(virDomainDefPtr def,
+  virQEMUCapsPtr qemuCaps)
 {
 virCPUFeatureDefPtr sveFeature = NULL;
 bool sveVectorLengthsProvided = false;
@@ -4888,6 +4889,15 @@ qemuDomainDefCPUPostParse(virDomainDefPtr def)
 }
 }
 
+if (qemuCaps &&
+def->cpu->mode == VIR_CPU_MODE_HOST_PASSTHROUGH &&
+!def->cpu->migratable) {
+if (virQEMUCapsGet(qemuCaps, QEMU_CAPS_CPU_MIGRATABLE))
+def->cpu->migratable = VIR_TRISTATE_SWITCH_ON;
+else if (ARCH_IS_X86(def->os.arch))
+def->cpu->migratable = VIR_TRISTATE_SWITCH_OFF;
+}
+
 /* Nothing to be done if only CPU topology is specified. */
 if (def->cpu->mode == VIR_CPU_MODE_CUSTOM &&
 !def->cpu->model)
@@ -5033,7 +5043,7 @@ qemuDomainDefPostParse(virDomainDefPtr def,
 if (qemuDomainDefVcpusPostParse(def) < 0)
 return -1;
 
-if (qemuDomainDefCPUPostParse(def) < 0)
+if (qemuDomainDefCPUPostParse(def, qemuCaps) < 0)
 return -1;
 
 if (qemuDomainDefTsegPostParse(def, qemuCaps) < 0)
diff --git a/tests/qemustatusxml2xmldata/migration-in-params-in.xml 
b/tests/qemustatusxml2xmldata/migration-in-params-in.xml
index fdc2d39173..93450c38d5 100644
--- a/tests/qemustatusxml2xmldata/migration-in-params-in.xml
+++ b/tests/qemustatusxml2xmldata/migration-in-params-in.xml
@@ -277,7 +277,7 @@
   
   
 
-
+
 
   
   
diff --git a/tests/qemustatusxml2xmldata/migration-out-params-in.xml 
b/tests/qemustatusxml2xmldata/migration-out-params-in.xml
index 1956eac120..c1daab4dee 100644
--- a/tests/qemustatusxml2xmldata/migration-out-params-in.xml
+++ b/tests/qemustatusxml2xmldata/migration-out-params-in.xml
@@ -291,7 +291,7 @@
   
   
 
-
+
 
   
   
diff --git a/tests/qemuxml2xmloutdata/cpu-check-default-none.xml 
b/tests/qemuxml2xmloutdata/cpu-check-default-none.xml
index ddffb2f15b..9f6b043f2c 100644
--- a/tests/qemuxml2xmloutdata/cpu-check-default-none.xml
+++ b/tests/qemuxml2xmloutdata/cpu-check-default-none.xml
@@ -8,7 +8,7 @@
 hvm
 
   
-  
+  
   
   destroy
   restart
diff --git a/tests/qemuxml2xmloutdata/cpu-host-kvmclock.xml 
b/tests/qemuxml2xmloutdata/cpu-host-kvmclock.xml
index 6d8fa367c7..9414c41c7a 100644
--- a/tests/qemuxml2xmloutdata/cpu-host-kvmclock.xml
+++ b/tests/qemuxml2xmloutdata/cpu-host-kvmclock.xml
@@ -8,7 +8,7 @@
 hvm
 
   
-  
+  
   
 
   
diff --git a/tests/qemuxml2xmloutdata/cpu-host-passthrough-features.xml 
b/tests/qemuxml2xmloutdata/cpu-host-passthrough-features.xml
index 9a961eb1a1..bd1e50ef6a 100644
--- a/tests/qemuxml2xmloutdata/cpu-host-passthrough-features.xml
+++ b/tests/qemuxml2xmloutdata/cpu-host-passthrough-features.xml
@@ -13,7 +13,7 @@
 hvm
 
   
-  
+  
 
 
 
diff --git a/tests/qemuxml2xmloutdata/kvm-features.xml 
b/tests/qemuxml2xmloutdata/kvm-features.xml
index 7c554671b3..9c53eb4630 100644
--- a/tests/qemuxml2xmloutdata/kvm-features.xml
+++ b/tests/qemuxml2xmloutdata/kvm-features.xml
@@ -15,7 +15,7 @@
   
 
   
-  
+  
   
   destroy
   restart
-- 
2.27.0



[libvirt PATCH 0/9] qemu: Add support for -cpu host, migratable=on|off

2020-06-05 Thread Jiri Denemark


Jiri Denemark (9):
  conf: Use g_auto* in virCPUDefParseXML
  qemu: Probe for .migratable property of a CPU
  qemu: Probe for migrtability support in CPU expansion
  qemu: Avoid probing unsupported migratable CPU expansion
  conf: Introduce migratable attribute for the  element
  conf: Advertise migratable attribute for CPU in domcaps
  qemu: Advertise migratable attribute for CPU in domcaps
  qemu: Fill default value in //cpu/@migratable attribute
  qemu: Pass migratable=on|off property for -cpu host

 docs/formatdomain.html.in |  14 +-
 docs/formatdomaincaps.html.in |  13 +-
 docs/schemas/domaincaps.rng   |   3 +
 docs/schemas/domaincommon.rng |   5 +
 src/conf/cpu_conf.c   | 157 +-
 src/conf/cpu_conf.h   |   1 +
 src/conf/domain_capabilities.c|  13 +-
 src/conf/domain_capabilities.h|   1 +
 src/qemu/qemu_capabilities.c  |  28 +++-
 src/qemu/qemu_capabilities.h  |   4 +
 src/qemu/qemu_command.c   |  15 ++
 src/qemu/qemu_domain.c|  14 +-
 .../domaincapsdata/qemu_1.5.3-q35.x86_64.xml  |   6 +-
 tests/domaincapsdata/qemu_1.5.3.x86_64.xml|   6 +-
 .../domaincapsdata/qemu_1.6.0-q35.x86_64.xml  |   6 +-
 tests/domaincapsdata/qemu_1.6.0.x86_64.xml|   6 +-
 .../domaincapsdata/qemu_1.7.0-q35.x86_64.xml  |   6 +-
 tests/domaincapsdata/qemu_1.7.0.x86_64.xml|   6 +-
 .../domaincapsdata/qemu_2.1.1-q35.x86_64.xml  |   6 +-
 tests/domaincapsdata/qemu_2.1.1.x86_64.xml|   6 +-
 .../domaincapsdata/qemu_2.10.0-q35.x86_64.xml |   6 +-
 .../qemu_2.10.0-virt.aarch64.xml  |   6 +-
 tests/domaincapsdata/qemu_2.10.0.aarch64.xml  |   6 +-
 tests/domaincapsdata/qemu_2.10.0.ppc64.xml|   6 +-
 tests/domaincapsdata/qemu_2.10.0.s390x.xml|   6 +-
 tests/domaincapsdata/qemu_2.10.0.x86_64.xml   |   6 +-
 .../domaincapsdata/qemu_2.11.0-q35.x86_64.xml |   6 +-
 tests/domaincapsdata/qemu_2.11.0.s390x.xml|   6 +-
 tests/domaincapsdata/qemu_2.11.0.x86_64.xml   |   6 +-
 .../domaincapsdata/qemu_2.12.0-q35.x86_64.xml |   7 +-
 .../qemu_2.12.0-virt.aarch64.xml  |   6 +-
 tests/domaincapsdata/qemu_2.12.0.aarch64.xml  |   6 +-
 tests/domaincapsdata/qemu_2.12.0.ppc64.xml|   6 +-
 tests/domaincapsdata/qemu_2.12.0.s390x.xml|   6 +-
 tests/domaincapsdata/qemu_2.12.0.x86_64.xml   |   7 +-
 .../domaincapsdata/qemu_2.4.0-q35.x86_64.xml  |   6 +-
 tests/domaincapsdata/qemu_2.4.0.x86_64.xml|   6 +-
 .../domaincapsdata/qemu_2.5.0-q35.x86_64.xml  |   6 +-
 tests/domaincapsdata/qemu_2.5.0.x86_64.xml|   6 +-
 .../domaincapsdata/qemu_2.6.0-q35.x86_64.xml  |   6 +-
 .../qemu_2.6.0-virt.aarch64.xml   |   6 +-
 tests/domaincapsdata/qemu_2.6.0.aarch64.xml   |   6 +-
 tests/domaincapsdata/qemu_2.6.0.ppc64.xml |   6 +-
 tests/domaincapsdata/qemu_2.6.0.x86_64.xml|   6 +-
 .../domaincapsdata/qemu_2.7.0-q35.x86_64.xml  |   6 +-
 tests/domaincapsdata/qemu_2.7.0.s390x.xml |   6 +-
 tests/domaincapsdata/qemu_2.7.0.x86_64.xml|   6 +-
 .../domaincapsdata/qemu_2.8.0-q35.x86_64.xml  |   6 +-
 tests/domaincapsdata/qemu_2.8.0.s390x.xml |   6 +-
 tests/domaincapsdata/qemu_2.8.0.x86_64.xml|   6 +-
 .../domaincapsdata/qemu_2.9.0-q35.x86_64.xml  |   6 +-
 tests/domaincapsdata/qemu_2.9.0.ppc64.xml |   6 +-
 tests/domaincapsdata/qemu_2.9.0.s390x.xml |   6 +-
 tests/domaincapsdata/qemu_2.9.0.x86_64.xml|   6 +-
 .../domaincapsdata/qemu_3.0.0-q35.x86_64.xml  |   7 +-
 tests/domaincapsdata/qemu_3.0.0.ppc64.xml |   6 +-
 tests/domaincapsdata/qemu_3.0.0.s390x.xml |   6 +-
 tests/domaincapsdata/qemu_3.0.0.x86_64.xml|   7 +-
 .../domaincapsdata/qemu_3.1.0-q35.x86_64.xml  |   7 +-
 tests/domaincapsdata/qemu_3.1.0.ppc64.xml |   6 +-
 tests/domaincapsdata/qemu_3.1.0.x86_64.xml|   7 +-
 .../domaincapsdata/qemu_4.0.0-q35.x86_64.xml  |   7 +-
 .../qemu_4.0.0-virt.aarch64.xml   |   6 +-
 tests/domaincapsdata/qemu_4.0.0.aarch64.xml   |   6 +-
 tests/domaincapsdata/qemu_4.0.0.ppc64.xml |   6 +-
 tests/domaincapsdata/qemu_4.0.0.s390x.xml |   6 +-
 tests/domaincapsdata/qemu_4.0.0.x86_64.xml|   7 +-
 .../domaincapsdata/qemu_4.1.0-q35.x86_64.xml  |   7 +-
 tests/domaincapsdata/qemu_4.1.0.x86_64.xml|   7 +-
 .../domaincapsdata/qemu_4.2.0-q35.x86_64.xml  |   7 +-
 .../qemu_4.2.0-virt.aarch64.xml   |   6 +-
 tests/domaincapsdata/qemu_4.2.0.aarch64.xml   |   6 +-
 tests/domaincapsdata/qemu_4.2.0.ppc64.xml |   6 +-
 tests/domaincapsdata/qemu_4.2.0.s390x.xml |   6 +-
 tests/domaincapsdata/qemu_4.2.0.x86_64.xml|   7 +-
 .../domaincapsdata/qemu_5.0.0-q35.x86_64.xml  |   7 +-
 .../qemu_5.0.0-virt.aarch64.xml   |   6 +-
 tests/domaincapsdata/qemu_5.0.0.aarch64.xml   |   6 +-
 tests/domaincapsdata/qemu_5.0.0.ppc64.xml |   6 +-
 tests/domaincapsdata/qemu_5.0.0.x86_64.xml

[libvirt PATCH 2/9] qemu: Probe for .migratable property of a CPU

2020-06-05 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/qemu/qemu_capabilities.c  | 4 
 src/qemu/qemu_capabilities.h  | 3 +++
 tests/qemucapabilitiesdata/caps_2.12.0.x86_64.xml | 1 +
 tests/qemucapabilitiesdata/caps_3.0.0.x86_64.xml  | 1 +
 tests/qemucapabilitiesdata/caps_3.1.0.x86_64.xml  | 1 +
 tests/qemucapabilitiesdata/caps_4.0.0.x86_64.xml  | 1 +
 tests/qemucapabilitiesdata/caps_4.1.0.x86_64.xml  | 1 +
 tests/qemucapabilitiesdata/caps_4.2.0.x86_64.xml  | 1 +
 tests/qemucapabilitiesdata/caps_5.0.0.x86_64.xml  | 1 +
 tests/qemucapabilitiesdata/caps_5.1.0.x86_64.xml  | 1 +
 10 files changed, 15 insertions(+)

diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c
index f12769635a..3f5ddbd34e 100644
--- a/src/qemu/qemu_capabilities.c
+++ b/src/qemu/qemu_capabilities.c
@@ -582,6 +582,9 @@ VIR_ENUM_IMPL(virQEMUCaps,
   "tcg",
   "virtio-blk-pci.scsi.default.disabled",
   "pvscsi",
+
+  /* 370 */
+  "cpu.migratable",
 );
 
 
@@ -1641,6 +1644,7 @@ static struct virQEMUCapsStringFlags 
virQEMUCapsObjectPropsMemoryBackendMemfd[]
 static struct virQEMUCapsStringFlags virQEMUCapsObjectPropsMaxCPU[] = {
 { "unavailable-features", QEMU_CAPS_CPU_UNAVAILABLE_FEATURES },
 { "kvm-no-adjvtime", QEMU_CAPS_CPU_KVM_NO_ADJVTIME },
+{ "migratable", QEMU_CAPS_CPU_MIGRATABLE },
 };
 
 static virQEMUCapsObjectTypeProps virQEMUCapsObjectProps[] = {
diff --git a/src/qemu/qemu_capabilities.h b/src/qemu/qemu_capabilities.h
index 076ecad0f7..c07b3e6f08 100644
--- a/src/qemu/qemu_capabilities.h
+++ b/src/qemu/qemu_capabilities.h
@@ -564,6 +564,9 @@ typedef enum { /* virQEMUCapsFlags grouping marker for 
syntax-check */
 QEMU_CAPS_VIRTIO_BLK_SCSI_DEFAULT_DISABLED, /* virtio-blk-pci.scsi 
disabled by default */
 QEMU_CAPS_SCSI_PVSCSI, /* -device pvscsi */
 
+/* 370 */
+QEMU_CAPS_CPU_MIGRATABLE, /* -cpu ...,migratable=on|off */
+
 QEMU_CAPS_LAST /* this must always be the last item */
 } virQEMUCapsFlags;
 
diff --git a/tests/qemucapabilitiesdata/caps_2.12.0.x86_64.xml 
b/tests/qemucapabilitiesdata/caps_2.12.0.x86_64.xml
index 319dd6f2c3..1cb0957ed7 100644
--- a/tests/qemucapabilitiesdata/caps_2.12.0.x86_64.xml
+++ b/tests/qemucapabilitiesdata/caps_2.12.0.x86_64.xml
@@ -200,6 +200,7 @@
   
   
   
+  
   2011090
   0
   43100289
diff --git a/tests/qemucapabilitiesdata/caps_3.0.0.x86_64.xml 
b/tests/qemucapabilitiesdata/caps_3.0.0.x86_64.xml
index 40cff641a8..10b2661fe3 100644
--- a/tests/qemucapabilitiesdata/caps_3.0.0.x86_64.xml
+++ b/tests/qemucapabilitiesdata/caps_3.0.0.x86_64.xml
@@ -206,6 +206,7 @@
   
   
   
+  
   300
   0
   43100239
diff --git a/tests/qemucapabilitiesdata/caps_3.1.0.x86_64.xml 
b/tests/qemucapabilitiesdata/caps_3.1.0.x86_64.xml
index 3dbda4b3f3..7ff47aa348 100644
--- a/tests/qemucapabilitiesdata/caps_3.1.0.x86_64.xml
+++ b/tests/qemucapabilitiesdata/caps_3.1.0.x86_64.xml
@@ -209,6 +209,7 @@
   
   
   
+  
   392
   0
   43100240
diff --git a/tests/qemucapabilitiesdata/caps_4.0.0.x86_64.xml 
b/tests/qemucapabilitiesdata/caps_4.0.0.x86_64.xml
index bf7735caf3..e9fdf9cb1e 100644
--- a/tests/qemucapabilitiesdata/caps_4.0.0.x86_64.xml
+++ b/tests/qemucapabilitiesdata/caps_4.0.0.x86_64.xml
@@ -214,6 +214,7 @@
   
   
   
+  
   400
   0
   43100240
diff --git a/tests/qemucapabilitiesdata/caps_4.1.0.x86_64.xml 
b/tests/qemucapabilitiesdata/caps_4.1.0.x86_64.xml
index 8ce0f80e8a..d57cedd0db 100644
--- a/tests/qemucapabilitiesdata/caps_4.1.0.x86_64.xml
+++ b/tests/qemucapabilitiesdata/caps_4.1.0.x86_64.xml
@@ -220,6 +220,7 @@
   
   
   
+  
   4001000
   0
   43100241
diff --git a/tests/qemucapabilitiesdata/caps_4.2.0.x86_64.xml 
b/tests/qemucapabilitiesdata/caps_4.2.0.x86_64.xml
index 50ed35f092..2685c3219f 100644
--- a/tests/qemucapabilitiesdata/caps_4.2.0.x86_64.xml
+++ b/tests/qemucapabilitiesdata/caps_4.2.0.x86_64.xml
@@ -228,6 +228,7 @@
   
   
   
+  
   4002000
   0
   43100242
diff --git a/tests/qemucapabilitiesdata/caps_5.0.0.x86_64.xml 
b/tests/qemucapabilitiesdata/caps_5.0.0.x86_64.xml
index ba39fef713..0355518cbe 100644
--- a/tests/qemucapabilitiesdata/caps_5.0.0.x86_64.xml
+++ b/tests/qemucapabilitiesdata/caps_5.0.0.x86_64.xml
@@ -234,6 +234,7 @@
   
   
   
+  
   500
   0
   43100241
diff --git a/tests/qemucapabilitiesdata/caps_5.1.0.x86_64.xml 
b/tests/qemucapabilitiesdata/caps_5.1.0.x86_64.xml
index 3f538628b3..906fec41ee 100644
--- a/tests/qemucapabilitiesdata/caps_5.1.0.x86_64.xml
+++ b/tests/qemucapabilitiesdata/caps_5.1.0.x86_64.xml
@@ -234,6 +234,7 @@
   
   
   
+  
   550
   0
   43100242
-- 
2.27.0



[libvirt PATCH 4/9] qemu: Avoid probing unsupported migratable CPU expansion

2020-06-05 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/qemu/qemu_capabilities.c  |  1 +
 .../caps_2.10.0.s390x.replies | 22 -
 .../caps_2.11.0.s390x.replies | 22 -
 .../caps_2.12.0.s390x.replies | 22 -
 .../caps_2.8.0.s390x.replies  | 22 -
 .../caps_2.9.0.s390x.replies  | 22 -
 .../caps_3.0.0.s390x.replies  | 22 -
 .../caps_4.0.0.s390x.replies  | 48 +--
 .../caps_4.2.0.aarch64.replies| 48 +--
 .../caps_4.2.0.s390x.replies  | 48 +--
 .../caps_5.0.0.aarch64.replies| 48 +--
 11 files changed, 9 insertions(+), 316 deletions(-)

diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c
index dab3665f07..7a976b6bbc 100644
--- a/src/qemu/qemu_capabilities.c
+++ b/src/qemu/qemu_capabilities.c
@@ -3061,6 +3061,7 @@ virQEMUCapsProbeQMPHostCPU(virQEMUCapsPtr qemuCaps,
 
 /* Try to check migratability of each feature. */
 if (modelInfo &&
+virQEMUCapsGet(qemuCaps, 
QEMU_CAPS_QUERY_CPU_MODEL_EXPANSION_MIGRATABLE) &&
 qemuMonitorGetCPUModelExpansion(mon, type, cpu, false, fail_no_props,
 ) < 0)
 goto cleanup;
diff --git a/tests/qemucapabilitiesdata/caps_2.10.0.s390x.replies 
b/tests/qemucapabilitiesdata/caps_2.10.0.s390x.replies
index 9cae647bdf..4f7d17b4fe 100644
--- a/tests/qemucapabilitiesdata/caps_2.10.0.s390x.replies
+++ b/tests/qemucapabilitiesdata/caps_2.10.0.s390x.replies
@@ -14969,28 +14969,6 @@
   "id": "libvirt-35"
 }
 
-{
-  "execute": "query-cpu-model-expansion",
-  "arguments": {
-"type": "static",
-"model": {
-  "name": "host",
-  "props": {
-"migratable": false
-  }
-}
-  },
-  "id": "libvirt-36"
-}
-
-{
-  "id": "libvirt-36",
-  "error": {
-"class": "GenericError",
-"desc": "Property '.migratable' not found"
-  }
-}
-
 {
   "execute": "qmp_capabilities",
   "id": "libvirt-1"
diff --git a/tests/qemucapabilitiesdata/caps_2.11.0.s390x.replies 
b/tests/qemucapabilitiesdata/caps_2.11.0.s390x.replies
index 6b06303f7b..3096559c13 100644
--- a/tests/qemucapabilitiesdata/caps_2.11.0.s390x.replies
+++ b/tests/qemucapabilitiesdata/caps_2.11.0.s390x.replies
@@ -15270,28 +15270,6 @@
   "id": "libvirt-36"
 }
 
-{
-  "execute": "query-cpu-model-expansion",
-  "arguments": {
-"type": "static",
-"model": {
-  "name": "host",
-  "props": {
-"migratable": false
-  }
-}
-  },
-  "id": "libvirt-37"
-}
-
-{
-  "id": "libvirt-37",
-  "error": {
-"class": "GenericError",
-"desc": "Property '.migratable' not found"
-  }
-}
-
 {
   "execute": "qmp_capabilities",
   "id": "libvirt-1"
diff --git a/tests/qemucapabilitiesdata/caps_2.12.0.s390x.replies 
b/tests/qemucapabilitiesdata/caps_2.12.0.s390x.replies
index 93ad14a6b8..66543f62ee 100644
--- a/tests/qemucapabilitiesdata/caps_2.12.0.s390x.replies
+++ b/tests/qemucapabilitiesdata/caps_2.12.0.s390x.replies
@@ -16990,28 +16990,6 @@
   "id": "libvirt-38"
 }
 
-{
-  "execute": "query-cpu-model-expansion",
-  "arguments": {
-"type": "static",
-"model": {
-  "name": "host",
-  "props": {
-"migratable": false
-  }
-}
-  },
-  "id": "libvirt-39"
-}
-
-{
-  "id": "libvirt-39",
-  "error": {
-"class": "GenericError",
-"desc": "Property '.migratable' not found"
-  }
-}
-
 {
   "execute": "qmp_capabilities",
   "id": "libvirt-1"
diff --git a/tests/qemucapabilitiesdata/caps_2.8.0.s390x.replies 
b/tests/qemucapabilitiesdata/caps_2.8.0.s390x.replies
index 5db900ce80..da9ef050b6 100644
--- a/tests/qemucapabilitiesdata/caps_2.8.0.s390x.replies
+++ b/tests/qemucapabilitiesdata/caps_2.8.0.s390x.replies
@@ -13046,28 +13046,6 @@
   "id": "libvirt-35"
 }
 
-{
-  "execute": "query-cpu-model-expansion",
-  "arguments": {
-"type": "static",
-"model": {
-  "name": "host",
-  "props": {
-"migratable": false
-  }
-}
-  },
-  "id&

[libvirt PATCH 5/9] conf: Introduce migratable attribute for the element

2020-06-05 Thread Jiri Denemark
The attribute is only allowed for host-passthrough CPUs and it can be
used to request only migratable or all supported features to be enabled
in the virtual CPU.

Signed-off-by: Jiri Denemark 
---
 docs/formatdomain.html.in | 14 --
 docs/schemas/domaincommon.rng |  5 +
 src/conf/cpu_conf.c   | 27 +++
 src/conf/cpu_conf.h   |  1 +
 4 files changed, 45 insertions(+), 2 deletions(-)

diff --git a/docs/formatdomain.html.in b/docs/formatdomain.html.in
index 33cec1e6dd..6ebf19ae57 100644
--- a/docs/formatdomain.html.in
+++ b/docs/formatdomain.html.in
@@ -1490,7 +1490,7 @@
 ...
 
 
-cpu mode='host-passthrough'
+cpu mode='host-passthrough' migratable='off'
   cache mode='passthrough'/
   feature policy='disable' name='lahf_lm'/
 ...
@@ -1639,7 +1639,17 @@
   using host-passthrough is dangerous if the source and destination 
hosts
   are not identical in both hardware, QEMU version, microcode version
   and configuration. If such a migration is attempted then the guest 
may
-  hang or crash upon resuming execution on the destination host.
+  hang or crash upon resuming execution on the destination host.
+  Depending on hypervisor version the virtual CPU may or may not
+  contain features which may block migration even to an identical host.
+  Since 6.5.0 optional
+  migratable attribute may be used to explicitly request
+  such features to be removed from (on) or kept in
+  (off) the virtual CPU. This attribute does not make
+  migration to another host safer: even with
+  migratable='on' migration will be dangerous unless both
+  hosts are identical as described above.
+
 
 
 Both host-model and host-passthrough modes
diff --git a/docs/schemas/domaincommon.rng b/docs/schemas/domaincommon.rng
index 6727cd743b..19242a9a32 100644
--- a/docs/schemas/domaincommon.rng
+++ b/docs/schemas/domaincommon.rng
@@ -5469,6 +5469,11 @@
   
 
   
+  
+
+  
+
+  
   
 
   
diff --git a/src/conf/cpu_conf.c b/src/conf/cpu_conf.c
index 25648a946c..b40737e407 100644
--- a/src/conf/cpu_conf.c
+++ b/src/conf/cpu_conf.c
@@ -243,6 +243,7 @@ virCPUDefCopyWithoutModel(const virCPUDef *cpu)
 copy->cores = cpu->cores;
 copy->threads = cpu->threads;
 copy->arch = cpu->arch;
+copy->migratable = cpu->migratable;
 
 if (cpu->cache) {
 if (VIR_ALLOC(copy->cache) < 0)
@@ -333,6 +334,7 @@ virCPUDefParseXML(xmlXPathContextPtr ctxt,
 g_autofree char *fallback = NULL;
 g_autofree char *vendor_id = NULL;
 g_autofree char *tscScaling = NULL;
+g_autofree char *migratable = NULL;
 virHostCPUTscInfoPtr tsc = NULL;
 
 *cpu = NULL;
@@ -386,6 +388,26 @@ virCPUDefParseXML(xmlXPathContextPtr ctxt,
 def->mode = VIR_CPU_MODE_CUSTOM;
 }
 
+if ((migratable = virXMLPropString(ctxt->node, "migratable"))) {
+int val;
+
+if (def->mode != VIR_CPU_MODE_HOST_PASSTHROUGH) {
+virReportError(VIR_ERR_CONFIG_UNSUPPORTED, "%s",
+   _("Attribute migratable is only allowed for "
+ "host-passthrough CPU"));
+return -1;
+}
+
+if ((val = virTristateSwitchTypeFromString(migratable)) < 0) {
+virReportError(VIR_ERR_CONFIG_UNSUPPORTED,
+   _("Invalid value in migratable attribute: '%s'"),
+   migratable);
+return -1;
+}
+
+def->migratable = val;
+}
+
 if (def->type == VIR_CPU_TYPE_GUEST) {
 g_autofree char *match = virXMLPropString(ctxt->node, "match");
 g_autofree char *check = NULL;
@@ -698,6 +720,11 @@ virCPUDefFormatBufFull(virBufferPtr buf,
 virBufferAsprintf(, " check='%s'",
   virCPUCheckTypeToString(def->check));
 }
+
+if (def->mode == VIR_CPU_MODE_HOST_PASSTHROUGH && def->migratable) {
+virBufferAsprintf(, " migratable='%s'",
+  virTristateSwitchTypeToString(def->migratable));
+}
 }
 
 /* Format children */
diff --git a/src/conf/cpu_conf.h b/src/conf/cpu_conf.h
index a95d56d017..24c51e3a63 100644
--- a/src/conf/cpu_conf.h
+++ b/src/conf/cpu_conf.h
@@ -141,6 +141,7 @@ struct _virCPUDef {
 virCPUFeatureDefPtr features;
 virCPUCacheDefPtr cache;
 virHostCPUTscInfoPtr tsc;
+virTristateSwitch migratable; /* for host-passthrough mode */
 };
 
 virCPUDefPtr virCPUDefNew(void);
-- 
2.27.0



[libvirt PATCH 7/9] qemu: Advertise migratable attribute for CPU in domcaps

2020-06-05 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/qemu/qemu_capabilities.c  | 11 ++-
 tests/domaincapsdata/qemu_1.5.3-q35.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_1.5.3.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_1.6.0-q35.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_1.6.0.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_1.7.0-q35.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_1.7.0.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_2.1.1-q35.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_2.1.1.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_2.10.0-q35.x86_64.xml   |  6 +-
 tests/domaincapsdata/qemu_2.10.0-virt.aarch64.xml |  6 +-
 tests/domaincapsdata/qemu_2.10.0.aarch64.xml  |  6 +-
 tests/domaincapsdata/qemu_2.10.0.ppc64.xml|  6 +-
 tests/domaincapsdata/qemu_2.10.0.s390x.xml|  6 +-
 tests/domaincapsdata/qemu_2.10.0.x86_64.xml   |  6 +-
 tests/domaincapsdata/qemu_2.11.0-q35.x86_64.xml   |  6 +-
 tests/domaincapsdata/qemu_2.11.0.s390x.xml|  6 +-
 tests/domaincapsdata/qemu_2.11.0.x86_64.xml   |  6 +-
 tests/domaincapsdata/qemu_2.12.0-q35.x86_64.xml   |  7 ++-
 tests/domaincapsdata/qemu_2.12.0-virt.aarch64.xml |  6 +-
 tests/domaincapsdata/qemu_2.12.0.aarch64.xml  |  6 +-
 tests/domaincapsdata/qemu_2.12.0.ppc64.xml|  6 +-
 tests/domaincapsdata/qemu_2.12.0.s390x.xml|  6 +-
 tests/domaincapsdata/qemu_2.12.0.x86_64.xml   |  7 ++-
 tests/domaincapsdata/qemu_2.4.0-q35.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_2.4.0.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_2.5.0-q35.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_2.5.0.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_2.6.0-q35.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_2.6.0-virt.aarch64.xml  |  6 +-
 tests/domaincapsdata/qemu_2.6.0.aarch64.xml   |  6 +-
 tests/domaincapsdata/qemu_2.6.0.ppc64.xml |  6 +-
 tests/domaincapsdata/qemu_2.6.0.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_2.7.0-q35.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_2.7.0.s390x.xml |  6 +-
 tests/domaincapsdata/qemu_2.7.0.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_2.8.0-q35.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_2.8.0.s390x.xml |  6 +-
 tests/domaincapsdata/qemu_2.8.0.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_2.9.0-q35.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_2.9.0.ppc64.xml |  6 +-
 tests/domaincapsdata/qemu_2.9.0.s390x.xml |  6 +-
 tests/domaincapsdata/qemu_2.9.0.x86_64.xml|  6 +-
 tests/domaincapsdata/qemu_3.0.0-q35.x86_64.xml|  7 ++-
 tests/domaincapsdata/qemu_3.0.0.ppc64.xml |  6 +-
 tests/domaincapsdata/qemu_3.0.0.s390x.xml |  6 +-
 tests/domaincapsdata/qemu_3.0.0.x86_64.xml|  7 ++-
 tests/domaincapsdata/qemu_3.1.0-q35.x86_64.xml|  7 ++-
 tests/domaincapsdata/qemu_3.1.0.ppc64.xml |  6 +-
 tests/domaincapsdata/qemu_3.1.0.x86_64.xml|  7 ++-
 tests/domaincapsdata/qemu_4.0.0-q35.x86_64.xml|  7 ++-
 tests/domaincapsdata/qemu_4.0.0-virt.aarch64.xml  |  6 +-
 tests/domaincapsdata/qemu_4.0.0.aarch64.xml   |  6 +-
 tests/domaincapsdata/qemu_4.0.0.ppc64.xml |  6 +-
 tests/domaincapsdata/qemu_4.0.0.s390x.xml |  6 +-
 tests/domaincapsdata/qemu_4.0.0.x86_64.xml|  7 ++-
 tests/domaincapsdata/qemu_4.1.0-q35.x86_64.xml|  7 ++-
 tests/domaincapsdata/qemu_4.1.0.x86_64.xml|  7 ++-
 tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml|  7 ++-
 tests/domaincapsdata/qemu_4.2.0-virt.aarch64.xml  |  6 +-
 tests/domaincapsdata/qemu_4.2.0.aarch64.xml   |  6 +-
 tests/domaincapsdata/qemu_4.2.0.ppc64.xml |  6 +-
 tests/domaincapsdata/qemu_4.2.0.s390x.xml |  6 +-
 tests/domaincapsdata/qemu_4.2.0.x86_64.xml|  7 ++-
 tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml|  7 ++-
 tests/domaincapsdata/qemu_5.0.0-virt.aarch64.xml  |  6 +-
 tests/domaincapsdata/qemu_5.0.0.aarch64.xml   |  6 +-
 tests/domaincapsdata/qemu_5.0.0.ppc64.xml |  6 +-
 tests/domaincapsdata/qemu_5.0.0.x86_64.xml|  7 ++-
 tests/domaincapsdata/qemu_5.1.0-q35.x86_64.xml|  7 ++-
 tests/domaincapsdata/qemu_5.1.0.x86_64.xml|  7 ++-
 71 files changed, 376 insertions(+), 71 deletions(-)

diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c
index 7a976b6bbc..bd3b26d0d9 100644
--- a/src/qemu/qemu_capabilities.c
+++ b/src/qemu/qemu_capabilities.c
@@ -5857,9 +5857,18 @@ virQEMUCapsFillDomainCPUCaps(virQEMUCapsPtr qemuCaps,
 {
 if (virQEMUCapsIsCPUModeSupported(qemuCaps, hostarch, domCaps->virttype,
   VIR_CPU_MODE_HOST_PASSTHRO

[libvirt PATCH 1/9] conf: Use g_auto* in virCPUDefParseXML

2020-06-05 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/conf/cpu_conf.c | 130 +---
 1 file changed, 50 insertions(+), 80 deletions(-)

diff --git a/src/conf/cpu_conf.c b/src/conf/cpu_conf.c
index 1d02e23175..25648a946c 100644
--- a/src/conf/cpu_conf.c
+++ b/src/conf/cpu_conf.c
@@ -324,29 +324,26 @@ virCPUDefParseXML(xmlXPathContextPtr ctxt,
   virCPUType type,
   virCPUDefPtr *cpu)
 {
-virCPUDefPtr def = NULL;
-xmlNodePtr *nodes = NULL;
+g_autoptr(virCPUDef) def = NULL;
+g_autofree xmlNodePtr *nodes = NULL;
 VIR_XPATH_NODE_AUTORESTORE(ctxt);
 int n;
 size_t i;
-char *cpuMode;
-char *fallback = NULL;
-char *vendor_id = NULL;
-char *tscScaling = NULL;
+g_autofree char *cpuMode = NULL;
+g_autofree char *fallback = NULL;
+g_autofree char *vendor_id = NULL;
+g_autofree char *tscScaling = NULL;
 virHostCPUTscInfoPtr tsc = NULL;
-int ret = -1;
 
 *cpu = NULL;
 
-if (xpath && !(ctxt->node = virXPathNode(xpath, ctxt))) {
-ret = 0;
-goto cleanup;
-}
+if (xpath && !(ctxt->node = virXPathNode(xpath, ctxt)))
+return 0;
 
 if (!virXMLNodeNameEqual(ctxt->node, "cpu")) {
 virReportError(VIR_ERR_XML_ERROR, "%s",
_("XML does not contain expected 'cpu' element"));
-goto cleanup;
+return -1;
 }
 
 def = virCPUDefNew();
@@ -357,7 +354,7 @@ virCPUDefParseXML(xmlXPathContextPtr ctxt,
 virReportError(VIR_ERR_XML_ERROR, "%s",
_("'arch' element cannot be used inside 'cpu'"
  " element with 'match' attribute'"));
-goto cleanup;
+return -1;
 }
 def->type = VIR_CPU_TYPE_HOST;
 } else {
@@ -369,10 +366,9 @@ virCPUDefParseXML(xmlXPathContextPtr ctxt,
 
 if ((cpuMode = virXMLPropString(ctxt->node, "mode"))) {
 if (def->type == VIR_CPU_TYPE_HOST) {
-VIR_FREE(cpuMode);
 virReportError(VIR_ERR_CONFIG_UNSUPPORTED, "%s",
_("Attribute mode is only allowed for guest CPU"));
-goto cleanup;
+return -1;
 } else {
 def->mode = virCPUModeTypeFromString(cpuMode);
 
@@ -380,10 +376,8 @@ virCPUDefParseXML(xmlXPathContextPtr ctxt,
 virReportError(VIR_ERR_CONFIG_UNSUPPORTED,
_("Invalid mode attribute '%s'"),
cpuMode);
-VIR_FREE(cpuMode);
-goto cleanup;
+return -1;
 }
-VIR_FREE(cpuMode);
 }
 } else {
 if (def->type == VIR_CPU_TYPE_HOST)
@@ -393,67 +387,60 @@ virCPUDefParseXML(xmlXPathContextPtr ctxt,
 }
 
 if (def->type == VIR_CPU_TYPE_GUEST) {
-char *match = virXMLPropString(ctxt->node, "match");
-char *check;
+g_autofree char *match = virXMLPropString(ctxt->node, "match");
+g_autofree char *check = NULL;
 
 if (match) {
 def->match = virCPUMatchTypeFromString(match);
-VIR_FREE(match);
-
 if (def->match < 0) {
 virReportError(VIR_ERR_CONFIG_UNSUPPORTED, "%s",
_("Invalid match attribute for CPU "
  "specification"));
-goto cleanup;
+return -1;
 }
 }
 
 if ((check = virXMLPropString(ctxt->node, "check"))) {
 int value = virCPUCheckTypeFromString(check);
-VIR_FREE(check);
-
 if (value < 0) {
 virReportError(VIR_ERR_CONFIG_UNSUPPORTED, "%s",
_("Invalid check attribute for CPU "
  "specification"));
-goto cleanup;
+return -1;
 }
 def->check = value;
 }
 }
 
 if (def->type == VIR_CPU_TYPE_HOST) {
-char *arch = virXPathString("string(./arch[1])", ctxt);
+g_autofree char *arch = virXPathString("string(./arch[1])", ctxt);
 if (!arch) {
 virReportError(VIR_ERR_XML_ERROR, "%s",
_("Missing CPU architecture"));
-goto cleanup;
+return -1;
 }
 if ((def->arch = virArchFromString(arch)) == VIR_ARCH_NONE) {
 virReportError(VIR_ERR_CONFIG_UNSUPPORTED,
_("Unknown architecture %s"), arch);
-VIR_FREE(arch);
-goto cleanup;
+

[libvirt PATCH 9/9] qemu: Pass migratable=on|off property for -cpu host

2020-06-05 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/qemu/qemu_command.c | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/src/qemu/qemu_command.c b/src/qemu/qemu_command.c
index 419eca5675..d9e99d9d1a 100644
--- a/src/qemu/qemu_command.c
+++ b/src/qemu/qemu_command.c
@@ -6254,6 +6254,21 @@ qemuBuildCpuModelArgStr(virQEMUDriverPtr driver,
 }
 virBufferAddLit(buf, ",aarch64=off");
 }
+
+if (cpu->migratable) {
+if (virQEMUCapsGet(qemuCaps, QEMU_CAPS_CPU_MIGRATABLE)) {
+virBufferAsprintf(buf, ",migratable=%s",
+  
virTristateSwitchTypeToString(cpu->migratable));
+} else if (ARCH_IS_X86(def->os.arch) &&
+   cpu->migratable == VIR_TRISTATE_SWITCH_OFF) {
+/* This is the default on x86 */
+} else {
+virReportError(VIR_ERR_CONFIG_UNSUPPORTED, "%s",
+   _("Migratable attribute for host-passthrough "
+ "CPU is not supported by QEMU binary"));
+return -1;
+}
+}
 break;
 
 case VIR_CPU_MODE_HOST_MODEL:
-- 
2.27.0



[libvirt PATCH 3/9] qemu: Probe for migrtability support in CPU expansion

2020-06-05 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/qemu/qemu_capabilities.c  | 12 +++-
 src/qemu/qemu_capabilities.h  |  1 +
 tests/qemucapabilitiesdata/caps_2.10.0.x86_64.xml |  1 +
 tests/qemucapabilitiesdata/caps_2.11.0.x86_64.xml |  1 +
 tests/qemucapabilitiesdata/caps_2.12.0.x86_64.xml |  1 +
 tests/qemucapabilitiesdata/caps_2.9.0.x86_64.xml  |  1 +
 tests/qemucapabilitiesdata/caps_3.0.0.x86_64.xml  |  1 +
 tests/qemucapabilitiesdata/caps_3.1.0.x86_64.xml  |  1 +
 tests/qemucapabilitiesdata/caps_4.0.0.x86_64.xml  |  1 +
 tests/qemucapabilitiesdata/caps_4.1.0.x86_64.xml  |  1 +
 tests/qemucapabilitiesdata/caps_4.2.0.x86_64.xml  |  1 +
 tests/qemucapabilitiesdata/caps_5.0.0.x86_64.xml  |  1 +
 tests/qemucapabilitiesdata/caps_5.1.0.x86_64.xml  |  1 +
 13 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c
index 3f5ddbd34e..dab3665f07 100644
--- a/src/qemu/qemu_capabilities.c
+++ b/src/qemu/qemu_capabilities.c
@@ -585,6 +585,7 @@ VIR_ENUM_IMPL(virQEMUCaps,
 
   /* 370 */
   "cpu.migratable",
+  "query-cpu-model-expansion.migratable",
 );
 
 
@@ -5041,9 +5042,18 @@ virQEMUCapsInitProcessCaps(virQEMUCapsPtr qemuCaps)
 virQEMUCapsClear(qemuCaps, QEMU_CAPS_DEVICE_NVDIMM);
 
 if (ARCH_IS_X86(qemuCaps->arch) &&
-virQEMUCapsGet(qemuCaps, QEMU_CAPS_QUERY_CPU_MODEL_EXPANSION))
+virQEMUCapsGet(qemuCaps, QEMU_CAPS_QUERY_CPU_MODEL_EXPANSION)) {
 virQEMUCapsSet(qemuCaps, QEMU_CAPS_CPU_CACHE);
 
+/* Old x86 QEMU supported migratable:false property in
+ * query-cpu-model-expansion arguments even though it was not properly
+ * advertised as a CPU property.
+ */
+if (virQEMUCapsGet(qemuCaps, QEMU_CAPS_CPU_MIGRATABLE) ||
+qemuCaps->version < 2012000)
+virQEMUCapsSet(qemuCaps, 
QEMU_CAPS_QUERY_CPU_MODEL_EXPANSION_MIGRATABLE);
+}
+
 if (ARCH_IS_S390(qemuCaps->arch)) {
 /* Legacy assurance for QEMU_CAPS_CCW */
 if (!virQEMUCapsGet(qemuCaps, QEMU_CAPS_CCW) &&
diff --git a/src/qemu/qemu_capabilities.h b/src/qemu/qemu_capabilities.h
index c07b3e6f08..f085e67e11 100644
--- a/src/qemu/qemu_capabilities.h
+++ b/src/qemu/qemu_capabilities.h
@@ -566,6 +566,7 @@ typedef enum { /* virQEMUCapsFlags grouping marker for 
syntax-check */
 
 /* 370 */
 QEMU_CAPS_CPU_MIGRATABLE, /* -cpu ...,migratable=on|off */
+QEMU_CAPS_QUERY_CPU_MODEL_EXPANSION_MIGRATABLE, /* 
query-cpu-model-expansion supports migratable:false */
 
 QEMU_CAPS_LAST /* this must always be the last item */
 } virQEMUCapsFlags;
diff --git a/tests/qemucapabilitiesdata/caps_2.10.0.x86_64.xml 
b/tests/qemucapabilitiesdata/caps_2.10.0.x86_64.xml
index cb02723ada..8030de8b5f 100644
--- a/tests/qemucapabilitiesdata/caps_2.10.0.x86_64.xml
+++ b/tests/qemucapabilitiesdata/caps_2.10.0.x86_64.xml
@@ -185,6 +185,7 @@
   
   
   
+  
   201
   0
   43100287
diff --git a/tests/qemucapabilitiesdata/caps_2.11.0.x86_64.xml 
b/tests/qemucapabilitiesdata/caps_2.11.0.x86_64.xml
index 5245fc77dc..cf927c0bd6 100644
--- a/tests/qemucapabilitiesdata/caps_2.11.0.x86_64.xml
+++ b/tests/qemucapabilitiesdata/caps_2.11.0.x86_64.xml
@@ -191,6 +191,7 @@
   
   
   
+  
   2011000
   0
   43100288
diff --git a/tests/qemucapabilitiesdata/caps_2.12.0.x86_64.xml 
b/tests/qemucapabilitiesdata/caps_2.12.0.x86_64.xml
index 1cb0957ed7..d9de98eca4 100644
--- a/tests/qemucapabilitiesdata/caps_2.12.0.x86_64.xml
+++ b/tests/qemucapabilitiesdata/caps_2.12.0.x86_64.xml
@@ -201,6 +201,7 @@
   
   
   
+  
   2011090
   0
   43100289
diff --git a/tests/qemucapabilitiesdata/caps_2.9.0.x86_64.xml 
b/tests/qemucapabilitiesdata/caps_2.9.0.x86_64.xml
index 122d9509f1..866d1062bf 100644
--- a/tests/qemucapabilitiesdata/caps_2.9.0.x86_64.xml
+++ b/tests/qemucapabilitiesdata/caps_2.9.0.x86_64.xml
@@ -179,6 +179,7 @@
   
   
   
+  
   2009000
   0
   43100247
diff --git a/tests/qemucapabilitiesdata/caps_3.0.0.x86_64.xml 
b/tests/qemucapabilitiesdata/caps_3.0.0.x86_64.xml
index 10b2661fe3..ac8db37399 100644
--- a/tests/qemucapabilitiesdata/caps_3.0.0.x86_64.xml
+++ b/tests/qemucapabilitiesdata/caps_3.0.0.x86_64.xml
@@ -207,6 +207,7 @@
   
   
   
+  
   300
   0
   43100239
diff --git a/tests/qemucapabilitiesdata/caps_3.1.0.x86_64.xml 
b/tests/qemucapabilitiesdata/caps_3.1.0.x86_64.xml
index 7ff47aa348..bc013ecc08 100644
--- a/tests/qemucapabilitiesdata/caps_3.1.0.x86_64.xml
+++ b/tests/qemucapabilitiesdata/caps_3.1.0.x86_64.xml
@@ -210,6 +210,7 @@
   
   
   
+  
   392
   0
   43100240
diff --git a/tests/qemucapabilitiesdata/caps_4.0.0.x86_64.xml 
b/tests/qemucapabilitiesdata/caps_4.0.0.x86_64.xml
index e9fdf9cb1e..d7fb3c2a14 100644
--- a/tests/qemucapabilitiesdata/caps_4.0.0.x86_64.xml
+++ b/tests/qemucapabilitiesdata/caps_4.0.0.x86_64.xml
@@ -215,6 +215,7 @@
   
   
   
+ 

[libvirt PATCH] cpu_map: Distribute x86_Cooperlake.xml

2020-05-26 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---

I will push this as a build breaker once
https://gitlab.com/jirkade/libvirt/pipelines/149651008 pipeline
succeeds.

 src/cpu_map/Makefile.inc.am | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/cpu_map/Makefile.inc.am b/src/cpu_map/Makefile.inc.am
index 5d9190e27d..62403d2ed0 100644
--- a/src/cpu_map/Makefile.inc.am
+++ b/src/cpu_map/Makefile.inc.am
@@ -29,6 +29,7 @@ cpumap_DATA = \
cpu_map/x86_Cascadelake-Server.xml \
cpu_map/x86_Cascadelake-Server-noTSX.xml \
cpu_map/x86_Conroe.xml \
+   cpu_map/x86_Cooperlake.xml \
cpu_map/x86_core2duo.xml \
cpu_map/x86_coreduo.xml \
cpu_map/x86_cpu64-rhel5.xml \
-- 
2.26.2



Re: [PATCH v2 1/1] qemuProcessRefreshCPU: skip 'host-model' logic for pSeries guests

2020-05-25 Thread Jiri Denemark
On Mon, May 25, 2020 at 09:39:45 -0300, Daniel Henrique Barboza wrote:
> Commit v3.10.0-182-g237f045d9a ("qemu: Ignore fallback CPU attribute
> on reconnect") forced CPU 'fallback' to ALLOW, regardless of user
> choice. This fixed a situation in which guests created with older
> Libvirt versions, which used CPU mode 'host-model' in runtime, would
> fail to launch in a newer Libvirt if the fallback was set to FORBID.
> This would lead to a scenario where the CPU was translated to 'host-model'
> to 'custom', but then the FORBID setting would make the translation
> process fail.
> 
> PSeries can operate with 'host-model' in runtime due to specific PPC64
> mechanics regarding compatibility mode. The update() implementation of
> the cpuDriverPPC64 driver is a NO-OP if CPU mode is 'host-model', and
> the driver does not implement translate(). The commit mentioned above
> is causing PSeries guests to get their 'fallback' setting to ALLOW,
> overwriting user choice, exposing a design problem in
> qemuProcessRefreshCPU() - for PSeries guests, handling 'host-model'
> as it is being done does not apply.
> 
> All other cpuArchDrivers implements update() and changes guest mode
> to VIR_CPU_MODE_CUSTOM, meaning that PSeries is currently the only
> exception to this logic. Let's make it official.
> 
> https://bugzilla.redhat.com/show_bug.cgi?id=1660711
> 
> Suggested-by: Jiri Denemark 
> Signed-off-by: Daniel Henrique Barboza 
> ---
>  src/qemu/qemu_process.c | 9 +
>  1 file changed, 9 insertions(+)

Reviewed-by: Jiri Denemark 

Thanks and pushed.



Re: [PATCH 5/5] qemuProcessUpdateCPU: do not change 'fallback' to ALLOW for pSeries guests

2020-05-25 Thread Jiri Denemark
On Fri, May 22, 2020 at 16:56:20 -0300, Daniel Henrique Barboza wrote:
> Commit v3.10.0-182-g237f045d9a ("qemu: Ignore fallback CPU attribute
> on reconnect") forced CPU 'fallback' to ALLOW, regardless of user
> choice. This fixed a situation in which guests created with older
> Libvirt versions, which used CPU mode 'host-model' in runtime, would
> fail to launch in a newer Libvirt if the fallback was set to FORBID.
> This would lead to a scenario where the CPU was translated to 'host-model'
> to 'custom', but then the FORBID setting would make the translation
> process fail.
> 
> This fix has a side effect for PSeries guests. PSeries can operate
> with 'host-model' in runtime due to specific PPC64 mechanics regarding
> compatibility mode. In fact, the update() implementation of the
> cpuDriverPPC64 driver is a NO-OP if CPU mode is 'host-model', and
> the driver does not implement translate(). The result is that PSeries
> guests aren't affected by the problem, but they are being affected by
> the fix - users are seeing 'fallback' mode being changed without
> necessity during daemon restart.
> 
> All other cpuArchDrivers implements update() and changes guest mode
> to VIR_CPU_MODE_CUSTOM, meaning that PSeries is currently the only
> exception to this logic. Let's make it official.
> 
> https://bugzilla.redhat.com/show_bug.cgi?id=1660711
> 
> CC: Jiri Denemark 
> Signed-off-by: Daniel Henrique Barboza 
> ---
>  src/qemu/qemu_process.c | 8 +++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/src/qemu/qemu_process.c b/src/qemu/qemu_process.c
> index a1ef1d42b0..fec1720f33 100644
> --- a/src/qemu/qemu_process.c
> +++ b/src/qemu/qemu_process.c
> @@ -4347,8 +4347,14 @@ qemuProcessUpdateCPU(virQEMUDriverPtr driver,
>  
>  /* The host CPU model comes from host caps rather than QEMU caps so
>   * fallback must be allowed no matter what the user specified in the XML.
> + *
> + * Note: PSeries domains are able to run with host-model CPU by design,
> + * even on Libvirt newer than 2.3, never replacing host-model with
> + * custom in the virCPUUpdate() call prior to this function. It is not
> + * needed to change the user defined 'fallback' attribute in this case.
>   */
> -vm->def->cpu->fallback = VIR_CPU_FALLBACK_ALLOW;
> +if (!qemuDomainIsPSeries(vm->def))
> +vm->def->cpu->fallback = VIR_CPU_FALLBACK_ALLOW;
>  
>  if (qemuProcessFetchGuestCPU(driver, vm, asyncJob, , ) < 0)
>  return -1;

qemuProcessUpdateCPU should not be called at all in this case. The
caller (qemuProcessRefreshCPU) is supposed to decide whether the guest
CPU needs to be changed:

/* If the domain with a host-model CPU was started by an old libvirt
 * (< 2.3) which didn't replace the CPU with a custom one, let's do it now
 * since the rest of our code does not really expect a host-model CPU in a
 * running domain.
 */
if (vm->def->cpu->mode == VIR_CPU_MODE_HOST_MODEL) {
if (!(hostmig = virCPUCopyMigratable(host->arch, host)))
return -1;

if (!(cpu = virCPUDefCopyWithoutModel(hostmig)) ||
virCPUDefCopyModelFilter(cpu, hostmig, false,
 virQEMUCapsCPUFilterFeatures,
 >arch) < 0)
return -1;

if (virCPUUpdate(vm->def->os.arch, vm->def->cpu, cpu) < 0)
return -1;

if (qemuProcessUpdateCPU(driver, vm, QEMU_ASYNC_JOB_NONE) < 0)
return -1;

So better solution would be to move your new comment and check just
after the check for VIR_CPU_MODE_HOST_MODEL:

if (vm->def->cpu->mode == VIR_CPU_MODE_HOST_MODEL) {
/* PSeries... */
if (qemuDomainIsPSeries(vm->def))
return 0;

...

Jirka



Re: [PATCH 4/5] qemu_process.c: modernize qemuProcessUpdateCPU code path

2020-05-25 Thread Jiri Denemark
On Fri, May 22, 2020 at 16:56:19 -0300, Daniel Henrique Barboza wrote:
> Use automatic cleanup on qemuProcessUpdateCPU and the functions called
> by it.
> 
> Signed-off-by: Daniel Henrique Barboza 
> ---
>  src/qemu/qemu_process.c | 50 ++---
>  1 file changed, 17 insertions(+), 33 deletions(-)

Reviewed-by: Jiri Denemark 

I pushed patches 1-4.



Re: [PATCH 3/5] cpu_s390.c: modernize virCPUs390Update

2020-05-25 Thread Jiri Denemark
On Fri, May 22, 2020 at 16:56:18 -0300, Daniel Henrique Barboza wrote:
> Use automatic cleanup of variables.
> 
> Signed-off-by: Daniel Henrique Barboza 
> ---
>  src/cpu/cpu_s390.c | 18 +++---
>  1 file changed, 7 insertions(+), 11 deletions(-)

Reviewed-by: Jiri Denemark 



Re: [PATCH 2/5] cpu_arm.c: modernize virCPUarmUpdate

2020-05-25 Thread Jiri Denemark
On Fri, May 22, 2020 at 16:56:17 -0300, Daniel Henrique Barboza wrote:
> Use automatic cleanup of variables.
> 
> Signed-off-by: Daniel Henrique Barboza 
> ---
>  src/cpu/cpu_arm.c | 14 +-
>  1 file changed, 5 insertions(+), 9 deletions(-)

Reviewed-by: Jiri Denemark 



Re: [PATCH 1/5] cpu_conf.c: modernize virCPUDefCopyWithoutModel and virCPUDefCopy

2020-05-25 Thread Jiri Denemark
On Fri, May 22, 2020 at 16:56:16 -0300, Daniel Henrique Barboza wrote:
> Use automatic cleanup of variables.
> 
> Signed-off-by: Daniel Henrique Barboza 
> ---
>  src/conf/cpu_conf.c | 22 +++---
>  1 file changed, 7 insertions(+), 15 deletions(-)

Reviewed-by: Jiri Denemark 



[libvirt PATCH 0/3] cpu_map: Add Cooperlake x86 CPU model

2020-05-24 Thread Jiri Denemark
Jiri Denemark (3):
  cputest: Add data for Cooperlake CPU
  cpu_map: Add pschange-mc-no bit in IA32_ARCH_CAPABILITIES MSR
  cpu_map: Add Cooperlake x86 CPU model

 src/cpu_map/index.xml |1 +
 src/cpu_map/x86_Cooperlake.xml|   90 +
 src/cpu_map/x86_features.xml  |3 +
 tests/cputest.c   |1 +
 .../x86_64-cpuid-Cooperlake-disabled.xml  |7 +
 .../x86_64-cpuid-Cooperlake-enabled.xml   |   11 +
 .../x86_64-cpuid-Cooperlake-guest.xml |   32 +
 .../x86_64-cpuid-Cooperlake-host.xml  |   33 +
 .../x86_64-cpuid-Cooperlake-json.xml  |   15 +
 .../cputestdata/x86_64-cpuid-Cooperlake.json  | 1574 +
 tests/cputestdata/x86_64-cpuid-Cooperlake.sig |4 +
 tests/cputestdata/x86_64-cpuid-Cooperlake.xml |   68 +
 .../x86_64-cpuid-Core-i7-8550U-enabled.xml|2 +-
 .../x86_64-cpuid-Core-i7-8550U-guest.xml  |1 +
 .../x86_64-cpuid-Core-i7-8550U-host.xml   |1 +
 .../x86_64-cpuid-Core-i7-8550U-json.xml   |1 +
 ...64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml |2 +-
 ...6_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml |1 +
 ...86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml |1 +
 ...86_64-cpuid-Ryzen-9-3900X-12-Core-json.xml |1 +
 ...86_64-cpuid-Xeon-Platinum-9242-enabled.xml |2 +-
 .../x86_64-cpuid-Xeon-Platinum-9242-json.xml  |1 +
 .../domaincapsdata/qemu_4.2.0-q35.x86_64.xml  |1 +
 tests/domaincapsdata/qemu_4.2.0.x86_64.xml|1 +
 .../domaincapsdata/qemu_5.0.0-q35.x86_64.xml  |2 +
 .../domaincapsdata/qemu_5.0.0-tcg.x86_64.xml  |1 +
 tests/domaincapsdata/qemu_5.0.0.x86_64.xml|2 +
 .../domaincapsdata/qemu_5.1.0-q35.x86_64.xml  |2 +
 .../domaincapsdata/qemu_5.1.0-tcg.x86_64.xml  |1 +
 tests/domaincapsdata/qemu_5.1.0.x86_64.xml|2 +
 30 files changed, 1861 insertions(+), 3 deletions(-)
 create mode 100644 src/cpu_map/x86_Cooperlake.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Cooperlake-disabled.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Cooperlake-enabled.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Cooperlake-guest.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Cooperlake-host.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Cooperlake.json
 create mode 100644 tests/cputestdata/x86_64-cpuid-Cooperlake.sig
 create mode 100644 tests/cputestdata/x86_64-cpuid-Cooperlake.xml

-- 
2.26.2



[libvirt PATCH 1/3] cputest: Add data for Cooperlake CPU

2020-05-24 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 tests/cputest.c   |1 +
 .../x86_64-cpuid-Cooperlake-disabled.xml  |7 +
 .../x86_64-cpuid-Cooperlake-enabled.xml   |   11 +
 .../x86_64-cpuid-Cooperlake-guest.xml |   40 +
 .../x86_64-cpuid-Cooperlake-host.xml  |   41 +
 .../x86_64-cpuid-Cooperlake-json.xml  |   23 +
 .../cputestdata/x86_64-cpuid-Cooperlake.json  | 1574 +
 tests/cputestdata/x86_64-cpuid-Cooperlake.sig |4 +
 tests/cputestdata/x86_64-cpuid-Cooperlake.xml |   68 +
 9 files changed, 1769 insertions(+)
 create mode 100644 tests/cputestdata/x86_64-cpuid-Cooperlake-disabled.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Cooperlake-enabled.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Cooperlake-guest.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Cooperlake-host.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Cooperlake.json
 create mode 100644 tests/cputestdata/x86_64-cpuid-Cooperlake.sig
 create mode 100644 tests/cputestdata/x86_64-cpuid-Cooperlake.xml

diff --git a/tests/cputest.c b/tests/cputest.c
index 2bef3eb52f..b66ea7850e 100644
--- a/tests/cputest.c
+++ b/tests/cputest.c
@@ -1275,6 +1275,7 @@ mymain(void)
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-W3520", JSON_HOST);
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-X5460", JSON_NONE);
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Ice-Lake-Server", JSON_MODELS);
+DO_TEST_CPUID(VIR_ARCH_X86_64, "Cooperlake", JSON_MODELS);
 
  cleanup:
 #if WITH_QEMU
diff --git a/tests/cputestdata/x86_64-cpuid-Cooperlake-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-Cooperlake-disabled.xml
new file mode 100644
index 00..e7c59cef1e
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Cooperlake-disabled.xml
@@ -0,0 +1,7 @@
+
+
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Cooperlake-enabled.xml 
b/tests/cputestdata/x86_64-cpuid-Cooperlake-enabled.xml
new file mode 100644
index 00..2d7f83c80f
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Cooperlake-enabled.xml
@@ -0,0 +1,11 @@
+
+
+  
+  
+  
+  
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Cooperlake-guest.xml 
b/tests/cputestdata/x86_64-cpuid-Cooperlake-guest.xml
new file mode 100644
index 00..b5137e3c03
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Cooperlake-guest.xml
@@ -0,0 +1,40 @@
+
+  Cascadelake-Server
+  Intel
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Cooperlake-host.xml 
b/tests/cputestdata/x86_64-cpuid-Cooperlake-host.xml
new file mode 100644
index 00..52b352f4f1
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Cooperlake-host.xml
@@ -0,0 +1,41 @@
+
+  x86_64
+  Cascadelake-Server
+  Intel
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml 
b/tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml
new file mode 100644
index 00..e323d6205e
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml
@@ -0,0 +1,23 @@
+
+  Cascadelake-Server
+  Intel
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Cooperlake.json 
b/tests/cputestdata/x86_64-cpuid-Cooperlake.json
new file mode 100644
index 00..fd407affb6
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Cooperlake.json
@@ -0,0 +1,1574 @@
+{
+  "return": {
+"model": {
+  "name": "base",
+  "props": {
+"phys-bits": 0,
+"vmx-entry-load-rtit-ctl": false,
+"core-id": -1,
+"xlevel": 2147483656,
+"cmov": true,
+"ia64": false,
+"ssb-no": false,
+"aes": true,
+"vmx-apicv-xapic": true,
+"mmx": true,
+"rdpid": false,
+"vmx-page-walk-5": false,
+"vmx-page-walk-4": true,
+"arat": true,
+"gfni": false,
+"vmx-desc-exit": true,
+"ibrs-all": true,
+"pause-filter": false,
+"xsavec": true,
+"intel-pt": false,
+"vmx-cr8-store-exit": true,
+"hv-frequencies": false,
+"tsc-frequency": 0,
+"vmx-rdseed-exit": true,
+"xd": true,
+"x-intel-pt-auto-level": true,
+"hv-vendor-id": "",
+"vmx-eptp-switching": true,
+"kvm-asyncpf"

[libvirt PATCH 2/3] cpu_map: Add pschange-mc-no bit in IA32_ARCH_CAPABILITIES MSR

2020-05-24 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/cpu_map/x86_features.xml   | 3 +++
 tests/cputestdata/x86_64-cpuid-Cooperlake-guest.xml| 1 +
 tests/cputestdata/x86_64-cpuid-Cooperlake-host.xml | 1 +
 tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml | 1 +
 tests/cputestdata/x86_64-cpuid-Core-i7-8550U-enabled.xml   | 2 +-
 tests/cputestdata/x86_64-cpuid-Core-i7-8550U-guest.xml | 1 +
 tests/cputestdata/x86_64-cpuid-Core-i7-8550U-host.xml  | 1 +
 tests/cputestdata/x86_64-cpuid-Core-i7-8550U-json.xml  | 1 +
 .../cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml | 2 +-
 tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml | 1 +
 tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml  | 1 +
 tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-json.xml  | 1 +
 tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-enabled.xml  | 2 +-
 tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-json.xml | 1 +
 tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml | 1 +
 tests/domaincapsdata/qemu_4.2.0.x86_64.xml | 1 +
 tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml | 1 +
 tests/domaincapsdata/qemu_5.0.0.x86_64.xml | 1 +
 tests/domaincapsdata/qemu_5.1.0-q35.x86_64.xml | 1 +
 tests/domaincapsdata/qemu_5.1.0.x86_64.xml | 1 +
 20 files changed, 22 insertions(+), 3 deletions(-)

diff --git a/src/cpu_map/x86_features.xml b/src/cpu_map/x86_features.xml
index 2c4c29dc99..8525ae0fa5 100644
--- a/src/cpu_map/x86_features.xml
+++ b/src/cpu_map/x86_features.xml
@@ -509,6 +509,9 @@
   
 
   
+  
+
+  
   
 
   
diff --git a/tests/cputestdata/x86_64-cpuid-Cooperlake-guest.xml 
b/tests/cputestdata/x86_64-cpuid-Cooperlake-guest.xml
index b5137e3c03..db5598740c 100644
--- a/tests/cputestdata/x86_64-cpuid-Cooperlake-guest.xml
+++ b/tests/cputestdata/x86_64-cpuid-Cooperlake-guest.xml
@@ -35,6 +35,7 @@
   
   
   
+  
   
   
 
diff --git a/tests/cputestdata/x86_64-cpuid-Cooperlake-host.xml 
b/tests/cputestdata/x86_64-cpuid-Cooperlake-host.xml
index 52b352f4f1..6926b7c975 100644
--- a/tests/cputestdata/x86_64-cpuid-Cooperlake-host.xml
+++ b/tests/cputestdata/x86_64-cpuid-Cooperlake-host.xml
@@ -36,6 +36,7 @@
   
   
   
+  
   
   
 
diff --git a/tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml 
b/tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml
index e323d6205e..fc52805b2f 100644
--- a/tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml
+++ b/tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml
@@ -18,6 +18,7 @@
   
   
   
+  
   
   
 
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-enabled.xml 
b/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-enabled.xml
index 6c480eeacf..57f8ebabba 100644
--- a/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-enabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-enabled.xml
@@ -5,5 +5,5 @@
   
   
   
-  
+  
 
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-guest.xml 
b/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-guest.xml
index 92404e4d03..ed06515e99 100644
--- a/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-guest.xml
+++ b/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-guest.xml
@@ -26,6 +26,7 @@
   
   
   
+  
   
   
 
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-host.xml 
b/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-host.xml
index 7f6fe2eac3..7681c94649 100644
--- a/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-host.xml
+++ b/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-host.xml
@@ -27,4 +27,5 @@
   
   
   
+  
 
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-json.xml 
b/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-json.xml
index 645c0934c2..4774d39c7e 100644
--- a/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-json.xml
+++ b/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-json.xml
@@ -14,6 +14,7 @@
   
   
   
+  
   
   
 
diff --git a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml 
b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml
index def2fed823..641032e1b6 100644
--- a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml
@@ -6,5 +6,5 @@
   
   
   
-  
+  
 
diff --git a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml 
b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml
index 717e2fbfae..86e96e07ef 100644
--- a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml
+++ b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml
@@ -25,4 +25,5 @@
   
   
   
+  
 
diff --git a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml 
b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml
index 81930a84e7..c63fb00cfa 100644
--- a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml
+++ b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml

[libvirt PATCH 3/3] cpu_map: Add Cooperlake x86 CPU model

2020-05-24 Thread Jiri Denemark
The stepping range (10-11) is likely incomplete. QEMU uses 10 and the
CPUID data for Cooperlake show 11. We will update the range if needed
once more details about he CPU are available.

Signed-off-by: Jiri Denemark 
---
 src/cpu_map/index.xml |  1 +
 src/cpu_map/x86_Cooperlake.xml| 90 +++
 .../x86_64-cpuid-Cooperlake-guest.xml | 13 +--
 .../x86_64-cpuid-Cooperlake-host.xml  | 13 +--
 .../x86_64-cpuid-Cooperlake-json.xml  | 13 +--
 .../domaincapsdata/qemu_5.0.0-q35.x86_64.xml  |  1 +
 .../domaincapsdata/qemu_5.0.0-tcg.x86_64.xml  |  1 +
 tests/domaincapsdata/qemu_5.0.0.x86_64.xml|  1 +
 .../domaincapsdata/qemu_5.1.0-q35.x86_64.xml  |  1 +
 .../domaincapsdata/qemu_5.1.0-tcg.x86_64.xml  |  1 +
 tests/domaincapsdata/qemu_5.1.0.x86_64.xml|  1 +
 11 files changed, 103 insertions(+), 33 deletions(-)
 create mode 100644 src/cpu_map/x86_Cooperlake.xml

diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml
index 20646a031c..1486a29c65 100644
--- a/src/cpu_map/index.xml
+++ b/src/cpu_map/index.xml
@@ -54,6 +54,7 @@
 
 
 
+
 
 
 
diff --git a/src/cpu_map/x86_Cooperlake.xml b/src/cpu_map/x86_Cooperlake.xml
new file mode 100644
index 00..41bd210638
--- /dev/null
+++ b/src/cpu_map/x86_Cooperlake.xml
@@ -0,0 +1,90 @@
+
+  
+
+ 
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Cooperlake-guest.xml 
b/tests/cputestdata/x86_64-cpuid-Cooperlake-guest.xml
index db5598740c..f169458399 100644
--- a/tests/cputestdata/x86_64-cpuid-Cooperlake-guest.xml
+++ b/tests/cputestdata/x86_64-cpuid-Cooperlake-guest.xml
@@ -1,5 +1,5 @@
 
-  Cascadelake-Server
+  Cooperlake
   Intel
   
   
@@ -20,22 +20,13 @@
   
   
   
+  
   
-  
   
   
-  
-  
-  
   
   
   
   
-  
-  
-  
-  
-  
   
-  
 
diff --git a/tests/cputestdata/x86_64-cpuid-Cooperlake-host.xml 
b/tests/cputestdata/x86_64-cpuid-Cooperlake-host.xml
index 6926b7c975..b0777181bb 100644
--- a/tests/cputestdata/x86_64-cpuid-Cooperlake-host.xml
+++ b/tests/cputestdata/x86_64-cpuid-Cooperlake-host.xml
@@ -1,6 +1,6 @@
 
   x86_64
-  Cascadelake-Server
+  Cooperlake
   Intel
   
   
@@ -21,22 +21,13 @@
   
   
   
+  
   
-  
   
   
-  
-  
-  
   
   
   
   
-  
-  
-  
-  
-  
   
-  
 
diff --git a/tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml 
b/tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml
index fc52805b2f..fb319d547c 100644
--- a/tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml
+++ b/tests/cputestdata/x86_64-cpuid-Cooperlake-json.xml
@@ -1,24 +1,15 @@
 
-  Cascadelake-Server
+  Cooperlake
   Intel
   
   
   
   
+  
   
-  
   
-  
-  
-  
   
   
   
-  
-  
-  
-  
-  
   
-  
 
diff --git a/tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml 
b/tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml
index ff721530cd..fa945fc002 100644
--- a/tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml
+++ b/tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml
@@ -93,6 +93,7 @@
   EPYC-IBPB
   EPYC
   Dhyana
+  Cooperlake
   Conroe
   Cascadelake-Server-noTSX
   Cascadelake-Server
diff --git a/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml 
b/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml
index d567863f49..a0eeed7c2d 100644
--- a/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml
+++ b/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml
@@ -101,6 +101,7 @@
   EPYC-IBPB
   EPYC
   Dhyana
+  Cooperlake
   Conroe
   Cascadelake-Server-noTSX
   Cascadelake-Server
diff --git a/tests/domaincapsdata/qemu_5.0.0.x86_64.xml 
b/tests/domaincapsdata/qemu_5.0.0.x86_64.xml
index 2c6066003d..fbde7a6ba2 100644
--- a/tests/domaincapsdata/qemu_5.0.0.x86_64.xml
+++ b/tests/domaincapsdata/qemu_5.0.0.x86_64.xml
@@ -92,6 +92,7 @@
   EPYC-IBPB
   EPYC
   Dhyana
+  Cooperlake
   Conroe
   Cascadelake-Server-noTSX
   Cascadelake-Server
diff --git a/tests/domaincapsdata/qemu_5.1.0-q35.x86_64.xml 
b/tests/domaincapsdata/qemu_5.1.0-q35.x86_64.xml
index 9e484ccfd0..e152f7dec5 100644
--- a/tests/domaincapsdata/qemu_5.1.0-q35.x86_64.xml
+++ b/tests/domaincapsdata/qemu_5.1.0-q35.x86_64.xml
@@ -100,6 +100,7 @@
   EPYC-IBPB
   EPYC
   Dhyana
+  Cooperlake
   Conroe
   Cascadelake-Server-noTSX
   Cascadelake-Server
diff --git a/tests/domaincapsdata/qemu_5.1.0-tcg.x86_64.xml 
b/tests/domaincapsdata/qemu_5.1.0-tcg.x86_64.xml
index d567863f49..a0eeed7c2d 100644
--- a/tests/domaincapsdata/qemu_5.1.0

[libvirt PATCH v2 5/6] hostcpu: Implement virHostCPUGetSignature for s390

2020-05-22 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
Reviewed-by: Ján Tomko 
---
 src/util/virhostcpu.c | 21 ++-
 .../linux-s390x-with-frequency.signature  |  1 +
 2 files changed, 21 insertions(+), 1 deletion(-)
 create mode 100644 tests/virhostcpudata/linux-s390x-with-frequency.signature

diff --git a/src/util/virhostcpu.c b/src/util/virhostcpu.c
index a25a4fa333..39bbcf8ca8 100644
--- a/src/util/virhostcpu.c
+++ b/src/util/virhostcpu.c
@@ -1430,8 +1430,10 @@ virHostCPUReadSignature(virArch arch,
 g_autofree char *model = NULL;
 g_autofree char *stepping = NULL;
 g_autofree char *revision = NULL;
+g_autofree char *proc = NULL;
+g_autofree char *facilities = NULL;
 
-if (!ARCH_IS_X86(arch) && !ARCH_IS_PPC64(arch))
+if (!ARCH_IS_X86(arch) && !ARCH_IS_PPC64(arch) && !ARCH_IS_S390(arch))
 return 0;
 
 while (fgets(line, lineLen, cpuinfo)) {
@@ -1479,6 +1481,23 @@ virHostCPUReadSignature(virArch arch,
 *signature = g_strdup_printf("%s, rev %s", name, revision);
 return 0;
 }
+} else if (ARCH_IS_S390(arch)) {
+if (STREQ(parts[0], "vendor_id")) {
+if (!vendor)
+vendor = g_steal_pointer([1]);
+} else if (STREQ(parts[0], "processor 0")) {
+if (!proc)
+proc = g_steal_pointer([1]);
+} else if (STREQ(parts[0], "facilities")) {
+if (!facilities)
+facilities = g_steal_pointer([1]);
+}
+
+if (vendor && proc && facilities) {
+*signature = g_strdup_printf("%s, %s, facilities: %s",
+ vendor, proc, facilities);
+return 0;
+}
 }
 }
 
diff --git a/tests/virhostcpudata/linux-s390x-with-frequency.signature 
b/tests/virhostcpudata/linux-s390x-with-frequency.signature
new file mode 100644
index 00..70bb28a154
--- /dev/null
+++ b/tests/virhostcpudata/linux-s390x-with-frequency.signature
@@ -0,0 +1 @@
+IBM/S390, version = 00,  identification = 145F07,  machine = 2964, facilities: 
0 1 2 3 4 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 30 
31 32 33 34 35 36 37 40 41 42 43 44 45 46 47 48 49 50 51 52 53 55 57 64 65 66 
67 68 69 70 71 72 73 75 76 77 78 80 128 129 131 132 142 143
\ No newline at end of file
-- 
2.26.2



[libvirt PATCH 6/6] qemu: Invalidate capabilities when host CPU changes

2020-05-18 Thread Jiri Denemark
The host CPU related info stored in the capabilities cache is no longer
valid after the host CPU changes. This is not a frequent situation in
real world, but it can easily happen in nested scenarios when a disk
image is started with various CPUs.

https://bugzilla.redhat.com/show_bug.cgi?id=1778819

Signed-off-by: Jiri Denemark 
---
 src/qemu/qemu_capabilities.c | 24 
 src/qemu/qemu_capspriv.h |  1 +
 tests/qemucapsprobe.c|  2 +-
 3 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c
index d9b339cbfb..f12769635a 100644
--- a/src/qemu/qemu_capabilities.c
+++ b/src/qemu/qemu_capabilities.c
@@ -669,6 +669,7 @@ struct _virQEMUCaps {
 unsigned int kvmVersion;
 unsigned int libvirtVersion;
 unsigned int microcodeVersion;
+char *hostCPUSignature;
 char *package;
 char *kernelVersion;
 
@@ -1908,6 +1909,7 @@ virQEMUCapsPtr virQEMUCapsNewCopy(virQEMUCapsPtr qemuCaps)
 ret->version = qemuCaps->version;
 ret->kvmVersion = qemuCaps->kvmVersion;
 ret->microcodeVersion = qemuCaps->microcodeVersion;
+ret->hostCPUSignature = g_strdup(qemuCaps->hostCPUSignature);
 
 ret->package = g_strdup(qemuCaps->package);
 ret->kernelVersion = g_strdup(qemuCaps->kernelVersion);
@@ -1964,6 +1966,7 @@ void virQEMUCapsDispose(void *obj)
 VIR_FREE(qemuCaps->package);
 VIR_FREE(qemuCaps->kernelVersion);
 VIR_FREE(qemuCaps->binary);
+VIR_FREE(qemuCaps->hostCPUSignature);
 
 VIR_FREE(qemuCaps->gicCapabilities);
 
@@ -4093,6 +4096,7 @@ struct _virQEMUCapsCachePriv {
 virArch hostArch;
 unsigned int microcodeVersion;
 char *kernelVersion;
+char *hostCPUSignature;
 
 /* cache whether /dev/kvm is usable as runUid:runGuid */
 virTristateBool kvmUsable;
@@ -4109,6 +4113,7 @@ virQEMUCapsCachePrivFree(void *privData)
 
 VIR_FREE(priv->libDir);
 VIR_FREE(priv->kernelVersion);
+VIR_FREE(priv->hostCPUSignature);
 VIR_FREE(priv);
 }
 
@@ -4286,6 +4291,8 @@ virQEMUCapsLoadCache(virArch hostArch,
 goto cleanup;
 }
 
+qemuCaps->hostCPUSignature = virXPathString("string(./hostCPUSignature)", 
ctxt);
+
 if (virXPathBoolean("boolean(./package)", ctxt) > 0) {
 qemuCaps->package = virXPathString("string(./package)", ctxt);
 if (!qemuCaps->package)
@@ -4587,6 +4594,8 @@ virQEMUCapsFormatCache(virQEMUCapsPtr qemuCaps)
 
 virBufferAsprintf(, "%u\n",
   qemuCaps->microcodeVersion);
+virBufferEscapeString(, "%s\n",
+  qemuCaps->hostCPUSignature);
 
 if (qemuCaps->package)
 virBufferAsprintf(, "%s\n",
@@ -4814,6 +4823,15 @@ virQEMUCapsIsValid(void *data,
 }
 
 if (virQEMUCapsGet(qemuCaps, QEMU_CAPS_KVM)) {
+if (STRNEQ_NULLABLE(priv->hostCPUSignature, 
qemuCaps->hostCPUSignature)) {
+VIR_DEBUG("Outdated capabilities for '%s': host CPU changed "
+  "('%s' vs '%s')",
+  qemuCaps->binary,
+  priv->hostCPUSignature,
+  qemuCaps->hostCPUSignature);
+return false;
+}
+
 if (priv->microcodeVersion != qemuCaps->microcodeVersion) {
 VIR_DEBUG("Outdated capabilities for '%s': microcode version "
   "changed (%u vs %u)",
@@ -5286,6 +5304,7 @@ virQEMUCapsNewForBinaryInternal(virArch hostArch,
 const char *libDir,
 uid_t runUid,
 gid_t runGid,
+const char *hostCPUSignature,
 unsigned int microcodeVersion,
 const char *kernelVersion)
 {
@@ -5324,6 +5343,7 @@ virQEMUCapsNewForBinaryInternal(virArch hostArch,
 virQEMUCapsInitHostCPUModel(qemuCaps, hostArch, VIR_DOMAIN_VIRT_QEMU);
 
 if (virQEMUCapsGet(qemuCaps, QEMU_CAPS_KVM)) {
+qemuCaps->hostCPUSignature = g_strdup(hostCPUSignature);
 qemuCaps->microcodeVersion = microcodeVersion;
 
 qemuCaps->kernelVersion = g_strdup(kernelVersion);
@@ -5349,6 +5369,7 @@ virQEMUCapsNewData(const char *binary,
priv->libDir,
priv->runUid,
priv->runGid,
+   priv->hostCPUSignature,
virHostCPUGetMicrocodeVersion(),
priv->kernelVersion);
 }
@@ -5448,6 +5469,9 @@ virQEMUCapsCacheNew(const char *libDir,
 
 priv->hostArch = virArchFromHost();
 
+if (virHostCPUGetSignature(>

[libvirt PATCH 4/6] hostcpu: Implement virHostCPUGetSignature for ppc64

2020-05-18 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/util/virhostcpu.c | 58 ---
 .../linux-ppc64-deconf-cpus.signature |  1 +
 .../linux-ppc64-subcores1.signature   |  1 +
 .../linux-ppc64-subcores2.signature   |  1 +
 .../linux-ppc64-subcores3.signature   |  1 +
 5 files changed, 41 insertions(+), 21 deletions(-)
 create mode 100644 tests/virhostcpudata/linux-ppc64-deconf-cpus.signature
 create mode 100644 tests/virhostcpudata/linux-ppc64-subcores1.signature
 create mode 100644 tests/virhostcpudata/linux-ppc64-subcores2.signature
 create mode 100644 tests/virhostcpudata/linux-ppc64-subcores3.signature

diff --git a/src/util/virhostcpu.c b/src/util/virhostcpu.c
index 851c0015f7..0ce895cb39 100644
--- a/src/util/virhostcpu.c
+++ b/src/util/virhostcpu.c
@@ -1429,8 +1429,9 @@ virHostCPUReadSignature(virArch arch,
 g_autofree char *family = NULL;
 g_autofree char *model = NULL;
 g_autofree char *stepping = NULL;
+g_autofree char *revision = NULL;
 
-if (!ARCH_IS_X86(arch))
+if (!ARCH_IS_X86(arch) && !ARCH_IS_PPC64(arch))
 return 0;
 
 while (fgets(line, lineLen, cpuinfo)) {
@@ -1442,27 +1443,42 @@ virHostCPUReadSignature(virArch arch,
 g_strstrip(parts[0]);
 g_strstrip(parts[1]);
 
-if (STREQ(parts[0], "vendor_id")) {
-if (!vendor)
-vendor = g_steal_pointer([1]);
-} else if (STREQ(parts[0], "model name")) {
-if (!name)
-name = g_steal_pointer([1]);
-} else if (STREQ(parts[0], "cpu family")) {
-if (!family)
-family = g_steal_pointer([1]);
-} else if (STREQ(parts[0], "model")) {
-if (!model)
-model = g_steal_pointer([1]);
-} else if (STREQ(parts[0], "stepping")) {
-if (!stepping)
-stepping = g_steal_pointer([1]);
-}
+if (ARCH_IS_X86(arch)) {
+if (STREQ(parts[0], "vendor_id")) {
+if (!vendor)
+vendor = g_steal_pointer([1]);
+} else if (STREQ(parts[0], "model name")) {
+if (!name)
+name = g_steal_pointer([1]);
+} else if (STREQ(parts[0], "cpu family")) {
+if (!family)
+family = g_steal_pointer([1]);
+} else if (STREQ(parts[0], "model")) {
+if (!model)
+model = g_steal_pointer([1]);
+} else if (STREQ(parts[0], "stepping")) {
+if (!stepping)
+stepping = g_steal_pointer([1]);
+}
 
-if (vendor && name && family && model && stepping) {
-*signature = g_strdup_printf("%s, %s, family: %s, model: %s, 
stepping: %s",
- vendor, name, family, model, 
stepping);
-return 0;
+if (vendor && name && family && model && stepping) {
+*signature = g_strdup_printf("%s, %s, family: %s, model: %s, 
stepping: %s",
+ vendor, name, family, model, 
stepping);
+return 0;
+}
+} else if (ARCH_IS_PPC64(arch)) {
+if (STREQ(parts[0], "cpu")) {
+if (!name)
+name = g_steal_pointer([1]);
+} else if (STREQ(parts[0], "revision")) {
+if (!revision)
+revision = g_steal_pointer([1]);
+}
+
+if (name && revision) {
+*signature = g_strdup_printf("%s, rev %s", name, revision);
+return 0;
+}
 }
 }
 
diff --git a/tests/virhostcpudata/linux-ppc64-deconf-cpus.signature 
b/tests/virhostcpudata/linux-ppc64-deconf-cpus.signature
new file mode 100644
index 00..7adf19db2f
--- /dev/null
+++ b/tests/virhostcpudata/linux-ppc64-deconf-cpus.signature
@@ -0,0 +1 @@
+POWER8E (raw), altivec supported, rev 2.1 (pvr 004b 0201)
\ No newline at end of file
diff --git a/tests/virhostcpudata/linux-ppc64-subcores1.signature 
b/tests/virhostcpudata/linux-ppc64-subcores1.signature
new file mode 100644
index 00..7adf19db2f
--- /dev/null
+++ b/tests/virhostcpudata/linux-ppc64-subcores1.signature
@@ -0,0 +1 @@
+POWER8E (raw), altivec supported, rev 2.1 (pvr 004b 0201)
\ No newline at end of file
diff --git a/tests/virhostcpudata/linux-ppc64-subcores2.signature 
b/tests/virhostcpudata/linux-ppc64-subcores2.signature
new file mode 100644
index 00..7adf19db2f
--- /dev/null
+++ b/tests/virhostcpudata/linux-ppc64-subcores2.signature
@@ -0,0 +1 @@
+POWER8E (raw), altivec supported, rev 2.1 (pvr 004b 0201)
\ No newline at end of file
diff --git a/t

[libvirt PATCH 2/6] hostcpu: Introduce virHostCPUGetSignature

2020-05-18 Thread Jiri Denemark
The purpose of this function is to give a short description that would
be change when a host CPU is replaced with a different model. This is
currently implemented by reading /proc/cpuinfo.

It should be implemented for all architectures for which the QEMU driver
stores host CPU data in the capabilities cache. In other words for archs
that support host-model CPUs.

Signed-off-by: Jiri Denemark 
---
 src/libvirt_private.syms  |  2 ++
 src/util/virhostcpu.c | 37 ++
 src/util/virhostcpu.h |  2 ++
 src/util/virhostcpupriv.h |  4 
 tests/virhostcputest.c| 42 ++-
 5 files changed, 86 insertions(+), 1 deletion(-)

diff --git a/src/libvirt_private.syms b/src/libvirt_private.syms
index 935ef7303b..2bebb62b4f 100644
--- a/src/libvirt_private.syms
+++ b/src/libvirt_private.syms
@@ -2217,9 +2217,11 @@ virHostCPUGetMSR;
 virHostCPUGetOnline;
 virHostCPUGetOnlineBitmap;
 virHostCPUGetPresentBitmap;
+virHostCPUGetSignature;
 virHostCPUGetStats;
 virHostCPUGetThreadsPerSubcore;
 virHostCPUHasBitmap;
+virHostCPUReadSignature;
 virHostCPUStatsAssign;
 
 
diff --git a/src/util/virhostcpu.c b/src/util/virhostcpu.c
index 721d959d46..bfef022f64 100644
--- a/src/util/virhostcpu.c
+++ b/src/util/virhostcpu.c
@@ -1416,3 +1416,40 @@ virHostCPUGetTscInfo(void)
 #endif /* HAVE_LINUX_KVM_H && defined(KVM_GET_MSRS) && \
   (defined(__i386__) || defined(__x86_64__)) && \
   (defined(__linux__) || defined(__FreeBSD__)) */
+
+int
+virHostCPUReadSignature(virArch arch G_GNUC_UNUSED,
+FILE *cpuinfo G_GNUC_UNUSED,
+char **signature G_GNUC_UNUSED)
+{
+return 0;
+}
+
+#ifdef __linux__
+
+int
+virHostCPUGetSignature(char **signature)
+{
+g_autoptr(FILE) cpuinfo = NULL;
+
+*signature = NULL;
+
+if (!(cpuinfo = fopen(CPUINFO_PATH, "r"))) {
+virReportSystemError(errno, _("Failed to open cpuinfo file '%s'"),
+ CPUINFO_PATH);
+return -1;
+}
+
+return virHostCPUReadSignature(virArchFromHost(), cpuinfo, signature);
+}
+
+#else
+
+int
+virHostCPUGetSignature(char **signature)
+{
+*signature = NULL;
+return 0;
+}
+
+#endif /* __linux__ */
diff --git a/src/util/virhostcpu.h b/src/util/virhostcpu.h
index 9be2e51a38..48b1431ca4 100644
--- a/src/util/virhostcpu.h
+++ b/src/util/virhostcpu.h
@@ -79,3 +79,5 @@ int virHostCPUGetMSR(unsigned long index,
  uint64_t *msr);
 
 virHostCPUTscInfoPtr virHostCPUGetTscInfo(void);
+
+int virHostCPUGetSignature(char **signature);
diff --git a/src/util/virhostcpupriv.h b/src/util/virhostcpupriv.h
index afb415f9ea..f7b1e7c93c 100644
--- a/src/util/virhostcpupriv.h
+++ b/src/util/virhostcpupriv.h
@@ -42,3 +42,7 @@ int virHostCPUGetStatsLinux(FILE *procstat,
 virNodeCPUStatsPtr params,
 int *nparams);
 #endif
+
+int virHostCPUReadSignature(virArch arch,
+FILE *cpuinfo,
+char **signature);
diff --git a/tests/virhostcputest.c b/tests/virhostcputest.c
index 70a723098b..62bacddefb 100644
--- a/tests/virhostcputest.c
+++ b/tests/virhostcputest.c
@@ -1,6 +1,7 @@
 #include 
 
 #include 
+#include 
 
 #include "testutils.h"
 #include "internal.h"
@@ -193,6 +194,38 @@ linuxTestHostCPU(const void *opaque)
 return result;
 }
 
+
+static int
+hostCPUSignature(const void *opaque)
+{
+const struct linuxTestHostCPUData *data = opaque;
+const char *arch = virArchToString(data->arch);
+g_autofree char *cpuinfo = NULL;
+g_autofree char *expected = NULL;
+g_autofree char *signature = NULL;
+g_autoptr(FILE) f = NULL;
+
+cpuinfo = g_strdup_printf("%s/virhostcpudata/linux-%s-%s.cpuinfo",
+  abs_srcdir, arch, data->testName);
+expected = g_strdup_printf("%s/virhostcpudata/linux-%s-%s.signature",
+   abs_srcdir, arch, data->testName);
+
+if (!(f = fopen(cpuinfo, "r"))) {
+virReportSystemError(errno,
+ "Failed to open cpuinfo file '%s'", cpuinfo);
+return -1;
+}
+
+if (virHostCPUReadSignature(data->arch, f, ) < 0)
+return -1;
+
+if (!signature && !virFileExists(expected))
+return 0;
+
+return virTestCompareToFile(signature, expected);
+}
+
+
 struct nodeCPUStatsData {
 const char *name;
 int ncpus;
@@ -268,10 +301,17 @@ mymain(void)
 if (virInitialize() < 0)
 return EXIT_FAILURE;
 
-for (i = 0; i < G_N_ELEMENTS(nodeData); i++)
+for (i = 0; i < G_N_ELEMENTS(nodeData); i++) {
+g_autofree char *sigTest = NULL;
+
 if (virTestRun(nodeData[i].testName, linuxTestHostCPU, [i]) 
!= 0)
 ret = -1;
 
+sigTest = g_strdup_printf("%s C

[libvirt PATCH 3/6] hostcpu: Implement virHostCPUGetSignature for x86

2020-05-18 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/util/virhostcpu.c | 50 +--
 .../linux-x86_64-test1.signature  |  1 +
 .../linux-x86_64-test2.signature  |  1 +
 .../linux-x86_64-test3.signature  |  1 +
 .../linux-x86_64-test4.signature  |  1 +
 .../linux-x86_64-test5.signature  |  1 +
 .../linux-x86_64-test6.signature  |  1 +
 .../linux-x86_64-test7.signature  |  1 +
 .../linux-x86_64-test8.signature  |  1 +
 .../linux-x86_64-with-die.signature   |  1 +
 10 files changed, 56 insertions(+), 3 deletions(-)
 create mode 100644 tests/virhostcpudata/linux-x86_64-test1.signature
 create mode 100644 tests/virhostcpudata/linux-x86_64-test2.signature
 create mode 100644 tests/virhostcpudata/linux-x86_64-test3.signature
 create mode 100644 tests/virhostcpudata/linux-x86_64-test4.signature
 create mode 100644 tests/virhostcpudata/linux-x86_64-test5.signature
 create mode 100644 tests/virhostcpudata/linux-x86_64-test6.signature
 create mode 100644 tests/virhostcpudata/linux-x86_64-test7.signature
 create mode 100644 tests/virhostcpudata/linux-x86_64-test8.signature
 create mode 100644 tests/virhostcpudata/linux-x86_64-with-die.signature

diff --git a/src/util/virhostcpu.c b/src/util/virhostcpu.c
index bfef022f64..851c0015f7 100644
--- a/src/util/virhostcpu.c
+++ b/src/util/virhostcpu.c
@@ -1418,10 +1418,54 @@ virHostCPUGetTscInfo(void)
   (defined(__linux__) || defined(__FreeBSD__)) */
 
 int
-virHostCPUReadSignature(virArch arch G_GNUC_UNUSED,
-FILE *cpuinfo G_GNUC_UNUSED,
-char **signature G_GNUC_UNUSED)
+virHostCPUReadSignature(virArch arch,
+FILE *cpuinfo,
+char **signature)
 {
+size_t lineLen = 1024;
+g_autofree char *line = g_new0(char, lineLen);
+g_autofree char *vendor = NULL;
+g_autofree char *name = NULL;
+g_autofree char *family = NULL;
+g_autofree char *model = NULL;
+g_autofree char *stepping = NULL;
+
+if (!ARCH_IS_X86(arch))
+return 0;
+
+while (fgets(line, lineLen, cpuinfo)) {
+   g_auto(GStrv) parts = g_strsplit(line, ": ", 2);
+
+if (g_strv_length(parts) != 2)
+continue;
+
+g_strstrip(parts[0]);
+g_strstrip(parts[1]);
+
+if (STREQ(parts[0], "vendor_id")) {
+if (!vendor)
+vendor = g_steal_pointer([1]);
+} else if (STREQ(parts[0], "model name")) {
+if (!name)
+name = g_steal_pointer([1]);
+} else if (STREQ(parts[0], "cpu family")) {
+if (!family)
+family = g_steal_pointer([1]);
+} else if (STREQ(parts[0], "model")) {
+if (!model)
+model = g_steal_pointer([1]);
+} else if (STREQ(parts[0], "stepping")) {
+if (!stepping)
+stepping = g_steal_pointer([1]);
+}
+
+if (vendor && name && family && model && stepping) {
+*signature = g_strdup_printf("%s, %s, family: %s, model: %s, 
stepping: %s",
+ vendor, name, family, model, 
stepping);
+return 0;
+}
+}
+
 return 0;
 }
 
diff --git a/tests/virhostcpudata/linux-x86_64-test1.signature 
b/tests/virhostcpudata/linux-x86_64-test1.signature
new file mode 100644
index 00..953337a4cb
--- /dev/null
+++ b/tests/virhostcpudata/linux-x86_64-test1.signature
@@ -0,0 +1 @@
+GenuineIntel, Intel(R) Xeon(TM) CPU 2.80GHz, family: 15, model: 4, stepping: 8
diff --git a/tests/virhostcpudata/linux-x86_64-test2.signature 
b/tests/virhostcpudata/linux-x86_64-test2.signature
new file mode 100644
index 00..bbeb084944
--- /dev/null
+++ b/tests/virhostcpudata/linux-x86_64-test2.signature
@@ -0,0 +1 @@
+GenuineIntel, Intel(R) Core(TM)2 Duo CPU T9600  @ 2.80GHz, family: 6, 
model: 23, stepping: 10
diff --git a/tests/virhostcpudata/linux-x86_64-test3.signature 
b/tests/virhostcpudata/linux-x86_64-test3.signature
new file mode 100644
index 00..b94bbc1701
--- /dev/null
+++ b/tests/virhostcpudata/linux-x86_64-test3.signature
@@ -0,0 +1 @@
+AuthenticAMD, AMD Opteron(tm) Processor 6172, family: 16, model: 9, stepping: 1
diff --git a/tests/virhostcpudata/linux-x86_64-test4.signature 
b/tests/virhostcpudata/linux-x86_64-test4.signature
new file mode 100644
index 00..9237332d59
--- /dev/null
+++ b/tests/virhostcpudata/linux-x86_64-test4.signature
@@ -0,0 +1 @@
+GenuineIntel, Intel(R) Xeon(R) CPU E7- 8837  @ 2.67GHz, family: 6, model: 47, 
stepping: 2
diff --git a/tests/virhostcpudata/linux-x86_64-test5.signature 
b/tests/virhostcpudata/linux-x86_64-test5.signature
new file mode 100644
index 00..dbaba8ee08
--- /dev/null
+++ b/tests/virhostcpudata/linux-x86_64-test5.sig

[libvirt PATCH 1/6] util: Define g_autoptr callback for FILE

2020-05-18 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/util/virfile.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/util/virfile.h b/src/util/virfile.h
index 0a520a7522..7a92364a5c 100644
--- a/src/util/virfile.h
+++ b/src/util/virfile.h
@@ -89,6 +89,7 @@ static inline void virForceCloseHelper(int *fd)
  */
 #define VIR_AUTOCLOSE __attribute__((cleanup(virForceCloseHelper))) int
 
+G_DEFINE_AUTOPTR_CLEANUP_FUNC(FILE, fclose);
 
 /* Opaque type for managing a wrapper around a fd.  */
 struct _virFileWrapperFd;
-- 
2.26.2



[libvirt PATCH 0/6] qemu: Invalidate capabilities when host CPU changes

2020-05-18 Thread Jiri Denemark
The host CPU related info stored in the capabilities cache is no longer
valid after the host CPU changes. This is not a frequent situation in
real world, but it can easily happen in nested scenarios when a disk
image is started with various CPUs.

https://bugzilla.redhat.com/show_bug.cgi?id=1778819

Jiri Denemark (6):
  util: Define g_autoptr callback for FILE
  hostcpu: Introduce virHostCPUGetSignature
  hostcpu: Implement virHostCPUGetSignature for x86
  hostcpu: Implement virHostCPUGetSignature for ppc64
  hostcpu: Implement virHostCPUGetSignature for s390
  qemu: Invalidate capabilities when host CPU changes

 src/libvirt_private.syms  |   2 +
 src/qemu/qemu_capabilities.c  |  24 
 src/qemu/qemu_capspriv.h  |   1 +
 src/util/virfile.h|   1 +
 src/util/virhostcpu.c | 111 ++
 src/util/virhostcpu.h |   2 +
 src/util/virhostcpupriv.h |   4 +
 tests/qemucapsprobe.c |   2 +-
 .../linux-ppc64-deconf-cpus.signature |   1 +
 .../linux-ppc64-subcores1.signature   |   1 +
 .../linux-ppc64-subcores2.signature   |   1 +
 .../linux-ppc64-subcores3.signature   |   1 +
 .../linux-s390x-with-frequency.signature  |   1 +
 .../linux-x86_64-test1.signature  |   1 +
 .../linux-x86_64-test2.signature  |   1 +
 .../linux-x86_64-test3.signature  |   1 +
 .../linux-x86_64-test4.signature  |   1 +
 .../linux-x86_64-test5.signature  |   1 +
 .../linux-x86_64-test6.signature  |   1 +
 .../linux-x86_64-test7.signature  |   1 +
 .../linux-x86_64-test8.signature  |   1 +
 .../linux-x86_64-with-die.signature   |   1 +
 tests/virhostcputest.c|  42 ++-
 23 files changed, 201 insertions(+), 2 deletions(-)
 create mode 100644 tests/virhostcpudata/linux-ppc64-deconf-cpus.signature
 create mode 100644 tests/virhostcpudata/linux-ppc64-subcores1.signature
 create mode 100644 tests/virhostcpudata/linux-ppc64-subcores2.signature
 create mode 100644 tests/virhostcpudata/linux-ppc64-subcores3.signature
 create mode 100644 tests/virhostcpudata/linux-s390x-with-frequency.signature
 create mode 100644 tests/virhostcpudata/linux-x86_64-test1.signature
 create mode 100644 tests/virhostcpudata/linux-x86_64-test2.signature
 create mode 100644 tests/virhostcpudata/linux-x86_64-test3.signature
 create mode 100644 tests/virhostcpudata/linux-x86_64-test4.signature
 create mode 100644 tests/virhostcpudata/linux-x86_64-test5.signature
 create mode 100644 tests/virhostcpudata/linux-x86_64-test6.signature
 create mode 100644 tests/virhostcpudata/linux-x86_64-test7.signature
 create mode 100644 tests/virhostcpudata/linux-x86_64-test8.signature
 create mode 100644 tests/virhostcpudata/linux-x86_64-with-die.signature

-- 
2.26.2



[libvirt PATCH 5/6] hostcpu: Implement virHostCPUGetSignature for s390

2020-05-18 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/util/virhostcpu.c| 16 +++-
 .../linux-s390x-with-frequency.signature |  1 +
 2 files changed, 16 insertions(+), 1 deletion(-)
 create mode 100644 tests/virhostcpudata/linux-s390x-with-frequency.signature

diff --git a/src/util/virhostcpu.c b/src/util/virhostcpu.c
index 0ce895cb39..0caf7959ef 100644
--- a/src/util/virhostcpu.c
+++ b/src/util/virhostcpu.c
@@ -1430,8 +1430,9 @@ virHostCPUReadSignature(virArch arch,
 g_autofree char *model = NULL;
 g_autofree char *stepping = NULL;
 g_autofree char *revision = NULL;
+g_autofree char *proc = NULL;
 
-if (!ARCH_IS_X86(arch) && !ARCH_IS_PPC64(arch))
+if (!ARCH_IS_X86(arch) && !ARCH_IS_PPC64(arch) && !ARCH_IS_S390(arch))
 return 0;
 
 while (fgets(line, lineLen, cpuinfo)) {
@@ -1479,6 +1480,19 @@ virHostCPUReadSignature(virArch arch,
 *signature = g_strdup_printf("%s, rev %s", name, revision);
 return 0;
 }
+} else if (ARCH_IS_S390(arch)) {
+if (STREQ(parts[0], "vendor_id")) {
+if (!vendor)
+vendor = g_steal_pointer([1]);
+} else if (STREQ(parts[0], "processor 0")) {
+if (!proc)
+proc = g_steal_pointer([1]);
+}
+
+if (vendor && proc) {
+*signature = g_strdup_printf("%s, %s", vendor, proc);
+return 0;
+}
 }
 }
 
diff --git a/tests/virhostcpudata/linux-s390x-with-frequency.signature 
b/tests/virhostcpudata/linux-s390x-with-frequency.signature
new file mode 100644
index 00..6369870682
--- /dev/null
+++ b/tests/virhostcpudata/linux-s390x-with-frequency.signature
@@ -0,0 +1 @@
+IBM/S390, version = 00,  identification = 145F07,  machine = 2964
\ No newline at end of file
-- 
2.26.2



[libvirt PATCH] cpu_arm: Drop unused variable

2020-05-15 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---

Pushed. It is trivial and should fix the build on FreeBSD.

 src/cpu/cpu_arm.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c
index 66f6942ab9..6f6c6a1479 100644
--- a/src/cpu/cpu_arm.c
+++ b/src/cpu/cpu_arm.c
@@ -325,7 +325,6 @@ virCPUarmModelParse(xmlXPathContextPtr ctxt,
 {
 virCPUarmMapPtr map = data;
 g_autoptr(virCPUarmModel) model = NULL;
-g_autofree xmlNodePtr *nodes = NULL;
 g_autofree char *vendor = NULL;
 
 model = g_new0(virCPUarmModel, 1);
-- 
2.26.2



Re: [PATCH V5 0/4] Introduce getHost support for ARM CPU driver

2020-05-15 Thread Jiri Denemark
On Wed, May 13, 2020 at 18:48:28 +0800, Zhenyu Zheng wrote:
> Introduce getHost support for ARM CPU driver. First add
> some data about commonly used ARM CPU models, and their
> vendors into cpu_map, then added some helper methods as
> callbacks to load them. Read and parse vendor_id, part_id
> and CPU flags of local CPU from corresponding registers.
> 
> Signed-off-by: Zhenyu Zheng 
> 
> Zhenyu Zheng (4):
>   cpu: Introduce virCPUarmData and related struts
>   cpu: Add helper functions to parse vendor and model
>   cpu: Introduce getHost support for ARM CPU driver
>   cpu_map: Introduce ARM cpu models

Nice, there's a few minor issues that needs fixing, but since I already
did all of them and really checked the code compiles fine after each
patch and tested it can still detect the host CPU, I'll squash the
suggested changes and push the series.

Reviewed-by: Jiri Denemark 



Re: [PATCH V5 2/4] cpu: Add helper functions to parse vendor and model

2020-05-15 Thread Jiri Denemark
On Wed, May 13, 2020 at 18:48:32 +0800, Zhenyu Zheng wrote:
> Add helper functions to parse vendor and model for
> ARM CPUs, and use them as callbacks when load cpu
> maps.
> 
> Signed-off-by: Zhenyu Zheng 
> ---
>  src/cpu/cpu_arm.c | 159 +-
>  1 file changed, 158 insertions(+), 1 deletion(-)
> 
> diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c
> index 1bb0afb762..c7a6abfb22 100644
> --- a/src/cpu/cpu_arm.c
> +++ b/src/cpu/cpu_arm.c
> @@ -165,6 +165,7 @@ virCPUarmMapFree(virCPUarmMapPtr map)
>  virCPUarmVendorFree(map->vendors[i]);
>  g_free(map->vendors);
>  
> +
>  g_ptr_array_free(map->features, TRUE);
>  
>  g_free(map);

Unintentional change I guess.

> @@ -210,6 +211,160 @@ virCPUarmMapFeatureParse(xmlXPathContextPtr ctxt 
> G_GNUC_UNUSED,
>  return 0;
>  }
>  
> +static virCPUarmVendorPtr
> +virCPUarmVendorFindByID(virCPUarmMapPtr map,
> +unsigned long vendor_id)
> +{
> +size_t i;
> +
> +for (i = 0; i < map->nvendors; i++) {
> +if (map->vendors[i]->value == vendor_id)
> +return map->vendors[i];
> +}
> +
> +return NULL;
> +}
> +
> +
> +static virCPUarmVendorPtr
> +virCPUarmVendorFindByName(virCPUarmMapPtr map,
> +  const char *name)
> +{
> +size_t i;
> +
> +for (i = 0; i < map->nvendors; i++) {
> +if (STREQ(map->vendors[i]->name, name))
> +return map->vendors[i];
> +}
> +
> +return NULL;
> +}
> +
> +
> +static int
> +virCPUarmVendorParse(xmlXPathContextPtr ctxt,
> +   const char *name,
> +   void *data)

The indentation is still wrong.

> +{
> +virCPUarmMapPtr map = data;
> +g_autoptr(virCPUarmVendor) vendor = NULL;
> +
> +vendor = g_new0(virCPUarmVendor, 1);
> +vendor->name = g_strdup(name);
> +
> +if (virCPUarmVendorFindByName(map, vendor->name)) {
> +virReportError(VIR_ERR_INTERNAL_ERROR,
> +   _("CPU vendor %s already defined"),
> +   vendor->name);
> +return -1;
> +}
> +
> +if (virXPathULongHex("string(@value)", ctxt, >value) < 0) {
> +virReportError(VIR_ERR_INTERNAL_ERROR,
> +   "%s", _("Missing CPU vendor value"));
> +return -1;
> +}
> +
> +if (virCPUarmVendorFindByID(map, vendor->value)) {
> +virReportError(VIR_ERR_INTERNAL_ERROR,
> +   _("CPU vendor value 0x%2lx already defined"),
> +   vendor->value);
> +return -1;
> +}
> +
> +if (VIR_APPEND_ELEMENT(map->vendors, map->nvendors, vendor) < 0)
> +return -1;
> +
> +return 0;
> +}
> +
> +static virCPUarmModelPtr
> +virCPUarmModelFind(virCPUarmMapPtr map,
> +   const char *name)
> +{
> +size_t i;
> +
> +for (i = 0; i < map->nmodels; i++) {
> +if (STREQ(map->models[i]->name, name))
> +return map->models[i];
> +}
> +
> +return NULL;
> +}
> +
> +#if defined(__aarch64__)
> +static virCPUarmModelPtr
> +virCPUarmModelFindByPVR(virCPUarmMapPtr map,
> +unsigned long pvr)
> +{
> +size_t i;
> +
> +for (i = 0; i < map->nmodels; i++) {
> +if (map->models[i]->data.pvr == pvr)
> +return map->models[i];
> +}
> +
> +return NULL;
> +}
> +#endif

Apparently I didn't notice this in my last review...
virCPUarmModelFindByPVR should be moved to the next patch, otherwise
compilation would fail after this patch as the function is never used
here.

> +
> +static int
> +virCPUarmModelParse(xmlXPathContextPtr ctxt,
> +  const char *name,
> +  void *data)

Wrong indentation again.

> +{
> +virCPUarmMapPtr map = data;
> +virCPUarmModel *model;

g_autoptr(virCPUarmModel) model = NULL;

> +g_autofree xmlNodePtr *nodes = NULL;
> +g_autofree char *vendor = NULL;
> +
> +model = g_new0(virCPUarmModel, 1);
> +model->name = g_strdup(name);
> +
> +if (virCPUarmModelFind(map, model->name)) {
> +virReportError(VIR_ERR_INTERNAL_ERROR,
> +   _("CPU model %s already defined"),
> +   model->name);
> +return -1;
> +}
> +
> +if (virXPathBoolean("boolean(./vendor)", ctxt)) {
> +vendor = virXPathString("string(./vendor/@name)", ctxt);
> +if (!vendor) {
> +virReportError(VIR_ERR_INTERNAL_ERROR,
> +   _("Invalid vendor element in CPU model %s"),
> +   model->name);
> +return -1;
> +}
> +
> +if (!(model->vendor = virCPUarmVendorFindByName(map, vendor))) {
> +virReportError(VIR_ERR_INTERNAL_ERROR,
> +   _("Unknown vendor %s referenced by CPU model %s"),
> +   vendor, model->name);
> +return -1;
> +}
> +}
> +
> +if (!virXPathBoolean("boolean(./pvr)", ctxt)) {
> +

Re: [PATCH V5 3/4] cpu: Introduce getHost support for ARM CPU driver

2020-05-15 Thread Jiri Denemark
On Wed, May 13, 2020 at 18:48:34 +0800, Zhenyu Zheng wrote:
> Introduce getHost support for ARM CPU driver,
> read CPU vendor_id, part_id and flags from
> registers directly. These codes will only be
> compiled on aarch64 hardware.
> 
> Signed-off-by: Zhenyu Zheng 
> ---
>  src/cpu/cpu_arm.c | 162 ++
>  1 file changed, 162 insertions(+)
> 
> diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c
> index c7a6abfb22..6aef568503 100644
> --- a/src/cpu/cpu_arm.c
> +++ b/src/cpu/cpu_arm.c
> @@ -21,6 +21,10 @@
>   */
>  
>  #include 
> +#if defined(__aarch64__)
> +# include 
> +# include 
> +#endif
>  
>  #include "viralloc.h"
>  #include "cpu.h"
> @@ -31,6 +35,13 @@
>  #include "virxml.h"
>  
>  #define VIR_FROM_THIS VIR_FROM_CPU
> +#if defined(__aarch64__)
> +/* Shift bit mask for parsing cpu flags */
> +# define BIT_SHIFTS(n) (1UL << (n))
> +/* The current max number of cpu flags on ARM is 32 */
> +# define MAX_CPU_FLAGS 32
> +#endif
> +
>  
>  VIR_LOG_INIT("cpu.cpu_arm");
>  
> @@ -486,11 +497,162 @@ virCPUarmValidateFeatures(virCPUDefPtr cpu)
>  return 0;
>  }
>  
> +#if defined(__aarch64__)
> +/* Generate human readable flag list according to the order of */
> +/* AT_HWCAP bit map */
> +const char *aarch64_cpu_flags[MAX_CPU_FLAGS] = {
> +"fp", "asimd", "evtstrm", "aes", "pmull", "sha1", "sha2",
> +"crc32", "atomics", "fphp", "asimdhp", "cpuid", "asimdrdm",
> +"jscvt", "fcma", "lrcpc", "dcpop", "sha3", "sm3", "sm4",
> +"asimddp", "sha512", "sve", "asimdfhm", "dit", "uscat",
> +"ilrcpc", "flagm", "ssbs", "sb", "paca", "pacg"};
> +/**
> + * virCPUarmCpuDataFromRegs:
> + *
> + * @data: 64-bit arm CPU specific data
> + *
> + * Fetches CPU vendor_id and part_id from MIDR_EL1 register, parse CPU
> + * flags from AT_HWCAP. There are currently 32 valid flags  on ARM arch
> + * represented by each bit.
> + */
> +static int
> +virCPUarmCpuDataFromRegs(virCPUarmData *data)
> +{
> +unsigned long cpuid;
> +unsigned long hwcaps;
> +VIR_AUTOSTRINGLIST features = NULL;
> +int cpu_feature_index = 0;
> +size_t i;
> +
> +if (!(getauxval(AT_HWCAP) & HWCAP_CPUID)) {
> +virReportError(VIR_ERR_INTERNAL_ERROR, "%s",
> +   _("CPUID registers unavailable"));
> +return -1;
> +}
> +
> +/* read the cpuid data from MIDR_EL1 register */
> +asm("mrs %0, MIDR_EL1" : "=r" (cpuid));
> +VIR_DEBUG("CPUID read from register:  0x%016lx", cpuid);
> +
> +/* parse the coresponding part_id bits */
> +data->pvr = (cpuid >> 4) & 0xfff;
> +/* parse the coresponding vendor_id bits */
> +data->vendor_id = (cpuid >> 24) & 0xff;
> +
> +hwcaps = getauxval(AT_HWCAP);
> +VIR_DEBUG("CPU flags read from register:  0x%016lx", hwcaps);
> +
> +features = g_new0(char *, MAX_CPU_FLAGS + 1);
> +
> +/* shift bit map mask to parse for CPU flags */
> +for (i = 0; i < MAX_CPU_FLAGS; i++) {
> +if (hwcaps & BIT_SHIFTS(i)) {
> +features[cpu_feature_index] = g_strdup(aarch64_cpu_flags[i]);
> +cpu_feature_index++;
> +}
> +}
> +
> +if (cpu_feature_index > 0) {
> +data->features = g_steal_pointer();
> +data->nfeatures = cpu_feature_index;

There's no need for data->nfeatures as data->features is
NULL-terminated.

> +}
> +
> +return 0;
> +}
> +
> +static int
> +virCPUarmDecode(virCPUDefPtr cpu,
> +const virCPUarmData *cpuData,
> +virDomainCapsCPUModelsPtr models)
> +{
> +size_t i;
> +virCPUarmMapPtr map;
> +virCPUarmModelPtr model;
> +virCPUarmVendorPtr vendor = NULL;
> +
> +if (!cpuData || !(map = virCPUarmGetMap()))
> +return -1;
> +
> +if (!(model = virCPUarmModelFindByPVR(map, cpuData->pvr))) {
> +virReportError(VIR_ERR_OPERATION_FAILED,
> +   _("Cannot find CPU model with PVR 0x%03lx"),
> +   cpuData->pvr);
> +return -1;
> +}
> +
> +if (!virCPUModelIsAllowed(model->name, models)) {
> +virReportError(VIR_ERR_CONFIG_UNSUPPORTED,
> +   _("CPU model %s is not supported by hypervisor"),
> +   model->name);
> +return -1;
> +}
> +
> +cpu->model = g_strdup(model->name);
> +
> +if (cpuData->vendor_id &&
> +!(vendor = virCPUarmVendorFindByID(map, cpuData->vendor_id))) {
> +virReportError(VIR_ERR_OPERATION_FAILED,
> +   _("Cannot find CPU vendor with vendor id 0x%02lx"),
> +   cpuData->vendor_id);
> +return -1;
> +}
> +
> +if (vendor)
> +cpu->vendor = g_strdup(vendor->name);
> +
> +if (cpuData->nfeatures) {
> +cpu->nfeatures = cpuData->nfeatures;
> +if (VIR_ALLOC_N(cpu->features, cpu->nfeatures) < 0)
> +goto error;

Even better (and without cpuData->nfeatures):

if (cpuData->features) {
cpu->nfeatures = 

Re: [PATCH V5 4/4] cpu_map: Introduce ARM cpu models

2020-05-15 Thread Jiri Denemark
On Wed, May 13, 2020 at 18:48:36 +0800, Zhenyu Zheng wrote:
> Introduce vendors and some commonly used models
> for ARM arch, these will be used for virConnectionGetCapabilities
> for ARM CPUs.
> 
> Signed-off-by: Zhenyu Zheng 
> ---
>  src/cpu_map/Makefile.inc.am   |  7 +++
>  src/cpu_map/arm_Falkor.xml|  6 ++
>  src/cpu_map/arm_Kunpeng-920.xml   |  6 ++
>  src/cpu_map/arm_ThunderX299xx.xml |  6 ++
>  src/cpu_map/arm_cortex-a53.xml|  6 ++
>  src/cpu_map/arm_cortex-a57.xml|  6 ++
>  src/cpu_map/arm_cortex-a72.xml|  6 ++
>  src/cpu_map/arm_vendors.xml   | 14 ++
>  src/cpu_map/index.xml | 15 +++
>  9 files changed, 72 insertions(+)
>  create mode 100644 src/cpu_map/arm_Falkor.xml
>  create mode 100644 src/cpu_map/arm_Kunpeng-920.xml
>  create mode 100644 src/cpu_map/arm_ThunderX299xx.xml
>  create mode 100644 src/cpu_map/arm_cortex-a53.xml
>  create mode 100644 src/cpu_map/arm_cortex-a57.xml
>  create mode 100644 src/cpu_map/arm_cortex-a72.xml
>  create mode 100644 src/cpu_map/arm_vendors.xml
> 
> diff --git a/src/cpu_map/Makefile.inc.am b/src/cpu_map/Makefile.inc.am
> index be64c9a0d4..5d9190e27d 100644
> --- a/src/cpu_map/Makefile.inc.am
> +++ b/src/cpu_map/Makefile.inc.am
> @@ -2,7 +2,14 @@
>  
>  cpumapdir = $(pkgdatadir)/cpu_map
>  cpumap_DATA = \
> + cpu_map/arm_cortex-a53.xml \
> + cpu_map/arm_cortex-a57.xml \
> + cpu_map/arm_cortex-a72.xml \
>   cpu_map/arm_features.xml \
> + cpu_map/arm_Kunpeng-920.xml \
> + cpu_map/arm_ThunderX299xx.xml \
> + cpu_map/arm_Falkor.xml \
> + cpu_map/arm_vendors.xml \
>   cpu_map/index.xml \
>   cpu_map/ppc64_vendors.xml \
>   cpu_map/ppc64_POWER7.xml \
> diff --git a/src/cpu_map/arm_Falkor.xml b/src/cpu_map/arm_Falkor.xml
> new file mode 100644
> index 00..b8f34bbc02
> --- /dev/null
> +++ b/src/cpu_map/arm_Falkor.xml
> @@ -0,0 +1,6 @@
> +
> +  
> +
> +
> +  
> +

Looks ok now.

Jirka



Re: [PATCH V5 1/4] cpu: Introduce virCPUarmData and related struts

2020-05-15 Thread Jiri Denemark
On Wed, May 13, 2020 at 18:48:30 +0800, Zhenyu Zheng wrote:
> Introduce virCPUarmData to virCPUData and related
> structs to cpu_arm.c for ARM cpus.
> 
> Signed-off-by: Zhenyu Zheng 
> ---
>  src/cpu/Makefile.inc.am |  1 +
>  src/cpu/cpu.h   |  2 ++
>  src/cpu/cpu_arm.c   | 80 -
>  src/cpu/cpu_arm_data.h  | 32 +
>  4 files changed, 114 insertions(+), 1 deletion(-)
>  create mode 100644 src/cpu/cpu_arm_data.h
> 
...
> diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c
> index ee5802198f..1bb0afb762 100644
> --- a/src/cpu/cpu_arm.c
> +++ b/src/cpu/cpu_arm.c
...
> @@ -201,7 +279,6 @@ virCPUarmUpdate(virCPUDefPtr guest,
>  return ret;
>  }
>  
> -
>  static virCPUDefPtr
>  virCPUarmBaseline(virCPUDefPtr *cpus,
>unsigned int ncpus G_GNUC_UNUSED,

Unrelated and undone in the patch 2.

> @@ -259,6 +336,7 @@ struct cpuArchDriver cpuDriverArm = {
>  .compare = virCPUarmCompare,
>  .decode = NULL,
>  .encode = NULL,
> +.dataFree = virCPUarmDataFree,
>  .baseline = virCPUarmBaseline,
>  .update = virCPUarmUpdate,
>  .validateFeatures = virCPUarmValidateFeatures,
> diff --git a/src/cpu/cpu_arm_data.h b/src/cpu/cpu_arm_data.h
> new file mode 100644
> index 00..9b931cb8aa
> --- /dev/null
> +++ b/src/cpu/cpu_arm_data.h
> @@ -0,0 +1,32 @@
> +/*
> + * cpu_arm_data.h: 64-bit arm CPU specific data
> + *
> + * Copyright (C) 2020 Huawei Technologies Co., Ltd.
> + *
> + * This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU Lesser General Public
> + * License as published by the Free Software Foundation; either
> + * version 2.1 of the License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> + * Lesser General Public License for more details.
> + *
> + * You should have received a copy of the GNU Lesser General Public
> + * License along with this library;  If not, see
> + * .
> + *
> + */
> +
> +#pragma once
> +
> +#define VIR_CPU_ARM_DATA_INIT { 0 }
> +
> +typedef struct _virCPUarmData virCPUarmData;
> +struct _virCPUarmData {
> +unsigned long vendor_id;
> +unsigned long pvr;
> +char **features;
> +size_t nfeatures;

This is not necessary since features is NULL-terminated.

> +};

Jirka



[libvirt PATCH] cpu: Properly define g_autoptr for virCPUData

2020-05-15 Thread Jiri Denemark
The structure is not specific to x86 and thus its cleanup function
should be defined in cpu.h and be available to all users.

Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu.h | 1 +
 src/cpu/cpu_x86.c | 1 -
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h
index f779d2be17..1d7900a829 100644
--- a/src/cpu/cpu.h
+++ b/src/cpu/cpu.h
@@ -182,6 +182,7 @@ virCPUDataNew(virArch arch);
 
 void
 virCPUDataFree(virCPUDataPtr data);
+G_DEFINE_AUTOPTR_CLEANUP_FUNC(virCPUData, virCPUDataFree);
 
 bool
 virCPUGetHostIsSupported(virArch arch);
diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 9183259bce..e3c553e943 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -495,7 +495,6 @@ virCPUx86DataFree(virCPUDataPtr data)
 virCPUx86DataClear(>data.x86);
 VIR_FREE(data);
 }
-G_DEFINE_AUTOPTR_CLEANUP_FUNC(virCPUData, virCPUx86DataFree);
 
 
 static void
-- 
2.26.2



Re: [libvirt PATCH] qemu: reject readonly attribute for virtiofs

2020-05-13 Thread Jiri Denemark
On Wed, May 13, 2020 at 12:30:48 +0100, Daniel P. Berrangé wrote:
> On Wed, May 13, 2020 at 01:19:35PM +0200, Andrea Bolognani wrote:
...
> > I completely agree, #nnn is too ambiguous to be useful.
> 
> The widespread usage by any other project using GitLab/GitHub proves
> otherwise and libvirt isn't special in this regard.

This just means that either everyone uses the reference only as a simple
way of closing the associated issue or they use the web UI to look at
commits.

> We're all smart enough to understand this.

It's not really about understanding how to get to the issue. It's about
the effort needed to find the issue. I guess for most commits with the
short reference looking at the original issue would not be worth the
effort of finding it. Which is fine, we can safe time by not looking at
unimportant links.

> > We can have a simple prebuild check, similar to the one we already
> > use for DCO checking, which catches uses of
> > 
> >   Fixes #nnn
> > 
> > and similar and tells contributors to use a full URL instead.
> 
> This is needless extra work for contributors.

I guess I'm a bit strange, but to me pasting a complete link to an issue
is (if I even know such issue exists, of course) less work than
selecting just the number and prefixing it with '#'.

Either way I think fighting about such insignificant point is not the
best use of our time. Let's save it for more important battles we're
going to face, such as the switch to merge requests.

Jirka



Re: [PATCH V3 1/5] cpu_map: Introduce ARM cpu models

2020-05-12 Thread Jiri Denemark
On Wed, Apr 22, 2020 at 15:11:16 +0800, ZhengZhenyu wrote:
> Introduce vendors and some commonly used models
> for ARM arch, these will be used for virConnectionGetCapabilities
> for ARM CPUs.
> 
> Signed-off-by: Zhenyu Zheng 
> ---
>  src/cpu_map/Makefile.inc.am   |  7 +++
>  src/cpu_map/arm_Falkor.xml| 16 
>  src/cpu_map/arm_Kunpeng-920.xml   | 24 
>  src/cpu_map/arm_ThunderX299xx.xml | 16 
>  src/cpu_map/arm_cortex-a53.xml| 16 
>  src/cpu_map/arm_cortex-a57.xml| 15 +++
>  src/cpu_map/arm_cortex-a72.xml| 15 +++
>  src/cpu_map/arm_vendors.xml   | 14 ++
>  src/cpu_map/index.xml | 15 +++
>  9 files changed, 138 insertions(+)
>  create mode 100644 src/cpu_map/arm_Falkor.xml
>  create mode 100644 src/cpu_map/arm_Kunpeng-920.xml
>  create mode 100644 src/cpu_map/arm_ThunderX299xx.xml
>  create mode 100644 src/cpu_map/arm_cortex-a53.xml
>  create mode 100644 src/cpu_map/arm_cortex-a57.xml
>  create mode 100644 src/cpu_map/arm_cortex-a72.xml
>  create mode 100644 src/cpu_map/arm_vendors.xml

This patch should be moved just before the last one to make sure libvirt
can be built after each patch.

> 
> diff --git a/src/cpu_map/Makefile.inc.am b/src/cpu_map/Makefile.inc.am
> index be64c9a0d4..93c2b19ddf 100644
> --- a/src/cpu_map/Makefile.inc.am
> +++ b/src/cpu_map/Makefile.inc.am
> @@ -2,7 +2,14 @@
>  
>  cpumapdir = $(pkgdatadir)/cpu_map
>  cpumap_DATA = \
> +cpu_map/arm_cortex-a53.xml \

This line is indented with 4 spaces while it should start with a tab
instead.

> + cpu_map/arm_cortex-a57.xml \
> + cpu_map/arm_cortex-a72.xml \
>   cpu_map/arm_features.xml \
> + cpu_map/arm_Kunpeng-920.xml \
> + cpu_map/arm_ThunderX299xx.xml \
> + cpu_map/arm_Falkor.xml \
> + cpu_map/arm_vendors.xml \
>   cpu_map/index.xml \
>   cpu_map/ppc64_vendors.xml \
>   cpu_map/ppc64_POWER7.xml \
> diff --git a/src/cpu_map/arm_Falkor.xml b/src/cpu_map/arm_Falkor.xml
> new file mode 100644
> index 00..902ed2b6ba
> --- /dev/null
> +++ b/src/cpu_map/arm_Falkor.xml
> @@ -0,0 +1,16 @@
> +
> +  
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +

What is the purpose of the feature list here when you don't parse them
anywhere?

> +  
> +

Jirka



Re: [PATCH V3 5/5] cpu: Introduce getHost support for ARM CPU driver

2020-05-12 Thread Jiri Denemark
On Wed, Apr 22, 2020 at 15:11:24 +0800, ZhengZhenyu wrote:
> Introduce getHost support for ARM CPU driver, read
> CPU vendor_id, part_id and flags from registers
> directly. These codes will only be compiled on
> aarch64 hardwares.
> 
> Signed-off-by: Zhenyu Zheng 
> ---
>  src/cpu/cpu_arm.c | 204 ++
>  1 file changed, 204 insertions(+)
> 
> diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c
> index 6e9ff9bf11..ec50a5615d 100644
> --- a/src/cpu/cpu_arm.c
> +++ b/src/cpu/cpu_arm.c
> @@ -21,6 +21,10 @@
>   */
>  
>  #include 
> +#if defined(__aarch64__)
> +# include 
> +# include 
> +#endif
>  
>  #include "viralloc.h"
>  #include "cpu.h"
> @@ -32,6 +36,15 @@
>  
>  #define VIR_FROM_THIS VIR_FROM_CPU
>  
> +#if defined(__aarch64__)
> +/* Shift bit mask for parsing cpu flags */
> +# define BIT_SHIFTS(n) (1UL << (n))
> +/* The current max number of cpu flags on ARM is 32 */
> +# define MAX_CPU_FLAGS 32
> +#endif
> +
> +VIR_LOG_INIT("cpu.cpu_arm");
> +
>  static const virArch archs[] = {
>  VIR_ARCH_ARMV6L,
>  VIR_ARCH_ARMV7B,
> @@ -491,12 +504,203 @@ virCPUarmValidateFeatures(virCPUDefPtr cpu)
>  return 0;
>  }
>  
> +#if defined(__aarch64__)
> +/**
> + * virCPUarmCpuDataFromRegs:
> + *
> + * @data: 64-bit arm CPU specific data
> + *
> + * Fetches CPU vendor_id and part_id from MIDR_EL1 register, parse CPU
> + * flags from AT_HWCAP. There are currently 32 valid flags  on ARM arch
> + * represented by each bit.
> + */
> +static int
> +virCPUarmCpuDataFromRegs(virCPUarmData *data)
> +{
> +/* Generate human readable flag list according to the order of */
> +/* AT_HWCAP bit map */
> +const char *flag_list[MAX_CPU_FLAGS] = {
> +"fp", "asimd", "evtstrm", "aes", "pmull", "sha1", "sha2",
> +"crc32", "atomics", "fphp", "asimdhp", "cpuid", "asimdrdm",
> +"jscvt", "fcma", "lrcpc", "dcpop", "sha3", "sm3", "sm4",
> +"asimddp", "sha512", "sve", "asimdfhm", "dit", "uscat",
> +"ilrcpc", "flagm", "ssbs", "sb", "paca", "pacg"};

I'd move this array out of the function.

> +unsigned long cpuid, hwcaps;

One variable per line, please.

> +char **features = NULL;

VIR_AUTOSTRINGLIST features = NULL;

> +g_autofree char *cpu_feature_str = NULL;
> +int cpu_feature_index = 0;
> +size_t i;
> +
> +if (!(getauxval(AT_HWCAP) & HWCAP_CPUID)) {
> +virReportError(VIR_ERR_INTERNAL_ERROR, "%s",
> +   _("CPUID registers unavailable"));
> +return -1;

Wrong indentation.

> +}
> +
> +/* read the cpuid data from MIDR_EL1 register */
> +asm("mrs %0, MIDR_EL1" : "=r" (cpuid));
> +VIR_DEBUG("CPUID read from register:  0x%016lx", cpuid);
> +
> +/* parse the coresponding part_id bits */
> +data->pvr = cpuid>>4&0xFFF;

Please, add spaces around the operators and consider using () for
clarity. So, I guess:

data->pvr = (cpuid >> 4) & 0xfff;

> +/* parse the coresponding vendor_id bits */
> +data->vendor_id = cpuid>>24&0xFF;

data->vendor_id = (cpuid >> 24) & 0xff;

> +
> +hwcaps = getauxval(AT_HWCAP);
> +VIR_DEBUG("CPU flags read from register:  0x%016lx", hwcaps);
> +
> +if (VIR_ALLOC_N(features, MAX_CPU_FLAGS) < 0)
> +return -1;

The string list is supposed to be NULL-terminated so you need to
allocate space for MAX_CPU_FLAGS + 1:

features = g_new0(char *, MAX_CPU_FLAGS + 1);

> +
> +/* shift bit map mask to parse for CPU flags */
> +for (i = 0; i< MAX_CPU_FLAGS; i++) {

i < MAX_CPU_FLAGS

> +if (hwcaps & BIT_SHIFTS(i)) {
> +features[cpu_feature_index] = g_strdup(flag_list[i]);
> +cpu_feature_index++;
> +}

This could also be written as

if (hwcaps & BIT_SHIFTS(i))
features[cpu_feature_index++] = g_strdup(flag_list[i]);

it doesn't matter that much, though.

> +}
> +
> +if (cpu_feature_index > 1) {

This would not work for CPUs with exactly one feature.

> +cpu_feature_str = virStringListJoin((const char **)features, " ");
> +if (!cpu_feature_str)
> +goto error;
> +}
> +data->features = g_strdup(cpu_feature_str);

Just store the features string list in the data directly:

if (cpu_feature_index > 0)
data->features = g_steal_pointer();

> +
> +return 0;
> +
> + error:
> +virStringListFree(features);
> +return -1;

This can be dropped thanks to VIR_AUTOSTRINGLIST.

> +}
> +
> +static int
> +virCPUarmDataParseFeatures(virCPUDefPtr cpu,
> +   const virCPUarmData *cpuData)
> +{
> +int ret = -1;
> +size_t i;
> +char **features;
> +
> +if (!cpu || !cpuData)
> +return ret;
> +
> +if (!(features = virStringSplitCount(cpuData->features, " ",
> + 0, >nfeatures)))
> +return ret;

Please don't do this. The virCPUarmData can contain the feature list
directly.

> +if (cpu->nfeatures) {
> +if 

Re: [PATCH V3 4/5] cpu: Add helper funtions to parse vendor and model

2020-05-12 Thread Jiri Denemark
On Wed, Apr 22, 2020 at 15:11:22 +0800, ZhengZhenyu wrote:
> Add helper functions to parse vendor and model from
> xml for ARM arch, and use them as callbacks when
> load cpu maps.
> 
> Signed-off-by: Zhenyu Zheng 
> ---
>  src/cpu/cpu_arm.c | 173 +-
>  1 file changed, 170 insertions(+), 3 deletions(-)
> 
> diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c
> index 2009904cc9..6e9ff9bf11 100644
> --- a/src/cpu/cpu_arm.c
> +++ b/src/cpu/cpu_arm.c
> @@ -204,6 +204,174 @@ virCPUarmMapFeatureParse(xmlXPathContextPtr ctxt 
> G_GNUC_UNUSED,
>  return 0;
>  }
>  
> +static virCPUarmVendorPtr
> +virCPUarmVendorFindByID(virCPUarmMapPtr map,
> +unsigned long vendor_id)
> +{
> +size_t i;
> +
> +for (i = 0; i < map->nvendors; i++) {
> +if (map->vendors[i]->value == vendor_id)
> +return map->vendors[i];
> +}
> +
> +return NULL;
> +}
> +
> +
> +static virCPUarmVendorPtr
> +virCPUarmVendorFindByName(virCPUarmMapPtr map,
> +  const char *name)
> +{
> +size_t i;
> +
> +for (i = 0; i < map->nvendors; i++) {
> +if (STREQ(map->vendors[i]->name, name))
> +return map->vendors[i];
> +}
> +
> +return NULL;
> +}
> +
> +
> +static int
> +virCPUarmVendorParse(xmlXPathContextPtr ctxt,
> +   const char *name,
> +   void *data)

Wrong indentation.

> +{
> +virCPUarmMapPtr map = data;
> +virCPUarmVendorPtr vendor = NULL;

This should be declared as

g_autoptr(virCPUarmVendor) vendor = NULL;

> +int ret = -1;

Remove this variable, please.

> +
> +if (VIR_ALLOC(vendor) < 0)
> +return ret;

vendor = g_new0(virCPUarmVendor, 1);

> +
> +vendor->name = g_strdup(name);
> +
> +if (virCPUarmVendorFindByName(map, vendor->name)) {
> +virReportError(VIR_ERR_INTERNAL_ERROR,
> +   _("CPU vendor %s already defined"),
> +   vendor->name);
> +goto cleanup;

return -1;

> +}
> +
> +if (virXPathULongHex("string(@value)", ctxt, >value) < 0) {
> +virReportError(VIR_ERR_INTERNAL_ERROR,
> +   "%s", _("Missing CPU vendor value"));
> +goto cleanup;

return -1;

> +}
> +
> +if (virCPUarmVendorFindByID(map, vendor->value)) {
> +virReportError(VIR_ERR_INTERNAL_ERROR,
> +   _("CPU vendor value 0x%2lx already defined"),
> +   vendor->value);
> +goto cleanup;

return -1;

> +}
> +
> +if (VIR_APPEND_ELEMENT(map->vendors, map->nvendors, vendor) < 0)
> +goto cleanup;

return -1;

> +
> +ret = 0;

return 0;

> +
> + cleanup:
> +virCPUarmVendorFree(vendor);
> +return ret;
> +

The cleanup section can be dropped.

> +}
> +
> +static virCPUarmModelPtr
> +virCPUarmModelFind(virCPUarmMapPtr map,
> +   const char *name)
> +{
> +size_t i;
> +
> +for (i = 0; i < map->nmodels; i++) {
> +if (STREQ(map->models[i]->name, name))
> +return map->models[i];
> +}
> +
> +return NULL;
> +}
> +
> +#if defined(__aarch64__)
> +static virCPUarmModelPtr
> +virCPUarmModelFindByPVR(virCPUarmMapPtr map,
> +unsigned long pvr)
> +{
> +size_t i;
> +
> +for (i = 0; i < map->nmodels; i++) {
> +if (map->models[i]->data.pvr == pvr)
> +return map->models[i];
> +}
> +
> +return NULL;
> +}
> +#endif
> +
> +static int
> +virCPUarmModelParse(xmlXPathContextPtr ctxt,
> +  const char *name,
> +  void *data)
> +{
> +virCPUarmMapPtr map = data;
> +virCPUarmModel *model;

g_autoptr(virCPUArmModel) model = NULL;

> +g_autofree xmlNodePtr *nodes = NULL;
> +g_autofree char *vendor = NULL;
> +
> +if (VIR_ALLOC(model) < 0)
> +goto error;

model = g_new0(...)

And the rest of this function should be modified in similarly to
VendorParse, i.e., s/goto error/return -1/ and drop the error section.

> +
> +model->name = g_strdup(name);
> +
> +if (virCPUarmModelFind(map, model->name)) {
> +virReportError(VIR_ERR_INTERNAL_ERROR,
> +   _("CPU model %s already defined"),
> +   model->name);
> +goto error;
> +}
> +
> +if (virXPathBoolean("boolean(./vendor)", ctxt)) {
> +vendor = virXPathString("string(./vendor/@name)", ctxt);
> +if (!vendor) {
> +virReportError(VIR_ERR_INTERNAL_ERROR,
> +   _("Invalid vendor element in CPU model %s"),
> +   model->name);
> +goto error;
> +}
> +
> +if (!(model->vendor = virCPUarmVendorFindByName(map, vendor))) {
> +virReportError(VIR_ERR_INTERNAL_ERROR,
> +   _("Unknown vendor %s referenced by CPU model %s"),
> +   vendor, model->name);
> +goto error;
> +}
> +}
> +
> 

Re: [PATCH V3 3/5] cpu: Introduce ARM related structs

2020-05-12 Thread Jiri Denemark
On Wed, Apr 22, 2020 at 15:11:20 +0800, ZhengZhenyu wrote:
> Introduce vendor and model struct and related
> cleanup functions for ARM cpu.
> 
> Signed-off-by: Zhenyu Zheng 
> ---
>  src/cpu/cpu_arm.c | 73 +++
>  1 file changed, 73 insertions(+)
> 
> diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c
> index ee5802198f..2009904cc9 100644
> --- a/src/cpu/cpu_arm.c
> +++ b/src/cpu/cpu_arm.c
...
> @@ -81,12 +103,62 @@ virCPUarmMapNew(void)
>  return map;
>  }
>  
> +static void
> +virCPUarmDataClear(virCPUarmData *data)
> +{
> +if (!data)
> +return;
> +
> +VIR_FREE(data->features);

virStringListFree(data->features)

> +}
> +
> +static void
> +virCPUarmDataFree(virCPUDataPtr cpuData)
> +{
> +if (!cpuData)
> +return;
> +
> +virCPUarmDataClear(>data.arm);
> +VIR_FREE(cpuData);

g_free()

> +}

The two functions above should go in one patch with the structure
definition. Either you can move them to the previous patch or you can
squash the two patches into a single one.

> +
> +static void
> +virCPUarmModelFree(virCPUarmModelPtr model)
> +{
> +if (!model)
> +return;
> +
> +virCPUarmDataClear(>data);
> +g_free(model->name);
> +g_free(model);
> +}

Please, define the autoptr clean function for both model and vendor
structures so that you can later use g_autoptr(virCPUarm...) ... = NULL;
declarations:

G_DEFINE_AUTOPTR_CLEANUP_FUNC(virCPUarmModel, virCPUarmModelFree);

> +
> +static void
> +virCPUarmVendorFree(virCPUarmVendorPtr vendor)
> +{
> +if (!vendor)
> +return;
> +
> +g_free(vendor->name);
> +g_free(vendor);
> +}

G_DEFINE_AUTOPTR_CLEANUP_FUNC(virCPUarmVendor, virCPUarmVendorFree);

> +
>  static void
>  virCPUarmMapFree(virCPUarmMapPtr map)
>  {
>  if (!map)
>  return;
>  
> +size_t i;

We declare all variables in the beginning of each block, i.e., this
should go above the if (!map) check.

> +
> +for (i = 0; i < map->nmodels; i++)
> +virCPUarmModelFree(map->models[i]);
> +g_free(map->models);
> +
> +for (i = 0; i < map->nvendors; i++)
> +virCPUarmVendorFree(map->vendors[i]);
> +g_free(map->vendors);
> +
>  g_ptr_array_free(map->features, TRUE);
>  
>  g_free(map);
> @@ -259,6 +331,7 @@ struct cpuArchDriver cpuDriverArm = {
>  .compare = virCPUarmCompare,
>  .decode = NULL,
>  .encode = NULL,
> +.dataFree = virCPUarmDataFree,
>  .baseline = virCPUarmBaseline,
>  .update = virCPUarmUpdate,
>  .validateFeatures = virCPUarmValidateFeatures,

And the same applies for this hunk: it should go into the patch which
introduced virCPUarmData.

Jirka



Re: [PATCH V3 2/5] cpu: Introduce virCPUarmData to virCPUData

2020-05-12 Thread Jiri Denemark
On Wed, Apr 22, 2020 at 15:11:18 +0800, ZhengZhenyu wrote:
> Introduce virCPUarmData to virCPUData
> 
> Signed-off-by: Zhenyu Zheng 
> ---
>  src/cpu/Makefile.inc.am |  1 +
>  src/cpu/cpu.h   |  2 ++
>  src/cpu/cpu_arm_data.h  | 31 +++
>  3 files changed, 34 insertions(+)
>  create mode 100644 src/cpu/cpu_arm_data.h

This patch needs to be the first one in the series and either the
corresponding hunks from the following patch should be squashed here or
the this and the following patch could be squashed into a single one.

...
> diff --git a/src/cpu/cpu_arm_data.h b/src/cpu/cpu_arm_data.h
> new file mode 100644
> index 00..cf12ca8c2e
> --- /dev/null
> +++ b/src/cpu/cpu_arm_data.h
> @@ -0,0 +1,31 @@
> +/*
> + * cpu_arm_data.h: 64-bit arm CPU specific data
> + *
> + * Copyright (C) 2020 Huawei Technologies Co., Ltd.
> + *
> + * This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU Lesser General Public
> + * License as published by the Free Software Foundation; either
> + * version 2.1 of the License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> + * Lesser General Public License for more details.
> + *
> + * You should have received a copy of the GNU Lesser General Public
> + * License along with this library;  If not, see
> + * .
> + *
> + */
> +
> +#pragma once
> +
> +#define VIR_CPU_ARM_DATA_INIT { 0 }
> +
> +typedef struct _virCPUarmData virCPUarmData;
> +struct _virCPUarmData {
> +unsigned long vendor_id;
> +unsigned long pvr;
> +char *features;

Make this a list of strings:

char **features;

> +};

Jirka



Re: [PATCH V3 0/5] Introduce getHost support for ARM CPU driver

2020-05-12 Thread Jiri Denemark
On Wed, Apr 22, 2020 at 15:11:14 +0800, ZhengZhenyu wrote:
> Introduce getHost support for ARM CPU driver. First add
> some data about commonly used ARM CPU models, and their
> vendors into cpu_map, then added some helper methods as
> callbacks to load them. Read and parse vendor_id, part_id
> and CPU flags of local CPU from corresponding registers.
> 
> Signed-off-by: Zhenyu Zheng 

The emails come from ZhengZhenyu , but the
signed-off-by line says something else. Could you make them consistent?

BTW, I'm intentionally replying to v3 as v4 was only supposed to have a
one line diff to v3, but it was sent with both html and plain text parts
and git am was unable to apply any of the v4 patches.

Jirka



[libvirt PATCH] cputest: Add data for AMD Ryzen 9 3900X 12-Core Processor

2020-05-06 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 tests/cputest.c   |1 +
 ...4-cpuid-Ryzen-9-3900X-12-Core-disabled.xml |8 +
 ...64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml |   10 +
 ...6_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml |   28 +
 ...86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml |   29 +
 ...86_64-cpuid-Ryzen-9-3900X-12-Core-json.xml |   24 +
 .../x86_64-cpuid-Ryzen-9-3900X-12-Core.json   | 1838 +
 .../x86_64-cpuid-Ryzen-9-3900X-12-Core.sig|4 +
 .../x86_64-cpuid-Ryzen-9-3900X-12-Core.xml|   66 +
 9 files changed, 2008 insertions(+)
 create mode 100644 
tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-disabled.xml
 create mode 100644 
tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml
 create mode 100644 
tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml
 create mode 100644 
tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml
 create mode 100644 
tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-json.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core.json
 create mode 100644 tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core.sig
 create mode 100644 tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core.xml

diff --git a/tests/cputest.c b/tests/cputest.c
index 21f47a6853..2bef3eb52f 100644
--- a/tests/cputest.c
+++ b/tests/cputest.c
@@ -1252,6 +1252,7 @@ mymain(void)
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Pentium-P6100", JSON_NONE);
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Phenom-B95", JSON_HOST);
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Ryzen-7-1800X-Eight-Core", JSON_HOST);
+DO_TEST_CPUID(VIR_ARCH_X86_64, "Ryzen-9-3900X-12-Core", JSON_MODELS);
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-5110", JSON_NONE);
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E3-1225-v5", JSON_MODELS);
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E3-1245-v5", JSON_MODELS);
diff --git a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-disabled.xml
new file mode 100644
index 00..7feb55f0b7
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-disabled.xml
@@ -0,0 +1,8 @@
+
+
+  
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml 
b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml
new file mode 100644
index 00..def2fed823
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml
@@ -0,0 +1,10 @@
+
+
+  
+  
+  
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml 
b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml
new file mode 100644
index 00..717e2fbfae
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml
@@ -0,0 +1,28 @@
+
+  EPYC-IBPB
+  AMD
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml 
b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml
new file mode 100644
index 00..81930a84e7
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml
@@ -0,0 +1,29 @@
+
+  x86_64
+  EPYC-IBPB
+  AMD
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-json.xml 
b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-json.xml
new file mode 100644
index 00..5f495e0452
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core-json.xml
@@ -0,0 +1,24 @@
+
+  EPYC-IBPB
+  AMD
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core.json 
b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core.json
new file mode 100644
index 00..fbdf1a794a
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Ryzen-9-3900X-12-Core.json
@@ -0,0 +1,1838 @@
+{
+  "return": {
+"model": {
+  "name": "base",
+  "props": {
+"vmx-entry-load-rtit-ctl": false,
+"phys-bits": 0,
+"core-id": -1,
+"xlevel": 2147483679,
+"cmov": true,
+"ia64": false,
+"ssb-no": false,
+"aes": true,
+"vmx-apicv-xapic": false,
+"mmx": true,
+"arat": true,
+"rdpid": true,
+"vmx-page-walk-5": false,
+"vmx-page-walk-4": false,
+"vmx-desc-exit": false,
+"gfni": false,
+"ibrs-all": false,
+"pause-filter": false,
+"xsavec": true,
+"intel-pt&q

[libvirt PATCH] qemu: Don't use CPU from host capabilities as host-model on ARM

2020-05-06 Thread Jiri Denemark
We never supported host-model CPUs on ARM and we don't want to support
them even once patches for direct detection of host CPU are merged. And
since using host CPU definition for host-model CPUs exist only for
backward compatibility, we should not use it for any host-model support
added in the future. Such enhancement should exclusively use the result
of query-cpu-model-expansion. Until proper host-model support is
implemented for ARM (if ever), we need to make sure the detected host
CPU is not accidentally used for host-model CPUs.

Signed-off-by: Jiri Denemark 
---
 src/qemu/qemu_capabilities.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c
index 47f88481c8..7b32511c3d 100644
--- a/src/qemu/qemu_capabilities.c
+++ b/src/qemu/qemu_capabilities.c
@@ -3569,6 +3569,8 @@ virQEMUCapsInitCPUModel(virQEMUCapsPtr qemuCaps,
 } else if (ARCH_IS_X86(qemuCaps->arch)) {
 ret = virQEMUCapsInitCPUModelX86(qemuCaps, type, modelInfo,
  cpu, migratable);
+} else if (ARCH_IS_ARM(qemuCaps->arch)) {
+ret = 2;
 }
 
 if (ret == 0)
-- 
2.26.2



Re: [PATCH V3 5/5] cpu: Introduce getHost support for ARM CPU driver

2020-04-29 Thread Jiri Denemark
Hi.

On Wed, Apr 29, 2020 at 16:03:19 +0800, Zhenyu Zheng wrote:
> Hi Jiri,
> 
> Thanks alot for the help, I've updated the series to v4 and also attached
> pipeline results for each patch as suggested.

I explicitly said you don't have to send a new version just for that
small issue...

And I don't think pipeline results are needed for each patch, one result
for the whole series should be enough to assure the code compiles on all
tested architectures. Reviewers will usually check themselves whether
the series can be compiled after each patch. I just wanted you to take
the branch with all the patches and push it to gitlab, which will start
a single CI pipeline for all the changes (just like in your v3), but the
branch on gitlab will contain each patch of your series as is (while in
v3 you squashed all patches into a single commit and pushed that).

That said, all this is mainly a guidance for future submission. It's
*not* a request for yet another respin of this series.

In the meantime I found two AArch64 hosts with CPUs recognized by your
changes so I'm playing with them.

Jirka



Re: [PATCH V3 5/5] cpu: Introduce getHost support for ARM CPU driver

2020-04-28 Thread Jiri Denemark
On Wed, Apr 22, 2020 at 15:14:01 +0800, Zhenyu Zheng wrote:
>  gitlab CI testing as suggested:
> https://gitlab.com/ZhengZhenyu/libvirt/pipelines/134657317

Sending results of CI pipeline makes sense only when the code submitted
for CI is exactly the same as submitted for review. You should just push
the branch with your local changes to your gitlab repo rather than
somehow combining all patches you sent into one or even make additional
changes.

Apparently the patch pushed to gitlab is a bit different than this
series as this series cannot be compiled due to a missing "return NULL;"
line in patch 4/5.

Anyway, I'm trying to get some ARM hosts and hoping to find at least one
where your series would actually detect the host CPU to see how this
works in real life and to confirm (or not) my suspicions. No need to
resent this series to fix the compilation error yet, I'll fix it myself
for testing.

Thank you for your patience.

Jirka



Re: [PATCH V2 5/5] cpu: Introduce getHost support for ARM CPU driver

2020-04-20 Thread Jiri Denemark
On Fri, Apr 17, 2020 at 16:53:18 +0800, Zhenyu Zheng wrote:
> Ping for reviews

Could you please resend the new version of patches as a separate series
(don't forget to update the subject to v3)? Hunting for the new patches
hidden in random replies to the reviewers comments or original patches
is not exactly easy. And even harder when they use the same subject as
version 2.

Jirka



[libvirt PATCH] util: Do not include sys/wait.h on Win32

2020-04-17 Thread Jiri Denemark
This fixes build on mingw broken by my previous commit 36e125296a.

Signed-off-by: Jiri Denemark 
---

Pushed.

 src/util/virdaemon.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/util/virdaemon.c b/src/util/virdaemon.c
index 6182ca3c21..31cc24e703 100644
--- a/src/util/virdaemon.c
+++ b/src/util/virdaemon.c
@@ -22,7 +22,9 @@
 
 #include 
 #include 
-#include 
+#ifndef WIN32
+# include 
+#endif
 #include 
 #include 
 #include 
-- 
2.26.1



[libvirt PATCH] util: Fix virDaemonForkIntoBackground

2020-04-16 Thread Jiri Denemark
This commit partially reverts

commit c360ea28dc267802690e129fbad08ca2f22a44e9
Refs: v6.2.0-rc1-1-gc360ea28dc
Author: Rafael Fonseca 
AuthorDate: Fri Mar 27 18:40:47 2020 +0100
Commit: Michal Prívozník 
CommitDate: Mon Mar 30 09:48:22 2020 +0200

util: virdaemon: fix compilation on mingw

The daemons are not supported on Win32 and therefore were not compiled
in that platform. However, with the daemon code sharing, all the code in
utils *is* compiled and it failed because `waitpid`, `fork`, and
`setsid` are not available. So, as before, let's not build them on
Win32 and make the code more portable by using existing vir* wrappers.

Not compiling virDaemonForkIntoBackground on Win32 is good, but the
second part of the original patch incorrectly replaced waitpid and fork
with our virProcessWait and virFork APIs. These APIs are more than just
simple wrappers and we don't want any of the extra functionality.
Especially virFork would reset any setup made before
virDaemonForkIntoBackground is called, such as logging, signal handling,
etc.

As a result of the change the additional fix in v6.2.0-67-ga87e4788d2
(util: virdaemon: fix waiting for child processes) is no longer
needed and it is effectively reverted by this commit.

Signed-off-by: Jiri Denemark 
---
 src/util/virdaemon.c | 13 +++--
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/src/util/virdaemon.c b/src/util/virdaemon.c
index 99530fd146..6182ca3c21 100644
--- a/src/util/virdaemon.c
+++ b/src/util/virdaemon.c
@@ -20,7 +20,9 @@
 
 #include 
 
+#include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -30,8 +32,6 @@
 #include "virfile.h"
 #include "virlog.h"
 #include "viralloc.h"
-#include "virprocess.h"
-#include "vircommand.h"
 
 #include "configmake.h"
 
@@ -44,7 +44,7 @@ virDaemonForkIntoBackground(const char *argv0)
 if (virPipeQuiet(statuspipe) < 0)
 return -1;
 
-pid_t pid = virFork();
+pid_t pid = fork();
 switch (pid) {
 case 0:
 {
@@ -73,7 +73,7 @@ virDaemonForkIntoBackground(const char *argv0)
 if (setsid() < 0)
 goto cleanup;
 
-nextpid = virFork();
+nextpid = fork();
 switch (nextpid) {
 case 0: /* grandchild */
 return statuspipe[1];
@@ -97,14 +97,15 @@ virDaemonForkIntoBackground(const char *argv0)
 default:
 {
 /* parent */
-int exitstatus = 0;
+int got, exitstatus = 0;
 int ret;
 char status;
 
 VIR_FORCE_CLOSE(statuspipe[1]);
 
 /* We wait to make sure the first child forked successfully */
-if (virProcessWait(pid, , 0) < 0 ||
+if ((got = waitpid(pid, , 0)) < 0 ||
+got != pid ||
 exitstatus != 0) {
 goto error;
 }
-- 
2.26.1



Re: [libvirt] [PATCH] qemu: fix hang in p2p + xbzrle compression + parallel migration

2020-04-16 Thread Jiri Denemark
On Thu, Apr 16, 2020 at 12:44:51 +0800, Lin Ma wrote:
> When we do parallel migration, The multifd-channels migration parameter
> needs to be set on the destination side as well before incoming migration
> URI, unless we accept the default number of connections(2).
> 
> Usually, This can be correctly handled by libvirtd. But in this case if
> we use p2p + xbzrle compression without parameter '--comp-xbzrle-cache',
> qemuMigrationParamsDump returns too early, The corresponding migration 
> parameter will not be set on the destination side, It results QEMU hangs.
> 
> Reproducer:
> virsh migrate --live --p2p --comp-methods xbzrle \
> --parallel --parallel-connections 3 GUEST qemu+ssh://dsthost/system
> 
> or
> 
> virsh migrate --live --p2p --compressed \
> --parallel --parallel-connections 3 GUEST qemu+ssh://dsthost/system
> 
> Signed-off-by: Lin Ma 
> ---
>  src/qemu/qemu_migration_params.c | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/src/qemu/qemu_migration_params.c 
> b/src/qemu/qemu_migration_params.c
> index dd5e2ce1b6..810199370f 100644
> --- a/src/qemu/qemu_migration_params.c
> +++ b/src/qemu/qemu_migration_params.c
> @@ -630,7 +630,6 @@ qemuMigrationParamsDump(qemuMigrationParamsPtr migParams,
>  if (migParams->compMethods == 1ULL << QEMU_MIGRATION_COMPRESS_XBZRLE &&
>  !migParams->params[QEMU_MIGRATION_PARAM_XBZRLE_CACHE_SIZE].set) {
>  *flags |= VIR_MIGRATE_COMPRESSED;
> -return 0;
>  }
>  
>  for (i = 0; i < QEMU_MIGRATION_COMPRESS_LAST; ++i) {

Oops, looks like a leftover from the past when xbzrle-cache-size was
the only parameter.

Reviewed-by: Jiri Denemark 



Re: [PATCH V2 5/5] cpu: Introduce getHost support for ARM CPU driver

2020-04-09 Thread Jiri Denemark
On Thu, Apr 02, 2020 at 17:03:59 +0800, Zhenyu Zheng wrote:
> Introduce getHost support for ARM CPU driver, read
> CPU vendor_id, part_id and flags from registers
> directly.
> 
> Signed-off-by: Zhenyu Zheng 
> ---
>  src/cpu/cpu_arm.c | 194 +-
>  1 file changed, 193 insertions(+), 1 deletion(-)

In addition to all the coding style issues which Daniel pointed out...

> diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c
> index 88b4d91946..c8f5ce7e8a 100644
> --- a/src/cpu/cpu_arm.c
> +++ b/src/cpu/cpu_arm.c
> @@ -21,6 +21,8 @@
>   */
>  
>  #include 
> +#include 
> +#include 

None of these header files exist on my system with linux 5.6 headers.

>  #include "viralloc.h"
>  #include "cpu.h"
> @@ -31,6 +33,10 @@
>  #include "virxml.h"
>  
>  #define VIR_FROM_THIS VIR_FROM_CPU
> +/* Shift bit mask for parsing cpu flags */
> +#define BIT_SHIFTS(n) (1UL << (n))
> +/* The current max number of cpu flags on ARM is 32 */
> +#define MAX_CPU_FLAGS 32
>  
>  VIR_LOG_INIT("cpu.cpu_arm");
>  
> @@ -498,14 +504,200 @@ virCPUarmValidateFeatures(virCPUDefPtr cpu)
>  return 0;
>  }
>  
> +/**
> + * armCpuDataFromRegs:
> + *
> + * @data: 64-bit arm CPU specific data
> + *
> + * Fetches CPU vendor_id and part_id from MIDR_EL1 register, parse CPU
> + * flags from AT_HWCAP. There are currently 32 valid flags  on ARM arch
> + * represented by each bit.
> + */
> +static int
> +armCpuDataFromRegs(virCPUarmData *data)
> +{
> +/* Generate human readable flag list according to the order of */
> +/* AT_HWCAP bit map */
> +const char *flag_list[MAX_CPU_FLAGS] = {
> +"fp", "asimd", "evtstrm", "aes", "pmull", "sha1", "sha2",
> +"crc32", "atomics", "fphp", "asimdhp", "cpuid", "asimdrdm",
> +"jscvt", "fcma", "lrcpc", "dcpop", "sha3", "sm3", "sm4",
> +"asimddp", "sha512", "sve", "asimdfhm", "dit", "uscat",
> +"ilrcpc", "flagm", "ssbs", "sb", "paca", "pacg"};

I would expect these to be defined in src/cpu_map/arm_features.xml,
although I'm not sure how well the new features would play with the
existing ones... What do you think, Andrea?

> +unsigned long cpuid, hwcaps;
> +char **features = NULL;
> +char *cpu_feature_str = NULL;
> +int cpu_feature_index = 0;
> +size_t i;
> +
> +if (!(getauxval(AT_HWCAP) & HWCAP_CPUID)) {
> +virReportError(VIR_ERR_INTERNAL_ERROR, "%s",
> +   _("CPUID registers unavailable"));
> +return -1;
> +}
> +
> +/* read the cpuid data from MIDR_EL1 register */
> +asm("mrs %0, MIDR_EL1" : "=r" (cpuid));
> +VIR_DEBUG("CPUID read from register:  0x%016lx", cpuid);
> +
> +/* parse the coresponding part_id bits */
> +data->pvr = cpuid>>4&0xFFF;
> +/* parse the coresponding vendor_id bits */
> +data->vendor_id = cpuid>>24&0xFF;
> +
> +hwcaps = getauxval(AT_HWCAP);
> +VIR_DEBUG("CPU flags read from register:  0x%016lx", hwcaps);
> +
> +if (VIR_ALLOC_N(features, MAX_CPU_FLAGS) < 0)
> +return -1;
> +
> +/* shift bit map mask to parse for CPU flags */
> +for (i = 0; i< MAX_CPU_FLAGS; i++) {
> +if (hwcaps & BIT_SHIFTS(i)) {
> +features[cpu_feature_index] = g_strdup(flag_list[i]);
> +cpu_feature_index++;
> +}
> +}
> +
> +if (cpu_feature_index > 1) {
> +cpu_feature_str = virStringListJoin((const char **)features, " ");
> +if (!cpu_feature_str)
> +goto cleanup;
> +}
> +data->features = g_strdup(cpu_feature_str);
> +
> +return 0;
> +
> + cleanup:
> +virStringListFree(features);
> +VIR_FREE(cpu_feature_str);
> +return -1;
> +}
> +
> +static int
> +armCpuDataParseFeatures(virCPUDefPtr cpu,
> +const virCPUarmData *cpuData)
> +{
> +int ret = -1;
> +size_t i;
> +char **features;
> +
> +if (!cpu || !cpuData)
> +return ret;
> +
> +if (!(features = virStringSplitCount(cpuData->features, " ",
> + 0, >nfeatures)))
> +return ret;
> +if (cpu->nfeatures) {
> +if (VIR_ALLOC_N(cpu->features, cpu->nfeatures) < 0)
> +goto error;
> +
> +for (i = 0; i < cpu->nfeatures; i++) {
> +cpu->features[i].policy = VIR_CPU_FEATURE_REQUIRE;
> +cpu->features[i].name = g_strdup(features[i]);
> +}
> +}
> +
> +ret = 0;
> +
> + cleanup:
> +virStringListFree(features);
> +return ret;
> +
> + error:
> +for (i = 0; i < cpu->nfeatures; i++)
> +VIR_FREE(cpu->features[i].name);
> +VIR_FREE(cpu->features);
> +cpu->nfeatures = 0;
> +goto cleanup;
> +}
> +
> +static int
> +armDecode(virCPUDefPtr cpu,
> +  const virCPUarmData *cpuData,
> +  virDomainCapsCPUModelsPtr models)
> +{
> +virCPUarmMapPtr map;
> +virCPUarmModelPtr model;
> +virCPUarmVendorPtr vendor = NULL;
> +
> +if (!cpuData || !(map = virCPUarmGetMap()))

Re: [PATCH V2 5/5] cpu: Introduce getHost support for ARM CPU driver

2020-04-09 Thread Jiri Denemark
On Thu, Apr 09, 2020 at 11:28:04 +0100, Daniel P. Berrangé wrote:
> On Thu, Apr 02, 2020 at 05:03:59PM +0800, Zhenyu Zheng wrote:
> > Introduce getHost support for ARM CPU driver, read
> > CPU vendor_id, part_id and flags from registers
> > directly.
> > 
> > Signed-off-by: Zhenyu Zheng 
> > ---
> >  src/cpu/cpu_arm.c | 194 +-
> >  1 file changed, 193 insertions(+), 1 deletion(-)
> > 
> > diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c
> > index 88b4d91946..c8f5ce7e8a 100644
> > --- a/src/cpu/cpu_arm.c
> > +++ b/src/cpu/cpu_arm.c
> > @@ -21,6 +21,8 @@
> >   */
> >  
> >  #include 
> > +#include 
> > +#include 
> >  
> >  #include "viralloc.h"
> >  #include "cpu.h"
> > @@ -31,6 +33,10 @@
> >  #include "virxml.h"
> >  
> >  #define VIR_FROM_THIS VIR_FROM_CPU
> > +/* Shift bit mask for parsing cpu flags */
> > +#define BIT_SHIFTS(n) (1UL << (n))
> > +/* The current max number of cpu flags on ARM is 32 */
> > +#define MAX_CPU_FLAGS 32
> >  
> >  VIR_LOG_INIT("cpu.cpu_arm");
> >  
> > @@ -498,14 +504,200 @@ virCPUarmValidateFeatures(virCPUDefPtr cpu)
> >  return 0;
> >  }
> >  
> > +/**
> > + * armCpuDataFromRegs:
> > + *
> > + * @data: 64-bit arm CPU specific data
> > + *
> > + * Fetches CPU vendor_id and part_id from MIDR_EL1 register, parse CPU
> > + * flags from AT_HWCAP. There are currently 32 valid flags  on ARM arch
> > + * represented by each bit.
> > + */
> > +static int
> > +armCpuDataFromRegs(virCPUarmData *data)
> 
> virCPUarmDataFromRegs()
> 
> > +{
> > +/* Generate human readable flag list according to the order of */
> > +/* AT_HWCAP bit map */
> > +const char *flag_list[MAX_CPU_FLAGS] = {
> > +"fp", "asimd", "evtstrm", "aes", "pmull", "sha1", "sha2",
> > +"crc32", "atomics", "fphp", "asimdhp", "cpuid", "asimdrdm",
> > +"jscvt", "fcma", "lrcpc", "dcpop", "sha3", "sm3", "sm4",
> > +"asimddp", "sha512", "sve", "asimdfhm", "dit", "uscat",
> > +"ilrcpc", "flagm", "ssbs", "sb", "paca", "pacg"};
> > +unsigned long cpuid, hwcaps;
> > +char **features = NULL;
> > +char *cpu_feature_str = NULL;
> 
> g_autofree
> 
> > +int cpu_feature_index = 0;
> > +size_t i;
> > +
> > +if (!(getauxval(AT_HWCAP) & HWCAP_CPUID)) {
> > +virReportError(VIR_ERR_INTERNAL_ERROR, "%s",
> > +   _("CPUID registers unavailable"));
> > +return -1;
> > +}
> 
> Indent messed up here
> 
> > +
> > +/* read the cpuid data from MIDR_EL1 register */
> > +asm("mrs %0, MIDR_EL1" : "=r" (cpuid));
> > +VIR_DEBUG("CPUID read from register:  0x%016lx", cpuid);
> > +
> > +/* parse the coresponding part_id bits */
> > +data->pvr = cpuid>>4&0xFFF;
> > +/* parse the coresponding vendor_id bits */
> > +data->vendor_id = cpuid>>24&0xFF;
> > +
> > +hwcaps = getauxval(AT_HWCAP);
> > +VIR_DEBUG("CPU flags read from register:  0x%016lx", hwcaps);
> > +
> > +if (VIR_ALLOC_N(features, MAX_CPU_FLAGS) < 0)
> > +return -1;
> > +
> > +/* shift bit map mask to parse for CPU flags */
> > +for (i = 0; i< MAX_CPU_FLAGS; i++) {
> > +if (hwcaps & BIT_SHIFTS(i)) {
> > +features[cpu_feature_index] = g_strdup(flag_list[i]);
> > +cpu_feature_index++;
> > +}
> > +}
> 
> Indent of } messed up again.
> 
> > +
> > +if (cpu_feature_index > 1) {
> > +cpu_feature_str = virStringListJoin((const char **)features, " ");
> > +if (!cpu_feature_str)
> > +goto cleanup;
> > +}
> > +data->features = g_strdup(cpu_feature_str);
> > +
> > +return 0;
> > +
> > + cleanup:
> 
> This should be called "error", since this label is only
> visited for fatal errors.
> 
> > +virStringListFree(features);
> > +VIR_FREE(cpu_feature_str);
> 
> Can avoid the VIR_FREE with g_autofree.

virStringListFree can be avoided too if features is declared with
VIR_AUTOSTRINGLIST.

Jirka



Re: [libvirt PATCH 36/39] cpu_x86: Add support for stepping part of CPU signature

2020-04-08 Thread Jiri Denemark
On Tue, Apr 07, 2020 at 17:36:18 +0200, Ján Tomko wrote:
> On a Friday in 2020, Jiri Denemark wrote:
> >CPU models defined in the cpu_map can use signature/@stepping attribute
> >to match a limited set of stepping numbers. The value is a bitmap for
> >bits 0..15 each corresponding to a single stepping value. For example,
> >stepping='4-6,9' will match 4, 5, 6, and 9. Omitting the attribute is
> >equivalent to stepping='0-15'.
> >
> >Signed-off-by: Jiri Denemark 
> >---
> > src/cpu/cpu_x86.c | 60 +++
> > 1 file changed, 50 insertions(+), 10 deletions(-)
> >
> >diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
> >index 51c98efca9..bd224a9d0d 100644
> >--- a/src/cpu/cpu_x86.c
> >+++ b/src/cpu/cpu_x86.c
> >@@ -125,6 +125,7 @@ typedef struct _virCPUx86Signature virCPUx86Signature;
> > struct _virCPUx86Signature {
> > unsigned int family;
> > unsigned int model;
> >+virBitmapPtr stepping;
> > };
> >
> > typedef struct _virCPUx86Signatures virCPUx86Signatures;
> >@@ -732,7 +733,17 @@ x86MakeSignature(unsigned int family,
> > static uint32_t
> > virCPUx86SignatureToCPUID(virCPUx86Signature *sig)
> > {
> >-return x86MakeSignature(sig->family, sig->model, 0);
> >+unsigned int stepping = 0;
> >+
> >+if (sig->stepping) {
> >+ssize_t fisrtBit;
> 
> first?
> 
> >+
> >+fisrtBit = virBitmapNextSetBit(sig->stepping, -1);
> >+if (fisrtBit >= 0)
> >+stepping = fisrtBit;
> >+}

As you can see I really use completion a lot :-)

> >+
> >+return x86MakeSignature(sig->family, sig->model, stepping);
> > }
> 
> Reviewed-by: Ján Tomko 

Thanks for the review.

Jirka



Re: [libvirt PATCH 15/39] cpu_x86: Use g_auto* in x86Compute

2020-04-07 Thread Jiri Denemark
On Tue, Apr 07, 2020 at 12:08:37 +0200, Ján Tomko wrote:
> On a Friday in 2020, Jiri Denemark wrote:
> >Signed-off-by: Jiri Denemark 
> >---
> > src/cpu/cpu_x86.c | 64 ++-
> > 1 file changed, 24 insertions(+), 40 deletions(-)
> >
> >diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
> >index 6c3f9fc0be..6758fcc170 100644
> >--- a/src/cpu/cpu_x86.c
> >+++ b/src/cpu/cpu_x86.c
> >@@ -1689,13 +1689,12 @@ virCPUx86DataParse(xmlXPathContextPtr ctxt)
> 
> The comment of this macro says:
>* RET: return code to set

OK, I squashed removal of this line to this patch since I'm touching the
way this macro handles return values :-)

Jirka



Re: [libvirt PATCH 01/39] cpu_x86: Drop noTSX hint for incompatible CPUs

2020-04-07 Thread Jiri Denemark
On Tue, Apr 07, 2020 at 08:39:10 +0200, Ján Tomko wrote:
> On a Friday in 2020, Jiri Denemark wrote:
> >The hint was introduced a long time ago when broken TSX implementation
> >was found in Haswell and Broadwell CPUs. Since then many more CPUs with
> >TSX were introduced and and disabled due to TAA vulnerability.
> >
> >Thus the hint is not very useful and I think removing it is a better
> >choice then updating it to cover all current noTSX models.
> >
> 
> This partially reverts:
> commit 7f127ded657b24e0e55cd5f3539ef5b2dc935908
>  cpu: Rework cpuCompare* APIs
> 
> 
> >Signed-off-by: Jiri Denemark 
> >---
> > src/cpu/cpu_x86.c | 42 ++
> > 1 file changed, 6 insertions(+), 36 deletions(-)
> >
> >diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
> >index ce15bb0454..eeb16c2763 100644
> >--- a/src/cpu/cpu_x86.c
> >+++ b/src/cpu/cpu_x86.c
> >@@ -1937,7 +1937,6 @@ virCPUx86Compare(virCPUDefPtr host,
> >  bool failIncompatible)
> > {
> > virCPUCompareResult ret = VIR_CPU_COMPARE_ERROR;
> >-virCPUx86MapPtr map;
> > virCPUx86ModelPtr model = NULL;
> 
> model is unused after this patch (that will cause a build error with
> clang after the g_auto conversion later in the series)

Oh, I missed this. Fixed, thanks.

Jirka



Re: [PATCH 2/3] qemuBlockStorageSourceGetURI: Properly preserve query component

2020-03-30 Thread Jiri Denemark
On Fri, Mar 27, 2020 at 16:51:20 +0100, Peter Krempa wrote:
> Look for the questionmark in the name and move the contents into the
> query portion so that we format the URI back properly.
> 
> Signed-off-by: Peter Krempa 
> ---
>  src/qemu/qemu_block.c | 6 ++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/src/qemu/qemu_block.c b/src/qemu/qemu_block.c
> index 648c3f1026..c51fb2b6ea 100644
> --- a/src/qemu/qemu_block.c
> +++ b/src/qemu/qemu_block.c
> @@ -429,12 +429,18 @@ qemuBlockStorageSourceGetURI(virStorageSourcePtr src)
>  }
> 
>  if (src->path) {
> +char *query;
>  if (src->volume) {
>  uri->path = g_strdup_printf("/%s/%s", src->volume, src->path);
>  } else {
>  uri->path = g_strdup_printf("%s%s", src->path[0] == '/' ? "" : 
> "/",
>  src->path);
>  }
> +
> +if ((query = strchr(uri->path, '?'))) {
> +uri->query = g_strdup(query + 1);
> +*query = '\0';
> +}

This would be quite fragile I'm afraid. We should only do this when we
know we got src->path from a URI with a query string, otherwise we could
find a random '?' possibly used in a file's name.

Jirka



[libvirt PATCH] docs: Clarify semantics of model/@usable attribute in dom caps

2020-03-27 Thread Jiri Denemark
The documentation could confuse people to expect that CPU models with
usable='no' attribute are not usable at all on the current host. But
they cannot be only used without explicitly disabling some features.

Signed-off-by: Jiri Denemark 
---
 docs/formatdomaincaps.html.in | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/docs/formatdomaincaps.html.in b/docs/formatdomaincaps.html.in
index 66e758501b..4056e0bd31 100644
--- a/docs/formatdomaincaps.html.in
+++ b/docs/formatdomaincaps.html.in
@@ -249,9 +249,11 @@
 The mode element contains a list of supported CPU
 models, each described by a dedicated model element.
 The usable attribute specifies whether the model can
-be used on the host. A special value unknown indicates
-libvirt does not have enough information to provide the usability
-data.
+be used directly on the host. When usable='no' the corresponding model
+cannot be used without disabling some features that the CPU of such
+model is expected to have. A special value unknown
+indicates libvirt does not have enough information to provide the
+usability data.
   
 
 
-- 
2.26.0



[libvirt PATCH 08/39] cpu_x86: Use g_auto* in x86DataToCPU

2020-03-27 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 20 ++--
 1 file changed, 6 insertions(+), 14 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index fce7a2b8c5..d0ef66f1e3 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -771,9 +771,9 @@ x86DataToCPU(const virCPUx86Data *data,
  virCPUx86MapPtr map,
  virDomainCapsCPUModelPtr hvModel)
 {
-virCPUDefPtr cpu;
-virCPUx86Data copy = VIR_CPU_X86_DATA_INIT;
-virCPUx86Data modelData = VIR_CPU_X86_DATA_INIT;
+g_autoptr(virCPUDef) cpu = NULL;
+g_auto(virCPUx86Data) copy = VIR_CPU_X86_DATA_INIT;
+g_auto(virCPUx86Data) modelData = VIR_CPU_X86_DATA_INIT;
 virCPUx86VendorPtr vendor;
 
 cpu = virCPUDefNew();
@@ -801,7 +801,7 @@ x86DataToCPU(const virCPUx86Data *data,
 if ((feature = x86FeatureFind(map, *blocker)) &&
 !x86DataIsSubset(, >data))
 if (x86DataAdd(, >data) < 0)
-goto error;
+return NULL;
 }
 }
 
@@ -810,17 +810,9 @@ x86DataToCPU(const virCPUx86Data *data,
 
 if (x86DataToCPUFeatures(cpu, VIR_CPU_FEATURE_REQUIRE, , map) ||
 x86DataToCPUFeatures(cpu, VIR_CPU_FEATURE_DISABLE, , map))
-goto error;
-
- cleanup:
-virCPUx86DataClear();
-virCPUx86DataClear();
-return cpu;
+return NULL;
 
- error:
-virCPUDefFree(cpu);
-cpu = NULL;
-goto cleanup;
+return g_steal_pointer();
 }
 
 
-- 
2.26.0



[libvirt PATCH 16/39] cpu_x86: Use g_auto* in virCPUx86Compare

2020-03-27 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 19 ---
 1 file changed, 8 insertions(+), 11 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 6758fcc170..e4e21fbed4 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -1848,34 +1848,31 @@ virCPUx86Compare(virCPUDefPtr host,
  virCPUDefPtr cpu,
  bool failIncompatible)
 {
-virCPUCompareResult ret = VIR_CPU_COMPARE_ERROR;
-virCPUx86ModelPtr model = NULL;
-char *message = NULL;
+virCPUCompareResult ret;
+g_autoptr(virCPUx86Model) model = NULL;
+g_autofree char *message = NULL;
 
 if (!host || !host->model) {
 if (failIncompatible) {
 virReportError(VIR_ERR_CPU_INCOMPATIBLE, "%s",
_("unknown host CPU"));
-} else {
-VIR_WARN("unknown host CPU");
-ret = VIR_CPU_COMPARE_INCOMPATIBLE;
+return VIR_CPU_COMPARE_ERROR;
 }
-goto cleanup;
+
+VIR_WARN("unknown host CPU");
+return VIR_CPU_COMPARE_INCOMPATIBLE;
 }
 
 ret = x86Compute(host, cpu, NULL, );
 
 if (ret == VIR_CPU_COMPARE_INCOMPATIBLE && failIncompatible) {
-ret = VIR_CPU_COMPARE_ERROR;
 if (message)
 virReportError(VIR_ERR_CPU_INCOMPATIBLE, "%s", message);
 else
 virReportError(VIR_ERR_CPU_INCOMPATIBLE, NULL);
+return VIR_CPU_COMPARE_ERROR;
 }
 
- cleanup:
-VIR_FREE(message);
-x86ModelFree(model);
 return ret;
 }
 
-- 
2.26.0



[libvirt PATCH 28/39] cpu_x86: Use g_auto* in virCPUx86CopyMigratable

2020-03-27 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 10 +++---
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index a65215caed..16e73b5b98 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -3113,7 +3113,7 @@ x86FeatureFilterMigratable(const char *name,
 static virCPUDefPtr
 virCPUx86CopyMigratable(virCPUDefPtr cpu)
 {
-virCPUDefPtr copy;
+g_autoptr(virCPUDef) copy = NULL;
 virCPUx86MapPtr map;
 
 if (!(map = virCPUx86GetMap()))
@@ -3124,13 +3124,9 @@ virCPUx86CopyMigratable(virCPUDefPtr cpu)
 
 if (virCPUDefCopyModelFilter(copy, cpu, false,
  x86FeatureFilterMigratable, map) < 0)
-goto error;
-
-return copy;
+return NULL;
 
- error:
-virCPUDefFree(copy);
-return NULL;
+return g_steal_pointer();
 }
 
 
-- 
2.26.0



[libvirt PATCH 27/39] cpu_x86: Use g_auto* in virCPUx86ExpandFeatures

2020-03-27 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 22 --
 1 file changed, 8 insertions(+), 14 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 3f6d889722..a65215caed 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -3059,30 +3059,29 @@ static int
 virCPUx86ExpandFeatures(virCPUDefPtr cpu)
 {
 virCPUx86MapPtr map;
-virCPUDefPtr expanded = NULL;
-virCPUx86ModelPtr model = NULL;
+g_autoptr(virCPUDef) expanded = NULL;
+g_autoptr(virCPUx86Model) model = NULL;
 bool host = cpu->type == VIR_CPU_TYPE_HOST;
 size_t i;
-int ret = -1;
 
 if (!(map = virCPUx86GetMap()))
-goto cleanup;
+return -1;
 
 if (!(expanded = virCPUDefCopy(cpu)))
-goto cleanup;
+return -1;
 
 virCPUDefFreeFeatures(expanded);
 
 if (!(model = x86ModelFind(map, cpu->model))) {
 virReportError(VIR_ERR_INTERNAL_ERROR,
_("unknown CPU model %s"), cpu->model);
-goto cleanup;
+return -1;
 }
 
 if (!(model = x86ModelCopy(model)) ||
 x86DataToCPUFeatures(expanded, host ? -1 : VIR_CPU_FEATURE_REQUIRE,
  >data, map) < 0)
-goto cleanup;
+return -1;
 
 for (i = 0; i < cpu->nfeatures; i++) {
 virCPUFeatureDefPtr f = cpu->features + i;
@@ -3093,17 +3092,12 @@ virCPUx86ExpandFeatures(virCPUDefPtr cpu)
 continue;
 
 if (virCPUDefUpdateFeature(expanded, f->name, f->policy) < 0)
-goto cleanup;
+return -1;
 }
 
 virCPUDefFreeModel(cpu);
 
-ret = virCPUDefCopyModel(cpu, expanded, false);
-
- cleanup:
-virCPUDefFree(expanded);
-x86ModelFree(model);
-return ret;
+return virCPUDefCopyModel(cpu, expanded, false);
 }
 
 
-- 
2.26.0



[libvirt PATCH 24/39] cpu_x86: Use g_auto* in virCPUx86Update

2020-03-27 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 15 +--
 1 file changed, 5 insertions(+), 10 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 9f6027ec5c..8da8b3ada2 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -2857,9 +2857,8 @@ static int
 virCPUx86Update(virCPUDefPtr guest,
 const virCPUDef *host)
 {
-virCPUx86ModelPtr model = NULL;
+g_autoptr(virCPUx86Model) model = NULL;
 virCPUx86MapPtr map;
-int ret = -1;
 size_t i;
 
 if (!host) {
@@ -2872,14 +2871,14 @@ virCPUx86Update(virCPUDefPtr guest,
 return -1;
 
 if (!(model = x86ModelFromCPU(host, map, -1)))
-goto cleanup;
+return -1;
 
 for (i = 0; i < guest->nfeatures; i++) {
 if (guest->features[i].policy == VIR_CPU_FEATURE_OPTIONAL) {
 int supported = x86FeatureInData(guest->features[i].name,
  >data, map);
 if (supported < 0)
-goto cleanup;
+return -1;
 else if (supported)
 guest->features[i].policy = VIR_CPU_FEATURE_REQUIRE;
 else
@@ -2889,13 +2888,9 @@ virCPUx86Update(virCPUDefPtr guest,
 
 if (guest->mode == VIR_CPU_MODE_HOST_MODEL ||
 guest->match == VIR_CPU_MATCH_MINIMUM)
-ret = x86UpdateHostModel(guest, host);
-else
-ret = 0;
+return x86UpdateHostModel(guest, host);
 
- cleanup:
-x86ModelFree(model);
-return ret;
+return 0;
 }
 
 
-- 
2.26.0



[libvirt PATCH 38/39] cputest: Add data for Intel(R) Xeon(R) Gold 6130 CPU

2020-03-27 Thread Jiri Denemark
Skylake-Server with family 6, model 85, stepping 4, which is currently
mis-detected as Cascadelake-Server CPU model.

Signed-off-by: Jiri Denemark 
---
 tests/cputest.c   |1 +
 .../x86_64-cpuid-Xeon-Gold-6130-disabled.xml  |7 +
 .../x86_64-cpuid-Xeon-Gold-6130-enabled.xml   |9 +
 .../x86_64-cpuid-Xeon-Gold-6130-guest.xml |   33 +
 .../x86_64-cpuid-Xeon-Gold-6130-host.xml  |   35 +
 .../x86_64-cpuid-Xeon-Gold-6130-json.xml  |   16 +
 .../x86_64-cpuid-Xeon-Gold-6130.json  | 1201 +
 .../x86_64-cpuid-Xeon-Gold-6130.sig   |4 +
 .../x86_64-cpuid-Xeon-Gold-6130.xml   |   54 +
 9 files changed, 1360 insertions(+)
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-disabled.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-enabled.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-guest.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-host.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-json.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130.json
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130.sig
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130.xml

diff --git a/tests/cputest.c b/tests/cputest.c
index f9f1ca74ff..869d016ffc 100644
--- a/tests/cputest.c
+++ b/tests/cputest.c
@@ -1265,6 +1265,7 @@ mymain(void)
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E7-8890-v3", JSON_MODELS);
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E7540", JSON_MODELS);
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-Gold-5115", JSON_MODELS);
+DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-Gold-6130", JSON_MODELS);
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-Gold-6148", JSON_HOST);
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-Platinum-8268", JSON_HOST);
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-Platinum-9242", JSON_MODELS);
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-disabled.xml
new file mode 100644
index 00..e7c59cef1e
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-disabled.xml
@@ -0,0 +1,7 @@
+
+
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-enabled.xml 
b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-enabled.xml
new file mode 100644
index 00..8610577479
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-enabled.xml
@@ -0,0 +1,9 @@
+
+
+  
+  
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-guest.xml 
b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-guest.xml
new file mode 100644
index 00..cfb0eb982d
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-guest.xml
@@ -0,0 +1,33 @@
+
+  Cascadelake-Server
+  Intel
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-host.xml 
b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-host.xml
new file mode 100644
index 00..207e9e0ee4
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-host.xml
@@ -0,0 +1,35 @@
+
+  x86_64
+  Skylake-Server-IBRS
+  Intel
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-json.xml 
b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-json.xml
new file mode 100644
index 00..968d904557
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-json.xml
@@ -0,0 +1,16 @@
+
+  Cascadelake-Server
+  Intel
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130.json 
b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130.json
new file mode 100644
index 00..1a22387617
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130.json
@@ -0,0 +1,1201 @@
+{
+  "return": {
+"model": {
+  "name": "base",
+  "props": {
+"phys-bits": 0,
+"core-id": -1,
+"xlevel": 2147483656,
+"cmov": true,
+"ia64": false,
+"ssb-no": false,
+"aes": true,
+"mmx": true,
+"rdpid": false,
+"arat": true,
+"gfni": false,
+"ibrs-all": false,
+"pause-filter": false,
+"xsavec": true,
+"intel-pt": false,
+"hv-frequencies": false,
+"tsc-frequency": 0,
+"xd": true,
+"x-intel-pt-auto-level": false,
+"hv-vendor-id": "",
+"kvm-asyncpf": true,
+

[libvirt PATCH 14/39] cpu_x86: Use g_auto* in virCPUx86DataParse

2020-03-27 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 23 ---
 1 file changed, 8 insertions(+), 15 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index ba269df66d..6c3f9fc0be 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -1636,8 +1636,8 @@ virCPUx86DataFormat(const virCPUData *data)
 static virCPUDataPtr
 virCPUx86DataParse(xmlXPathContextPtr ctxt)
 {
-xmlNodePtr *nodes = NULL;
-virCPUDataPtr cpuData = NULL;
+g_autofree xmlNodePtr *nodes = NULL;
+g_autoptr(virCPUData) cpuData = NULL;
 virCPUx86DataItem item;
 size_t i;
 int n;
@@ -1646,11 +1646,11 @@ virCPUx86DataParse(xmlXPathContextPtr ctxt)
 if (n <= 0) {
 virReportError(VIR_ERR_INTERNAL_ERROR, "%s",
_("no x86 CPU data found"));
-goto error;
+return NULL;
 }
 
 if (!(cpuData = virCPUDataNew(VIR_ARCH_X86_64)))
-goto error;
+return NULL;
 
 for (i = 0; i < n; i++) {
 ctxt->node = nodes[i];
@@ -1658,28 +1658,21 @@ virCPUx86DataParse(xmlXPathContextPtr ctxt)
 if (x86ParseCPUID(ctxt, ) < 0) {
 virReportError(VIR_ERR_INTERNAL_ERROR,
_("failed to parse cpuid[%zu]"), i);
-goto error;
+return NULL;
 }
 } else {
 if (x86ParseMSR(ctxt, ) < 0) {
 virReportError(VIR_ERR_INTERNAL_ERROR,
_("failed to parse msr[%zu]"), i);
-goto error;
+return NULL;
 }
 }
 
 if (virCPUx86DataAdd(cpuData, ) < 0)
-goto error;
+return NULL;
 }
 
- cleanup:
-VIR_FREE(nodes);
-return cpuData;
-
- error:
-virCPUx86DataFree(cpuData);
-cpuData = NULL;
-goto cleanup;
+return g_steal_pointer();
 }
 
 
-- 
2.26.0



[libvirt PATCH 30/39] cpu_x86: Move and rename x86ModelHasSignature

2020-03-27 Thread Jiri Denemark
Later in this series the function will work on a newly introduced
virCPUx86Signatures structure. Let's move it to the place were all
related functions will be added and rename the function as
virCPUx86SignaturesMatch for easier review of the virCPUx86Signatures
patch.

Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 38 +++---
 1 file changed, 19 insertions(+), 19 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 4b6eaf8060..ff44cae77e 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -1110,6 +1110,21 @@ virCPUx86SignaturesCopy(virCPUx86ModelPtr dst,
 }
 
 
+static bool
+virCPUx86SignaturesMatch(virCPUx86ModelPtr model,
+ uint32_t signature)
+{
+size_t i;
+
+for (i = 0; i < model->nsignatures; i++) {
+if (model->signatures[i] == signature)
+return true;
+}
+
+return false;
+}
+
+
 static void
 x86ModelFree(virCPUx86ModelPtr model)
 {
@@ -1877,21 +1892,6 @@ virCPUx86Compare(virCPUDefPtr host,
 }
 
 
-static bool
-x86ModelHasSignature(virCPUx86ModelPtr model,
- uint32_t signature)
-{
-size_t i;
-
-for (i = 0; i < model->nsignatures; i++) {
-if (model->signatures[i] == signature)
-return true;
-}
-
-return false;
-}
-
-
 static char *
 x86FormatSignatures(virCPUx86ModelPtr model)
 {
@@ -1963,8 +1963,8 @@ x86DecodeUseCandidate(virCPUx86ModelPtr current,
  * consider candidates with matching family/model.
  */
 if (signature &&
-x86ModelHasSignature(current, signature) &&
-!x86ModelHasSignature(candidate, signature)) {
+virCPUx86SignaturesMatch(current, signature) &&
+!virCPUx86SignaturesMatch(candidate, signature)) {
 VIR_DEBUG("%s differs in signature from matching %s",
   cpuCandidate->model, cpuCurrent->model);
 return 0;
@@ -1980,8 +1980,8 @@ x86DecodeUseCandidate(virCPUx86ModelPtr current,
  * result in longer list of features.
  */
 if (signature &&
-x86ModelHasSignature(candidate, signature) &&
-!x86ModelHasSignature(current, signature)) {
+virCPUx86SignaturesMatch(candidate, signature) &&
+!virCPUx86SignaturesMatch(current, signature)) {
 VIR_DEBUG("%s provides matching signature", cpuCandidate->model);
 return 1;
 }
-- 
2.26.0



[libvirt PATCH 33/39] cpu_x86: Introduce virCPUx86SignatureFromCPUID

2020-03-27 Thread Jiri Denemark
It can be used for separating family, model, and stepping numbers from a
single 32b integer as reported by CPUID.

Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 19 ++-
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index a71b5ccacc..29c6e2b6be 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -717,6 +717,18 @@ x86MakeSignature(unsigned int family,
 }
 
 
+static void
+virCPUx86SignatureFromCPUID(uint32_t sig,
+unsigned int *family,
+unsigned int *model,
+unsigned int *stepping)
+{
+*family = ((sig >> 20) & 0xff) + ((sig >> 8) & 0xf);
+*model = ((sig >> 12) & 0xf0) + ((sig >> 4) & 0xf);
+*stepping = sig & 0xf;
+}
+
+
 static void
 x86DataToSignatureFull(const virCPUx86Data *data,
unsigned int *family,
@@ -725,17 +737,14 @@ x86DataToSignatureFull(const virCPUx86Data *data,
 {
 virCPUx86DataItem leaf1 = CPUID(.eax_in = 0x1);
 virCPUx86DataItemPtr item;
-virCPUx86CPUIDPtr cpuid;
 
 *family = *model = *stepping = 0;
 
 if (!(item = virCPUx86DataGet(data, )))
 return;
 
-cpuid = >data.cpuid;
-*family = ((cpuid->eax >> 20) & 0xff) + ((cpuid->eax >> 8) & 0xf);
-*model = ((cpuid->eax >> 12) & 0xf0) + ((cpuid->eax >> 4) & 0xf);
-*stepping = cpuid->eax & 0xf;
+virCPUx86SignatureFromCPUID(item->data.cpuid.eax,
+family, model, stepping);
 }
 
 
-- 
2.26.0



[libvirt PATCH 22/39] cpu_x86: Use g_auto* in virCPUx86Baseline

2020-03-27 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 46 +-
 1 file changed, 17 insertions(+), 29 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 7bd19a1676..ccbae3dabd 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -2701,21 +2701,20 @@ virCPUx86Baseline(virCPUDefPtr *cpus,
   bool migratable)
 {
 virCPUx86MapPtr map = NULL;
-virCPUx86ModelPtr base_model = NULL;
-virCPUDefPtr cpu = NULL;
+g_autoptr(virCPUx86Model) base_model = NULL;
+g_autoptr(virCPUDef) cpu = NULL;
 size_t i;
 virCPUx86VendorPtr vendor = NULL;
-virCPUx86ModelPtr model = NULL;
 bool outputVendor = true;
 const char *modelName;
 bool matchingNames = true;
-virCPUDataPtr featData = NULL;
+g_autoptr(virCPUData) featData = NULL;
 
 if (!(map = virCPUx86GetMap()))
-goto error;
+return NULL;
 
 if (!(base_model = x86ModelFromCPU(cpus[0], map, -1)))
-goto error;
+return NULL;
 
 cpu = virCPUDefNew();
 
@@ -2727,11 +2726,12 @@ virCPUx86Baseline(virCPUDefPtr *cpus,
 } else if (!(vendor = x86VendorFind(map, cpus[0]->vendor))) {
 virReportError(VIR_ERR_OPERATION_FAILED,
_("Unknown CPU vendor %s"), cpus[0]->vendor);
-goto error;
+return NULL;
 }
 
 modelName = cpus[0]->model;
 for (i = 1; i < ncpus; i++) {
+g_autoptr(virCPUx86Model) model = NULL;
 const char *vn = NULL;
 
 if (matchingNames && cpus[i]->model) {
@@ -2744,14 +2744,14 @@ virCPUx86Baseline(virCPUDefPtr *cpus,
 }
 
 if (!(model = x86ModelFromCPU(cpus[i], map, -1)))
-goto error;
+return NULL;
 
 if (cpus[i]->vendor && model->vendor &&
 STRNEQ(cpus[i]->vendor, model->vendor->name)) {
 virReportError(VIR_ERR_OPERATION_FAILED,
_("CPU vendor %s of model %s differs from vendor 
%s"),
model->vendor->name, model->name, cpus[i]->vendor);
-goto error;
+return NULL;
 }
 
 if (cpus[i]->vendor) {
@@ -2767,30 +2767,28 @@ virCPUx86Baseline(virCPUDefPtr *cpus,
 if (!(vendor = x86VendorFind(map, vn))) {
 virReportError(VIR_ERR_OPERATION_FAILED,
_("Unknown CPU vendor %s"), vn);
-goto error;
+return NULL;
 }
 } else if (STRNEQ(vendor->name, vn)) {
 virReportError(VIR_ERR_OPERATION_FAILED,
"%s", _("CPU vendors do not match"));
-goto error;
+return NULL;
 }
 }
 
 x86DataIntersect(_model->data, >data);
-x86ModelFree(model);
-model = NULL;
 }
 
 if (features) {
 virCPUx86FeaturePtr feat;
 
 if (!(featData = virCPUDataNew(archs[0])))
-goto cleanup;
+return NULL;
 
 for (i = 0; features[i]; i++) {
 if ((feat = x86FeatureFind(map, features[i])) &&
 x86DataAdd(>data.x86, >data) < 0)
-goto cleanup;
+return NULL;
 }
 
 x86DataIntersect(_model->data, >data.x86);
@@ -2799,15 +2797,15 @@ virCPUx86Baseline(virCPUDefPtr *cpus,
 if (x86DataIsEmpty(_model->data)) {
 virReportError(VIR_ERR_OPERATION_FAILED,
"%s", _("CPUs are incompatible"));
-goto error;
+return NULL;
 }
 
 if (vendor &&
 virCPUx86DataAddItem(_model->data, >data) < 0)
-goto error;
+return NULL;
 
 if (x86Decode(cpu, _model->data, models, modelName, migratable) < 0)
-goto error;
+return NULL;
 
 if (STREQ_NULLABLE(cpu->model, modelName))
 cpu->fallback = VIR_CPU_FALLBACK_FORBID;
@@ -2815,17 +2813,7 @@ virCPUx86Baseline(virCPUDefPtr *cpus,
 if (!outputVendor)
 VIR_FREE(cpu->vendor);
 
- cleanup:
-x86ModelFree(base_model);
-virCPUx86DataFree(featData);
-
-return cpu;
-
- error:
-x86ModelFree(model);
-virCPUDefFree(cpu);
-cpu = NULL;
-goto cleanup;
+return g_steal_pointer();
 }
 
 
-- 
2.26.0



[libvirt PATCH 07/39] cpu_x86: Use glib allocation in virCPUx86GetModels

2020-03-27 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 10 +-
 1 file changed, 1 insertion(+), 9 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index bcb87d6f93..fce7a2b8c5 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -3123,21 +3123,13 @@ virCPUx86GetModels(char ***models)
 return -1;
 
 if (models) {
-if (VIR_ALLOC_N(*models, map->nmodels + 1) < 0)
-goto error;
+*models = g_new0(char *, map->nmodels + 1);
 
 for (i = 0; i < map->nmodels; i++)
 (*models)[i] = g_strdup(map->models[i]->name);
 }
 
 return map->nmodels;
-
- error:
-if (models) {
-virStringListFree(*models);
-*models = NULL;
-}
-return -1;
 }
 
 
-- 
2.26.0



[libvirt PATCH 37/39] cputest: Add data for Intel(R) Xeon(R) Platinum 9242 CPU

2020-03-27 Thread Jiri Denemark
Cascadelake-Server with family 6, model 85, stepping 7.

Signed-off-by: Jiri Denemark 
---
 tests/cputest.c   |1 +
 ...6_64-cpuid-Xeon-Platinum-9242-disabled.xml |7 +
 ...86_64-cpuid-Xeon-Platinum-9242-enabled.xml |   10 +
 .../x86_64-cpuid-Xeon-Platinum-9242-guest.xml |   38 +
 .../x86_64-cpuid-Xeon-Platinum-9242-host.xml  |   39 +
 .../x86_64-cpuid-Xeon-Platinum-9242-json.xml  |   21 +
 .../x86_64-cpuid-Xeon-Platinum-9242.json  | 1405 +
 .../x86_64-cpuid-Xeon-Platinum-9242.sig   |4 +
 .../x86_64-cpuid-Xeon-Platinum-9242.xml   |   68 +
 9 files changed, 1593 insertions(+)
 create mode 100644 
tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-disabled.xml
 create mode 100644 
tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-enabled.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-guest.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-host.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-json.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242.json
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242.sig
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242.xml

diff --git a/tests/cputest.c b/tests/cputest.c
index 1f59f0d3a9..f9f1ca74ff 100644
--- a/tests/cputest.c
+++ b/tests/cputest.c
@@ -1267,6 +1267,7 @@ mymain(void)
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-Gold-5115", JSON_MODELS);
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-Gold-6148", JSON_HOST);
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-Platinum-8268", JSON_HOST);
+DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-Platinum-9242", JSON_MODELS);
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-W3520", JSON_HOST);
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-X5460", JSON_NONE);
 DO_TEST_CPUID(VIR_ARCH_X86_64, "Ice-Lake-Server", JSON_MODELS);
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-disabled.xml 
b/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-disabled.xml
new file mode 100644
index 00..e7c59cef1e
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-disabled.xml
@@ -0,0 +1,7 @@
+
+
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-enabled.xml 
b/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-enabled.xml
new file mode 100644
index 00..43c3a93a16
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-enabled.xml
@@ -0,0 +1,10 @@
+
+
+  
+  
+  
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-guest.xml 
b/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-guest.xml
new file mode 100644
index 00..faabdde8a0
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-guest.xml
@@ -0,0 +1,38 @@
+
+  Cascadelake-Server
+  Intel
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-host.xml 
b/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-host.xml
new file mode 100644
index 00..01447f3478
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-host.xml
@@ -0,0 +1,39 @@
+
+  x86_64
+  Cascadelake-Server
+  Intel
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-json.xml 
b/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-json.xml
new file mode 100644
index 00..36e95029be
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-json.xml
@@ -0,0 +1,21 @@
+
+  Cascadelake-Server
+  Intel
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242.json 
b/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242.json
new file mode 100644
index 00..103b094135
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242.json
@@ -0,0 +1,1405 @@
+{
+  "return": {
+"model": {
+  "name": "base",
+  "props": {
+"vmx-entry-load-rtit-ctl": false,
+"phys-bits": 0,
+"core-id": -1,
+"xlevel": 2147483656,
+"cmov": true,
+"ia64": false,
+"ssb-no": false,
+"aes": true,
+"vmx-apicv-xapic": true,
+"mmx": true,
+"rdpid": false,
+"vmx-page-walk-4": true,
+"vmx-page-walk-5": false,
+"arat": true,
+"gfni": false,
+"vmx-desc-exit": true,
+"ibrs-all": true,
+"pause-filter": fal

[libvirt PATCH 35/39] cpu_x86: Don't check return value of x86ModelCopy

2020-03-27 Thread Jiri Denemark
Thanks to glib allocation functions which abort on OOM the function
cannot ever return NULL.

Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 14 --
 1 file changed, 4 insertions(+), 10 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index ed6c1b43d3..51c98efca9 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -1287,9 +1287,6 @@ x86ModelFromCPU(const virCPUDef *cpu,
 model = g_new0(virCPUx86Model, 1);
 }
 
-if (!model)
-return NULL;
-
 for (i = 0; i < cpu->nfeatures; i++) {
 virCPUx86FeaturePtr feature;
 virCPUFeaturePolicy fpol;
@@ -1870,9 +1867,7 @@ x86Compute(virCPUDefPtr host,
 return VIR_CPU_COMPARE_INCOMPATIBLE;
 }
 
-if (!(diff = x86ModelCopy(host_model)))
-return VIR_CPU_COMPARE_ERROR;
-
+diff = x86ModelCopy(host_model);
 x86DataSubtract(>data, _optional->data);
 x86DataSubtract(>data, _require->data);
 x86DataSubtract(>data, _disable->data);
@@ -1893,8 +1888,7 @@ x86Compute(virCPUDefPtr host,
 }
 
 if (guest) {
-if (!(guest_model = x86ModelCopy(host_model)))
-return VIR_CPU_COMPARE_ERROR;
+guest_model = x86ModelCopy(host_model);
 
 if (cpu->vendor && host_model->vendor &&
 virCPUx86DataAddItem(_model->data,
@@ -3135,8 +3129,8 @@ virCPUx86ExpandFeatures(virCPUDefPtr cpu)
 return -1;
 }
 
-if (!(model = x86ModelCopy(model)) ||
-x86DataToCPUFeatures(expanded, host ? -1 : VIR_CPU_FEATURE_REQUIRE,
+model = x86ModelCopy(model);
+if (x86DataToCPUFeatures(expanded, host ? -1 : VIR_CPU_FEATURE_REQUIRE,
  >data, map) < 0)
 return -1;
 
-- 
2.26.0



[libvirt PATCH 31/39] cpu_x86: Move and rename x86FormatSignatures

2020-03-27 Thread Jiri Denemark
Later in this series the function will work on a newly introduced
virCPUx86Signatures structure. Let's move it to the place were all
related functions will be added and rename the function as
virCPUx86SignaturesFormat for easier review of the virCPUx86Signatures
patch.

Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 36 ++--
 1 file changed, 18 insertions(+), 18 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index ff44cae77e..182d0da97c 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -1125,6 +1125,23 @@ virCPUx86SignaturesMatch(virCPUx86ModelPtr model,
 }
 
 
+static char *
+virCPUx86SignaturesFormat(virCPUx86ModelPtr model)
+{
+virBuffer buf = VIR_BUFFER_INITIALIZER;
+size_t i;
+
+for (i = 0; i < model->nsignatures; i++) {
+virBufferAsprintf(, "%06lx,",
+  (unsigned long)model->signatures[i]);
+}
+
+virBufferTrim(, ",");
+
+return virBufferContentAndReset();
+}
+
+
 static void
 x86ModelFree(virCPUx86ModelPtr model)
 {
@@ -1892,23 +1909,6 @@ virCPUx86Compare(virCPUDefPtr host,
 }
 
 
-static char *
-x86FormatSignatures(virCPUx86ModelPtr model)
-{
-virBuffer buf = VIR_BUFFER_INITIALIZER;
-size_t i;
-
-for (i = 0; i < model->nsignatures; i++) {
-virBufferAsprintf(, "%06lx,",
-  (unsigned long)model->signatures[i]);
-}
-
-virBufferTrim(, ",");
-
-return virBufferContentAndReset();
-}
-
-
 /*
  * Checks whether a candidate model is a better fit for the CPU data than the
  * current model.
@@ -2138,7 +2138,7 @@ x86Decode(virCPUDefPtr cpu,
 if (vendor)
 cpu->vendor = g_strdup(vendor->name);
 
-sigs = x86FormatSignatures(model);
+sigs = virCPUx86SignaturesFormat(model);
 
 VIR_DEBUG("Using CPU model %s (signatures %s) for CPU with signature 
%06lx",
   model->name, NULLSTR(sigs), (unsigned long)signature);
-- 
2.26.0



[libvirt PATCH 26/39] cpu_x86: Use g_auto* in virCPUx86Translate

2020-03-27 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 26 ++
 1 file changed, 10 insertions(+), 16 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 0be2cf517d..3f6d889722 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -3019,45 +3019,39 @@ static int
 virCPUx86Translate(virCPUDefPtr cpu,
virDomainCapsCPUModelsPtr models)
 {
-virCPUDefPtr translated = NULL;
+g_autoptr(virCPUDef) translated = NULL;
 virCPUx86MapPtr map;
-virCPUx86ModelPtr model = NULL;
+g_autoptr(virCPUx86Model) model = NULL;
 size_t i;
-int ret = -1;
 
 if (!(map = virCPUx86GetMap()))
-goto cleanup;
+return -1;
 
 if (!(model = x86ModelFromCPU(cpu, map, -1)))
-goto cleanup;
+return -1;
 
 if (model->vendor &&
 virCPUx86DataAddItem(>data, >vendor->data) < 0)
-goto cleanup;
+return -1;
 
 if (model->signatures &&
 x86DataAddSignature(>data, model->signatures[0]) < 0)
-goto cleanup;
+return -1;
 
 if (!(translated = virCPUDefCopyWithoutModel(cpu)))
-goto cleanup;
+return -1;
 
 if (x86Decode(translated, >data, models, NULL, false) < 0)
-goto cleanup;
+return -1;
 
 for (i = 0; i < cpu->nfeatures; i++) {
 virCPUFeatureDefPtr f = cpu->features + i;
 if (virCPUDefUpdateFeature(translated, f->name, f->policy) < 0)
-goto cleanup;
+return -1;
 }
 
 virCPUDefStealModel(cpu, translated, true);
-ret = 0;
-
- cleanup:
-virCPUDefFree(translated);
-x86ModelFree(model);
-return ret;
+return 0;
 }
 
 
-- 
2.26.0



[libvirt PATCH 36/39] cpu_x86: Add support for stepping part of CPU signature

2020-03-27 Thread Jiri Denemark
CPU models defined in the cpu_map can use signature/@stepping attribute
to match a limited set of stepping numbers. The value is a bitmap for
bits 0..15 each corresponding to a single stepping value. For example,
stepping='4-6,9' will match 4, 5, 6, and 9. Omitting the attribute is
equivalent to stepping='0-15'.

Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 60 +++
 1 file changed, 50 insertions(+), 10 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 51c98efca9..bd224a9d0d 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -125,6 +125,7 @@ typedef struct _virCPUx86Signature virCPUx86Signature;
 struct _virCPUx86Signature {
 unsigned int family;
 unsigned int model;
+virBitmapPtr stepping;
 };
 
 typedef struct _virCPUx86Signatures virCPUx86Signatures;
@@ -732,7 +733,17 @@ x86MakeSignature(unsigned int family,
 static uint32_t
 virCPUx86SignatureToCPUID(virCPUx86Signature *sig)
 {
-return x86MakeSignature(sig->family, sig->model, 0);
+unsigned int stepping = 0;
+
+if (sig->stepping) {
+ssize_t fisrtBit;
+
+fisrtBit = virBitmapNextSetBit(sig->stepping, -1);
+if (fisrtBit >= 0)
+stepping = fisrtBit;
+}
+
+return x86MakeSignature(sig->family, sig->model, stepping);
 }
 
 
@@ -767,8 +778,8 @@ x86DataToSignatureFull(const virCPUx86Data *data,
 }
 
 
-/* Mask out irrelevant bits (R and Step) from processor signature. */
-#define SIGNATURE_MASK  0x0fff3ff0
+/* Mask out reserved bits from processor signature. */
+#define SIGNATURE_MASK  0x0fff3fff
 
 static uint32_t
 x86DataToSignature(const virCPUx86Data *data)
@@ -1134,9 +1145,14 @@ virCPUx86SignaturesNew(size_t count)
 static void
 virCPUx86SignaturesFree(virCPUx86SignaturesPtr sigs)
 {
+size_t i;
+
 if (!sigs)
 return;
 
+for (i = 0; i < sigs->count; i++)
+virBitmapFree(sigs->items[i].stepping);
+
 g_free(sigs->items);
 g_free(sigs);
 }
@@ -1153,8 +1169,12 @@ virCPUx86SignaturesCopy(virCPUx86SignaturesPtr src)
 
 dst = virCPUx86SignaturesNew(src->count);
 
-for (i = 0; i < src->count; i++)
-dst->items[i] = src->items[i];
+for (i = 0; i < src->count; i++) {
+dst->items[i].family = src->items[i].family;
+dst->items[i].model = src->items[i].model;
+if (src->items[i].stepping)
+dst->items[i].stepping = virBitmapNewCopy(src->items[i].stepping);
+}
 
 return dst;
 }
@@ -1176,7 +1196,9 @@ virCPUx86SignaturesMatch(virCPUx86SignaturesPtr sigs,
 
 for (i = 0; i < sigs->count; i++) {
 if (sigs->items[i].family == family &&
-sigs->items[i].model == model)
+sigs->items[i].model == model &&
+(!sigs->items[i].stepping ||
+ virBitmapIsBitSet(sigs->items[i].stepping, stepping)))
 return true;
 }
 
@@ -1194,9 +1216,15 @@ virCPUx86SignaturesFormat(virCPUx86SignaturesPtr sigs)
 return virBufferContentAndReset();
 
 for (i = 0; i < sigs->count; i++) {
-virBufferAsprintf(, "(%u,%u,0), ",
+g_autofree char *stepping = NULL;
+
+if (sigs->items[i].stepping)
+stepping = virBitmapFormat(sigs->items[i].stepping);
+
+virBufferAsprintf(, "(%u,%u,%s), ",
   sigs->items[i].family,
-  sigs->items[i].model);
+  sigs->items[i].model,
+  stepping ? stepping : "0-15");
 }
 
 virBufferTrim(, ", ");
@@ -1473,6 +1501,7 @@ x86ModelParseSignatures(virCPUx86ModelPtr model,
 
 for (i = 0; i < n; i++) {
 virCPUx86Signature *sig = >signatures->items[i];
+g_autofree char *stepping = NULL;
 int rc;
 
 ctxt->node = nodes[i];
@@ -1492,6 +1521,11 @@ x86ModelParseSignatures(virCPUx86ModelPtr model,
model->name);
 return -1;
 }
+
+stepping = virXPathString("string(@stepping)", ctxt);
+/* stepping corresponds to 4 bits in 32b signature, see above */
+if (stepping && virBitmapParse(stepping, >stepping, 16) < 0)
+return -1;
 }
 
 ctxt->node = root;
@@ -2094,6 +2128,9 @@ x86Decode(virCPUDefPtr cpu,
 virDomainCapsCPUModelPtr hvModel = NULL;
 g_autofree char *sigs = NULL;
 uint32_t signature;
+unsigned int sigFamily;
+unsigned int sigModel;
+unsigned int sigStepping;
 ssize_t i;
 int rc;
 
@@ -2107,6 +2144,7 @@ x86Decode(virCPUDefPtr cpu,
 
 vendor = x86DataToVendor(, map);
 signature = x86DataToSignature();
+virCPUx86SignatureFromCPUID(signature, , , 
);
 
 x86DataFilterTSX(, vendor, map);
 
@@ -2188,8 +2226,10 @@ x86Decode(virCPUDefPtr cpu,
 
 sigs = 

[libvirt PATCH 34/39] cpu_x86: Replace 32b signatures in virCPUx86Model with a struct

2020-03-27 Thread Jiri Denemark
The CPU models in our cpu_map define their signatures using separate
family and model numbers. Let's store the signatures in the same way in
our runtime representation of the cpu_map.

Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 149 +-
 1 file changed, 95 insertions(+), 54 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 29c6e2b6be..ed6c1b43d3 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -121,6 +121,19 @@ static virCPUx86Feature x86_kvm_features[] =
 KVM_FEATURE(VIR_CPU_x86_HV_STIMER_DIRECT),
 };
 
+typedef struct _virCPUx86Signature virCPUx86Signature;
+struct _virCPUx86Signature {
+unsigned int family;
+unsigned int model;
+};
+
+typedef struct _virCPUx86Signatures virCPUx86Signatures;
+typedef virCPUx86Signatures *virCPUx86SignaturesPtr;
+struct _virCPUx86Signatures {
+size_t count;
+virCPUx86Signature *items;
+};
+
 typedef struct _virCPUx86Model virCPUx86Model;
 typedef virCPUx86Model *virCPUx86ModelPtr;
 struct _virCPUx86Model {
@@ -128,8 +141,7 @@ struct _virCPUx86Model {
 bool decodeHost;
 bool decodeGuest;
 virCPUx86VendorPtr vendor;
-size_t nsignatures;
-uint32_t *signatures;
+virCPUx86SignaturesPtr signatures;
 virCPUx86Data data;
 };
 
@@ -717,6 +729,13 @@ x86MakeSignature(unsigned int family,
 }
 
 
+static uint32_t
+virCPUx86SignatureToCPUID(virCPUx86Signature *sig)
+{
+return x86MakeSignature(sig->family, sig->model, 0);
+}
+
+
 static void
 virCPUx86SignatureFromCPUID(uint32_t sig,
 unsigned int *family,
@@ -1099,41 +1118,65 @@ x86FeatureParse(xmlXPathContextPtr ctxt,
 }
 
 
+static virCPUx86SignaturesPtr
+virCPUx86SignaturesNew(size_t count)
+{
+virCPUx86SignaturesPtr sigs;
+
+sigs = g_new0(virCPUx86Signatures, 1);
+sigs->items = g_new0(virCPUx86Signature, count);
+sigs->count = count;
+
+return sigs;
+}
+
+
 static void
-virCPUx86SignaturesFree(uint32_t *signatures)
+virCPUx86SignaturesFree(virCPUx86SignaturesPtr sigs)
 {
-g_free(signatures);
+if (!sigs)
+return;
+
+g_free(sigs->items);
+g_free(sigs);
 }
 
 
-static int
-virCPUx86SignaturesCopy(virCPUx86ModelPtr dst,
-virCPUx86ModelPtr src)
+static virCPUx86SignaturesPtr
+virCPUx86SignaturesCopy(virCPUx86SignaturesPtr src)
 {
+virCPUx86SignaturesPtr dst;
 size_t i;
 
-if (src->nsignatures == 0)
-return 0;
+if (!src || src->count == 0)
+return NULL;
 
-if (VIR_ALLOC_N(dst->signatures, src->nsignatures) < 0)
-return -1;
+dst = virCPUx86SignaturesNew(src->count);
 
-dst->nsignatures = src->nsignatures;
-for (i = 0; i < src->nsignatures; i++)
-dst->signatures[i] = src->signatures[i];
+for (i = 0; i < src->count; i++)
+dst->items[i] = src->items[i];
 
-return 0;
+return dst;
 }
 
 
 static bool
-virCPUx86SignaturesMatch(virCPUx86ModelPtr model,
+virCPUx86SignaturesMatch(virCPUx86SignaturesPtr sigs,
  uint32_t signature)
 {
 size_t i;
+unsigned int family;
+unsigned int model;
+unsigned int stepping;
 
-for (i = 0; i < model->nsignatures; i++) {
-if (model->signatures[i] == signature)
+if (!sigs)
+return false;
+
+virCPUx86SignatureFromCPUID(signature, , , );
+
+for (i = 0; i < sigs->count; i++) {
+if (sigs->items[i].family == family &&
+sigs->items[i].model == model)
 return true;
 }
 
@@ -1142,17 +1185,21 @@ virCPUx86SignaturesMatch(virCPUx86ModelPtr model,
 
 
 static char *
-virCPUx86SignaturesFormat(virCPUx86ModelPtr model)
+virCPUx86SignaturesFormat(virCPUx86SignaturesPtr sigs)
 {
 virBuffer buf = VIR_BUFFER_INITIALIZER;
 size_t i;
 
-for (i = 0; i < model->nsignatures; i++) {
-virBufferAsprintf(, "%06lx,",
-  (unsigned long)model->signatures[i]);
+if (!sigs)
+return virBufferContentAndReset();
+
+for (i = 0; i < sigs->count; i++) {
+virBufferAsprintf(, "(%u,%u,0), ",
+  sigs->items[i].family,
+  sigs->items[i].model);
 }
 
-virBufferTrim(, ",");
+virBufferTrim(, ", ");
 
 return virBufferContentAndReset();
 }
@@ -1179,16 +1226,11 @@ x86ModelCopy(virCPUx86ModelPtr model)
 
 copy = g_new0(virCPUx86Model, 1);
 copy->name = g_strdup(model->name);
-
-if (virCPUx86SignaturesCopy(copy, model) < 0) {
-x86ModelFree(copy);
-return NULL;
-}
+copy->signatures = virCPUx86SignaturesCopy(model->signatures);
 x86DataCopy(>data, >data);
-
 copy->vendor = model->vendor;
 
-return copy;
+return g_steal_pointer();
 }
 
 
@@ -1408,9 +1450,7 @@ x86ModelParseA

[libvirt PATCH 39/39] cpu_map: Distinguish Cascadelake-Server from Skylake-Server

2020-03-27 Thread Jiri Denemark
The signatures of these two CPU model differ only in stepping as both
report family 6 and model 85. Skylake-Server uses stepping 4 or less and
Cascadelake-Server uses stepping 5..7.

https://bugzilla.redhat.com/show_bug.cgi?id=1761678

Signed-off-by: Jiri Denemark 
---
 src/cpu_map/x86_Cascadelake-Server-noTSX.xml| 2 +-
 src/cpu_map/x86_Cascadelake-Server.xml  | 2 +-
 src/cpu_map/x86_Skylake-Server-IBRS.xml | 2 +-
 src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml   | 2 +-
 src/cpu_map/x86_Skylake-Server.xml  | 2 +-
 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-guest.xml | 5 +++--
 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-json.xml  | 5 +++--
 7 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/src/cpu_map/x86_Cascadelake-Server-noTSX.xml 
b/src/cpu_map/x86_Cascadelake-Server-noTSX.xml
index 459174a30d..bfd4629836 100644
--- a/src/cpu_map/x86_Cascadelake-Server-noTSX.xml
+++ b/src/cpu_map/x86_Cascadelake-Server-noTSX.xml
@@ -1,7 +1,7 @@
 
   
 
- 
+ 
 
 
 
diff --git a/src/cpu_map/x86_Cascadelake-Server.xml 
b/src/cpu_map/x86_Cascadelake-Server.xml
index d7ec42f57e..335e9cb584 100644
--- a/src/cpu_map/x86_Cascadelake-Server.xml
+++ b/src/cpu_map/x86_Cascadelake-Server.xml
@@ -1,7 +1,7 @@
 
   
 
- 
+ 
 
 
 
diff --git a/src/cpu_map/x86_Skylake-Server-IBRS.xml 
b/src/cpu_map/x86_Skylake-Server-IBRS.xml
index bd6b6457ad..9fb3488809 100644
--- a/src/cpu_map/x86_Skylake-Server-IBRS.xml
+++ b/src/cpu_map/x86_Skylake-Server-IBRS.xml
@@ -1,7 +1,7 @@
 
   
 
- 
+ 
 
 
 
diff --git a/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml 
b/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml
index c2b7de40e8..c162c0acc3 100644
--- a/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml
+++ b/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml
@@ -1,7 +1,7 @@
 
   
 
- 
+ 
 
 
 
diff --git a/src/cpu_map/x86_Skylake-Server.xml 
b/src/cpu_map/x86_Skylake-Server.xml
index f96875a85f..e022d94c84 100644
--- a/src/cpu_map/x86_Skylake-Server.xml
+++ b/src/cpu_map/x86_Skylake-Server.xml
@@ -1,7 +1,7 @@
 
   
 
- 
+ 
 
 
 
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-guest.xml 
b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-guest.xml
index cfb0eb982d..c21cb1e600 100644
--- a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-guest.xml
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-guest.xml
@@ -1,5 +1,5 @@
 
-  Cascadelake-Server
+  Skylake-Server-IBRS
   Intel
   
   
@@ -20,14 +20,15 @@
   
   
   
+  
   
   
   
   
   
+  
   
   
   
   
-  
 
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-json.xml 
b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-json.xml
index 968d904557..b482043ccf 100644
--- a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-json.xml
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-json.xml
@@ -1,16 +1,17 @@
 
-  Cascadelake-Server
+  Skylake-Server-IBRS
   Intel
   
   
   
   
+  
   
   
   
   
   
+  
   
   
-  
 
-- 
2.26.0



[libvirt PATCH 32/39] cpu_x86: Introduce virCPUx86SignaturesFree

2020-03-27 Thread Jiri Denemark
The function will be used for freeing virCPUx86Signatures structure
introduced later in this series.

Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 182d0da97c..a71b5ccacc 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -1090,6 +1090,13 @@ x86FeatureParse(xmlXPathContextPtr ctxt,
 }
 
 
+static void
+virCPUx86SignaturesFree(uint32_t *signatures)
+{
+g_free(signatures);
+}
+
+
 static int
 virCPUx86SignaturesCopy(virCPUx86ModelPtr dst,
 virCPUx86ModelPtr src)
@@ -1149,7 +1156,7 @@ x86ModelFree(virCPUx86ModelPtr model)
 return;
 
 g_free(model->name);
-g_free(model->signatures);
+virCPUx86SignaturesFree(model->signatures);
 virCPUx86DataClear(>data);
 g_free(model);
 }
@@ -1414,7 +1421,7 @@ x86ModelParseSignatures(virCPUx86ModelPtr model,
 return n;
 
 /* Remove inherited signatures. */
-VIR_FREE(model->signatures);
+virCPUx86SignaturesFree(model->signatures);
 
 model->nsignatures = n;
 if (VIR_ALLOC_N(model->signatures, n) < 0)
-- 
2.26.0



[libvirt PATCH 21/39] cpu_x86: Use g_auto* in virCPUx86GetHost

2020-03-27 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 14 ++
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 3b3a428ecd..7bd19a1676 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -2641,18 +2641,18 @@ static int
 virCPUx86GetHost(virCPUDefPtr cpu,
  virDomainCapsCPUModelsPtr models)
 {
-virCPUDataPtr cpuData = NULL;
-int ret = -1;
+g_autoptr(virCPUData) cpuData = NULL;
+int ret;
 
 if (virCPUx86DriverInitialize() < 0)
-goto cleanup;
+return -1;
 
 if (!(cpuData = virCPUDataNew(archs[0])))
-goto cleanup;
+return -1;
 
 if (cpuidSet(CPUX86_BASIC, cpuData) < 0 ||
 cpuidSet(CPUX86_EXTENDED, cpuData) < 0)
-goto cleanup;
+return -1;
 
 /* Read the IA32_ARCH_CAPABILITIES MSR (0x10a) if supported.
  * This is best effort since there might be no way to read the MSR
@@ -2672,7 +2672,7 @@ virCPUx86GetHost(virCPUDefPtr cpu,
 };
 
 if (virCPUx86DataAdd(cpuData, ) < 0)
-goto cleanup;
+return -1;
 }
 }
 
@@ -2688,8 +2688,6 @@ virCPUx86GetHost(virCPUDefPtr cpu,
 VIR_DEBUG("Host CPU does not support invariant TSC");
 }
 
- cleanup:
-virCPUx86DataFree(cpuData);
 return ret;
 }
 #endif
-- 
2.26.0



[libvirt PATCH 29/39] cpu_x86: Move and rename x86ModelCopySignatures

2020-03-27 Thread Jiri Denemark
Later in this series the function will work on a newly introduced
virCPUx86Signatures structure. Let's move it to the place were all
related functions will be added and rename the function as
virCPUx86SignaturesCopy for easier review of the virCPUx86Signatures
patch.

Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 36 ++--
 1 file changed, 18 insertions(+), 18 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 16e73b5b98..4b6eaf8060 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -1090,23 +1090,9 @@ x86FeatureParse(xmlXPathContextPtr ctxt,
 }
 
 
-static void
-x86ModelFree(virCPUx86ModelPtr model)
-{
-if (!model)
-return;
-
-g_free(model->name);
-g_free(model->signatures);
-virCPUx86DataClear(>data);
-g_free(model);
-}
-G_DEFINE_AUTOPTR_CLEANUP_FUNC(virCPUx86Model, x86ModelFree);
-
-
 static int
-x86ModelCopySignatures(virCPUx86ModelPtr dst,
-   virCPUx86ModelPtr src)
+virCPUx86SignaturesCopy(virCPUx86ModelPtr dst,
+virCPUx86ModelPtr src)
 {
 size_t i;
 
@@ -1124,6 +1110,20 @@ x86ModelCopySignatures(virCPUx86ModelPtr dst,
 }
 
 
+static void
+x86ModelFree(virCPUx86ModelPtr model)
+{
+if (!model)
+return;
+
+g_free(model->name);
+g_free(model->signatures);
+virCPUx86DataClear(>data);
+g_free(model);
+}
+G_DEFINE_AUTOPTR_CLEANUP_FUNC(virCPUx86Model, x86ModelFree);
+
+
 static virCPUx86ModelPtr
 x86ModelCopy(virCPUx86ModelPtr model)
 {
@@ -1132,7 +1132,7 @@ x86ModelCopy(virCPUx86ModelPtr model)
 copy = g_new0(virCPUx86Model, 1);
 copy->name = g_strdup(model->name);
 
-if (x86ModelCopySignatures(copy, model) < 0) {
+if (virCPUx86SignaturesCopy(copy, model) < 0) {
 x86ModelFree(copy);
 return NULL;
 }
@@ -1360,7 +1360,7 @@ x86ModelParseAncestor(virCPUx86ModelPtr model,
 }
 
 model->vendor = ancestor->vendor;
-if (x86ModelCopySignatures(model, ancestor) < 0)
+if (virCPUx86SignaturesCopy(model, ancestor) < 0)
 return -1;
 
 x86DataCopy(>data, >data);
-- 
2.26.0



[libvirt PATCH 25/39] cpu_x86: Use g_auto* in virCPUx86UpdateLive

2020-03-27 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 42 +++---
 1 file changed, 15 insertions(+), 27 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 8da8b3ada2..0be2cf517d 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -2901,26 +2901,25 @@ virCPUx86UpdateLive(virCPUDefPtr cpu,
 {
 bool hostPassthrough = cpu->mode == VIR_CPU_MODE_HOST_PASSTHROUGH;
 virCPUx86MapPtr map;
-virCPUx86ModelPtr model = NULL;
-virCPUx86ModelPtr modelDisabled = NULL;
-virCPUx86Data enabled = VIR_CPU_X86_DATA_INIT;
-virCPUx86Data disabled = VIR_CPU_X86_DATA_INIT;
-virBuffer bufAdded = VIR_BUFFER_INITIALIZER;
-virBuffer bufRemoved = VIR_BUFFER_INITIALIZER;
-char *added = NULL;
-char *removed = NULL;
+g_autoptr(virCPUx86Model) model = NULL;
+g_autoptr(virCPUx86Model) modelDisabled = NULL;
+g_auto(virCPUx86Data) enabled = VIR_CPU_X86_DATA_INIT;
+g_auto(virCPUx86Data) disabled = VIR_CPU_X86_DATA_INIT;
+g_auto(virBuffer) bufAdded = VIR_BUFFER_INITIALIZER;
+g_auto(virBuffer) bufRemoved = VIR_BUFFER_INITIALIZER;
+g_autofree char *added = NULL;
+g_autofree char *removed = NULL;
 size_t i;
-int ret = -1;
 
 if (!(map = virCPUx86GetMap()))
 return -1;
 
 if (!(model = x86ModelFromCPU(cpu, map, -1)))
-goto cleanup;
+return -1;
 
 if (hostPassthrough &&
 !(modelDisabled = x86ModelFromCPU(cpu, map, VIR_CPU_FEATURE_DISABLE)))
-goto cleanup;
+return -1;
 
 if (dataEnabled)
 x86DataCopy(, >data.x86);
@@ -2945,7 +2944,7 @@ virCPUx86UpdateLive(virCPUDefPtr cpu,
 virBufferAsprintf(, "%s,", feature->name);
 else if (virCPUDefUpdateFeature(cpu, feature->name,
 VIR_CPU_FEATURE_REQUIRE) < 0)
-goto cleanup;
+return -1;
 }
 
 if (x86DataIsSubset(, >data) ||
@@ -2956,7 +2955,7 @@ virCPUx86UpdateLive(virCPUDefPtr cpu,
 virBufferAsprintf(, "%s,", feature->name);
 else if (virCPUDefUpdateFeature(cpu, feature->name,
 VIR_CPU_FEATURE_DISABLE) < 0)
-goto cleanup;
+return -1;
 }
 }
 
@@ -2982,28 +2981,17 @@ virCPUx86UpdateLive(virCPUDefPtr cpu,
_("guest CPU doesn't match specification: "
  "missing features: %s"),
removed);
-goto cleanup;
+return -1;
 }
 
 if (cpu->check == VIR_CPU_CHECK_FULL &&
 !x86DataIsEmpty()) {
 virReportError(VIR_ERR_OPERATION_FAILED, "%s",
_("guest CPU doesn't match specification"));
-goto cleanup;
+return -1;
 }
 
-ret = 0;
-
- cleanup:
-x86ModelFree(model);
-x86ModelFree(modelDisabled);
-virCPUx86DataClear();
-virCPUx86DataClear();
-VIR_FREE(added);
-VIR_FREE(removed);
-virBufferFreeAndReset();
-virBufferFreeAndReset();
-return ret;
+return 0;
 }
 
 
-- 
2.26.0



[libvirt PATCH 00/39] Distinguish Cascadelake-Server from Skylake-Server

2020-03-27 Thread Jiri Denemark
The signatures of these two CPU model differ only in stepping as both
report family 6 and model 85. Skylake-Server uses stepping 4 or less and
Cascadelake-Server uses stepping 5..7.

https://bugzilla.redhat.com/show_bug.cgi?id=1761678

Jiri Denemark (39):
  cpu_x86: Drop noTSX hint for incompatible CPUs
  cpu_x86: Use glib allocation for virCPU{,x86}Data
  cpu_x86: Use glib allocation for virCPUx86Vendor
  cpu_x86: Use glib allocation for virCPUx86Feature
  cpu_x86: Use glib allocation for virCPUx86Model
  cpu_x86: Use glib allocation for virCPUx86Map
  cpu_x86: Use glib allocation in virCPUx86GetModels
  cpu_x86: Use g_auto* in x86DataToCPU
  cpu_x86: Use g_auto* in x86VendorParse
  cpu_x86: Use g_auto* in x86FeatureParse
  cpu_x86: Use g_auto* in x86ModelFromCPU
  cpu_x86: Use g_auto* in x86ModelParse
  cpu_x86: Use g_auto* in virCPUx86LoadMap
  cpu_x86: Use g_auto* in virCPUx86DataParse
  cpu_x86: Use g_auto* in x86Compute
  cpu_x86: Use g_auto* in virCPUx86Compare
  cpu_x86: Use g_auto* in x86Decode
  cpu_x86: Use g_auto* in x86EncodePolicy
  cpu_x86: Use g_auto* in x86Encode
  cpu_x86: Use g_auto* in virCPUx86CheckFeature
  cpu_x86: Use g_auto* in virCPUx86GetHost
  cpu_x86: Use g_auto* in virCPUx86Baseline
  cpu_x86: Use g_auto* in x86UpdateHostModel
  cpu_x86: Use g_auto* in virCPUx86Update
  cpu_x86: Use g_auto* in virCPUx86UpdateLive
  cpu_x86: Use g_auto* in virCPUx86Translate
  cpu_x86: Use g_auto* in virCPUx86ExpandFeatures
  cpu_x86: Use g_auto* in virCPUx86CopyMigratable
  cpu_x86: Move and rename x86ModelCopySignatures
  cpu_x86: Move and rename x86ModelHasSignature
  cpu_x86: Move and rename x86FormatSignatures
  cpu_x86: Introduce virCPUx86SignaturesFree
  cpu_x86: Introduce virCPUx86SignatureFromCPUID
  cpu_x86: Replace 32b signatures in virCPUx86Model with a struct
  cpu_x86: Don't check return value of x86ModelCopy
  cpu_x86: Add support for stepping part of CPU signature
  cputest: Add data for Intel(R) Xeon(R) Platinum 9242 CPU
  cputest: Add data for Intel(R) Xeon(R) Gold 6130 CPU
  cpu_map: Distinguish Cascadelake-Server from Skylake-Server

 src/cpu/cpu_x86.c |  936 +--
 src/cpu_map/x86_Cascadelake-Server-noTSX.xml  |2 +-
 src/cpu_map/x86_Cascadelake-Server.xml|2 +-
 src/cpu_map/x86_Skylake-Server-IBRS.xml   |2 +-
 src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml |2 +-
 src/cpu_map/x86_Skylake-Server.xml|2 +-
 tests/cputest.c   |2 +
 .../x86_64-cpuid-Xeon-Gold-6130-disabled.xml  |7 +
 .../x86_64-cpuid-Xeon-Gold-6130-enabled.xml   |9 +
 .../x86_64-cpuid-Xeon-Gold-6130-guest.xml |   34 +
 .../x86_64-cpuid-Xeon-Gold-6130-host.xml  |   35 +
 .../x86_64-cpuid-Xeon-Gold-6130-json.xml  |   17 +
 .../x86_64-cpuid-Xeon-Gold-6130.json  | 1201 ++
 .../x86_64-cpuid-Xeon-Gold-6130.sig   |4 +
 .../x86_64-cpuid-Xeon-Gold-6130.xml   |   54 +
 ...6_64-cpuid-Xeon-Platinum-9242-disabled.xml |7 +
 ...86_64-cpuid-Xeon-Platinum-9242-enabled.xml |   10 +
 .../x86_64-cpuid-Xeon-Platinum-9242-guest.xml |   38 +
 .../x86_64-cpuid-Xeon-Platinum-9242-host.xml  |   39 +
 .../x86_64-cpuid-Xeon-Platinum-9242-json.xml  |   21 +
 .../x86_64-cpuid-Xeon-Platinum-9242.json  | 1405 +
 .../x86_64-cpuid-Xeon-Platinum-9242.sig   |4 +
 .../x86_64-cpuid-Xeon-Platinum-9242.xml   |   68 +
 23 files changed, 3372 insertions(+), 529 deletions(-)
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-disabled.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-enabled.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-guest.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-host.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130-json.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130.json
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130.sig
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Gold-6130.xml
 create mode 100644 
tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-disabled.xml
 create mode 100644 
tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-enabled.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-guest.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-host.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242-json.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242.json
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242.sig
 create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-Platinum-9242.xml

-- 
2.26.0



[libvirt PATCH 17/39] cpu_x86: Use g_auto* in x86Decode

2020-03-27 Thread Jiri Denemark
Signed-off-by: Jiri Denemark 
---
 src/cpu/cpu_x86.c | 26 +-
 1 file changed, 9 insertions(+), 17 deletions(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index e4e21fbed4..26d872622e 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -2034,15 +2034,14 @@ x86Decode(virCPUDefPtr cpu,
   const char *preferred,
   bool migratable)
 {
-int ret = -1;
 virCPUx86MapPtr map;
 virCPUx86ModelPtr candidate;
 virCPUDefPtr cpuCandidate;
 virCPUx86ModelPtr model = NULL;
-virCPUDefPtr cpuModel = NULL;
-virCPUx86Data data = VIR_CPU_X86_DATA_INIT;
-virCPUx86Data copy = VIR_CPU_X86_DATA_INIT;
-virCPUx86Data features = VIR_CPU_X86_DATA_INIT;
+g_autoptr(virCPUDef) cpuModel = NULL;
+g_auto(virCPUx86Data) data = VIR_CPU_X86_DATA_INIT;
+g_auto(virCPUx86Data) copy = VIR_CPU_X86_DATA_INIT;
+g_auto(virCPUx86Data) features = VIR_CPU_X86_DATA_INIT;
 virCPUx86VendorPtr vendor;
 virDomainCapsCPUModelPtr hvModel = NULL;
 g_autofree char *sigs = NULL;
@@ -2056,7 +2055,7 @@ x86Decode(virCPUDefPtr cpu,
 x86DataCopy(, cpuData);
 
 if (!(map = virCPUx86GetMap()))
-goto cleanup;
+return -1;
 
 vendor = x86DataToVendor(, map);
 signature = x86DataToSignature();
@@ -2075,7 +2074,7 @@ x86Decode(virCPUDefPtr cpu,
 virReportError(VIR_ERR_CONFIG_UNSUPPORTED,
_("CPU model %s is not supported by 
hypervisor"),
preferred);
-goto cleanup;
+return -1;
 } else {
 VIR_WARN("Preferred CPU model %s not allowed by"
  " hypervisor; closest supported model will be"
@@ -2098,7 +2097,7 @@ x86Decode(virCPUDefPtr cpu,
 }
 
 if (!(cpuCandidate = x86DataToCPU(, candidate, map, hvModel)))
-goto cleanup;
+return -1;
 cpuCandidate->type = cpu->type;
 
 if ((rc = x86DecodeUseCandidate(model, cpuModel,
@@ -2117,7 +2116,7 @@ x86Decode(virCPUDefPtr cpu,
 if (!cpuModel) {
 virReportError(VIR_ERR_INTERNAL_ERROR,
"%s", _("Cannot find suitable CPU model for given 
data"));
-goto cleanup;
+return -1;
 }
 
 /* Remove non-migratable features if requested
@@ -2151,14 +2150,7 @@ x86Decode(virCPUDefPtr cpu,
 cpu->nfeatures_max = cpuModel->nfeatures_max;
 cpuModel->nfeatures_max = 0;
 
-ret = 0;
-
- cleanup:
-virCPUDefFree(cpuModel);
-virCPUx86DataClear();
-virCPUx86DataClear();
-virCPUx86DataClear();
-return ret;
+return 0;
 }
 
 static int
-- 
2.26.0



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