Hi ,
We will cherry-pick this patch :
http://cgit.sonyericsson.net/cgit.cgi/kernel/msm.git/commit/?id=2504e77ddedfa34dbd64e757a14e5b21a613c000
for security reason ,
but I have a question about this patch ,
this patch will make .text section permission become RX but not writable ,
so some
On 10/25, Andy Gross wrote:
diff --git a/Documentation/devicetree/bindings/dma/msm_bam_dma.txt
b/Documentation/devicetree/bindings/dma/msm_bam_dma.txt
new file mode 100644
index 000..fe3ed8f
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/msm_bam_dma.txt
@@ -0,0 +1,49 @@
Hi
I see ,
__patch_text( ) this function has been changed to make sure
The text section can be writable .
Thanks
-Original Message-
From: Wang, Yalin
Sent: Tuesday, October 29, 2013 1:50 PM
To: 'lbas...@codeaurora.org'
Cc: 'linux-arm-msm-ow...@vger.kernel.org';
On Mon, 28 Oct 2013, Stephen Boyd wrote:
In the near future we're going to use these percpu irq functions
in the Krait CPU EDAC driver. Export them so that the EDAC driver
can be compiled as a module.
Cc: Thomas Gleixner t...@linutronix.de
Signed-off-by: Stephen Boyd sb...@codeaurora.org
Hi Josh,
On Mon, 2013-10-28 at 13:12 -0500, Josh Cartwright wrote:
Signed-off-by: Josh Cartwright jo...@codeaurora.org
---
.../bindings/spmi/qcom,spmi-pmic-arb.txt | 42
++
1 file changed, 42 insertions(+)
create mode 100644
Hi Josh,
On Mon, 2013-10-28 at 13:12 -0500, Josh Cartwright wrote:
Document the bindings used to describe the Qualcomm 8x41 PMICs.
Signed-off-by: Josh Cartwright jo...@codeaurora.org
---
Documentation/devicetree/bindings/mfd/pm8x41.txt | 33
1 file changed, 33
On Tue, Oct 29, 2013 at 04:18:35PM +0200, Ivan T. Ivanov wrote:
On Mon, 2013-10-28 at 13:12 -0500, Josh Cartwright wrote:
Document the bindings used to describe the Qualcomm 8x41 PMICs.
Signed-off-by: Josh Cartwright jo...@codeaurora.org
---
On Tue, Oct 29, 2013 at 04:08:29PM +0200, Ivan T. Ivanov wrote:
On Mon, 2013-10-28 at 13:12 -0500, Josh Cartwright wrote:
Signed-off-by: Josh Cartwright jo...@codeaurora.org
---
.../bindings/spmi/qcom,spmi-pmic-arb.txt | 42
++
1 file changed, 42
Couple of high-level comments on the in-kernel API.
On 10/28/2013 07:12 PM, Josh Cartwright wrote:
+#ifdef CONFIG_PM_SLEEP
+static int spmi_pm_suspend(struct device *dev)
+{
+ const struct dev_pm_ops *pm = dev-driver ? dev-driver-pm : NULL;
+
+ if (pm)
+ return
Hi,
On Tue, 2013-10-29 at 10:05 -0500, Josh Cartwright wrote:
On Tue, Oct 29, 2013 at 04:18:35PM +0200, Ivan T. Ivanov wrote:
On Mon, 2013-10-28 at 13:12 -0500, Josh Cartwright wrote:
Document the bindings used to describe the Qualcomm 8x41 PMICs.
Signed-off-by: Josh Cartwright
Daniel,
I would be very happy to take more code for the older Qualcomm chipset
to enable full functionality for them, but it's been my impression
that far from all that is needed to make it a useful platform is in
the upstream kernel, and there's been no signs of more of it showing
up at least in
On Mon, 28 Oct 2013, Josh Cartwright wrote:
The Qualcomm 8941 and 8841 PMICs are components used with the Snapdragon
800 series SoC family. This driver exists largely as a glue mfd component,
it exists to be an owner of an SPMI regmap for children devices
described in device tree.
Hey Lars-
Thanks for the feedback. CC'ing Ivan, since he had the same feedback
regarding the PM callbacks.
On Tue, Oct 29, 2013 at 04:21:28PM +0100, Lars-Peter Clausen wrote:
Couple of high-level comments on the in-kernel API.
On 10/28/2013 07:12 PM, Josh Cartwright wrote:
+#ifdef
On Tue, Oct 29, 2013 at 08:56:05AM -0700, Lee Jones wrote:
On Mon, 28 Oct 2013, Josh Cartwright wrote:
The Qualcomm 8941 and 8841 PMICs are components used with the Snapdragon
800 series SoC family. This driver exists largely as a glue mfd component,
it exists to be an owner of an SPMI
On Tue, Oct 29, 2013 at 05:02:03PM +0200, Ivan T. Ivanov wrote:
On Mon, 2013-10-28 at 13:12 -0500, Josh Cartwright wrote:
From: Kenneth Heitke khei...@codeaurora.org
System Power Management Interface (SPMI) is a specification
developed by the MIPI (Mobile Industry Process Interface)
On 10/29/13 08:56, Josh Cartwright wrote:
+#define to_spmi_controller(d) container_of(d, struct spmi_controller, dev)
Should be a inline function for better type safety.
Sounds good. Will change the to_spmi_*() macros.
I was under the impression that container_of() already does type
On 10/28/13 11:12, Josh Cartwright wrote:
diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
new file mode 100644
index 000..a03835f
--- /dev/null
+++ b/drivers/spmi/Kconfig
@@ -0,0 +1,9 @@
+#
+# SPMI driver configuration
+#
+menuconfig SPMI
+ bool SPMI support
Can we do
On Tue, Oct 29, 2013 at 08:37:28AM -0700, Olof Johansson wrote:
Daniel,
I would be very happy to take more code for the older Qualcomm chipset
to enable full functionality for them, but it's been my impression
that far from all that is needed to make it a useful platform is in
the upstream
On 10/25, Andy Gross wrote:
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index f238cfd..a71b415 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -364,4 +364,13 @@ config DMATEST
Simple DMA test client. Say N unless you're debugging a
DMA Device driver.
On 10/29/13 01:21, Kumar Gala wrote:
On Oct 28, 2013, at 7:31 PM, Stephen Boyd wrote:
The Krait L1/L2 error reporting device is made up of two
interrupts, one per-CPU interrupt for the L1 caches and one
interrupt for the L2 cache.
Cc: devicet...@vger.kernel.org
Signed-off-by: Stephen Boyd
* Olof Johansson o...@lixom.net [131029 10:40]:
On Tue, Oct 29, 2013 at 10:08 AM, Daniel Walker dwal...@fifo99.com wrote:
Personally I think splitting mach- stuff isn't very useful or
interesting.. There's just no technical reason for it, for example x86
and x86_64 was a win from my
On Tue, Oct 29, 2013 at 10:39:45AM -0700, Olof Johansson wrote:
On Tue, Oct 29, 2013 at 10:08 AM, Daniel Walker dwal...@fifo99.com wrote:
Personally I think splitting mach- stuff isn't very useful or
interesting.. There's just no technical reason for it, for example x86
and x86_64 was a
On 10/29/2013 05:30 PM, Stephen Boyd wrote:
On 10/29/13 08:56, Josh Cartwright wrote:
+#define to_spmi_controller(d) container_of(d, struct spmi_controller, dev)
Should be a inline function for better type safety.
Sounds good. Will change the to_spmi_*() macros.
I was under the impression
On 10/29/2013 04:56 PM, Josh Cartwright wrote:
+{
+ int dummy;
+
+ if (!ctrl)
+ return -EINVAL;
+
+ dummy = device_for_each_child(ctrl-dev, NULL,
+ spmi_ctrl_remove_device);
+ device_unregister(ctrl-dev);
Should be device_del().
On 10/28, Josh Cartwright wrote:
diff --git a/drivers/rtc/rtc-pm8xxx.c b/drivers/rtc/rtc-pm8xxx.c
index 03f8f75..a9044d4 100644
--- a/drivers/rtc/rtc-pm8xxx.c
+++ b/drivers/rtc/rtc-pm8xxx.c
@@ -1,4 +1,5 @@
/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ * Copyright
On Tue, Oct 29, 2013 at 01:09:27PM -0700, Stephen Boyd wrote:
On 10/28, Josh Cartwright wrote:
diff --git a/drivers/rtc/rtc-pm8xxx.c b/drivers/rtc/rtc-pm8xxx.c
index 03f8f75..a9044d4 100644
--- a/drivers/rtc/rtc-pm8xxx.c
+++ b/drivers/rtc/rtc-pm8xxx.c
@@ -1,4 +1,5 @@
/* Copyright (c)
On 10/29/13 13:15, Greg Kroah-Hartman wrote:
On Tue, Oct 29, 2013 at 01:09:27PM -0700, Stephen Boyd wrote:
On 10/28, Josh Cartwright wrote:
diff --git a/drivers/rtc/rtc-pm8xxx.c b/drivers/rtc/rtc-pm8xxx.c
index 03f8f75..a9044d4 100644
--- a/drivers/rtc/rtc-pm8xxx.c
+++
On Tue, Oct 29, 2013 at 11:00 AM, Stephen Boyd sb...@codeaurora.org wrote:
On 10/29/13 01:21, Kumar Gala wrote:
On Oct 28, 2013, at 7:31 PM, Stephen Boyd wrote:
The Krait L1/L2 error reporting device is made up of two
interrupts, one per-CPU interrupt for the L1 caches and one
interrupt for
On Tue, Oct 29, 2013 at 01:20:13PM -0700, Stephen Boyd wrote:
On 10/29/13 13:15, Greg Kroah-Hartman wrote:
On Tue, Oct 29, 2013 at 01:09:27PM -0700, Stephen Boyd wrote:
On 10/28, Josh Cartwright wrote:
diff --git a/drivers/rtc/rtc-pm8xxx.c b/drivers/rtc/rtc-pm8xxx.c
index 03f8f75..a9044d4
On Mon, Oct 28, 2013 at 05:31:25PM -0700, Stephen Boyd wrote:
We only setup a workqueue for edac devices that use the polling
method. We still try to cancel the workqueue if an edac_device
uses the irq method though. This causes a warning from debug
objects when we remove an edac device:
On 10/29/13 13:48, Borislav Petkov wrote:
On Mon, Oct 28, 2013 at 05:31:25PM -0700, Stephen Boyd wrote:
We only setup a workqueue for edac devices that use the polling
method. We still try to cancel the workqueue if an edac_device
uses the irq method though. This causes a warning from debug
Why wouldn't you just update it to use the device tree ? There are lots
of phones our there using 7x30 ..
This is one that Qualcomm specifically upstreamed, so what was the point
of upstreaming it ?
On Mon, Oct 28, 2013 at 01:43:25PM -0700, David Brown wrote:
The MSM7x30 SoC support was
Isn't this the Nexus one platform ? Same as the last one , why don't you
just update it to use the device tree? This doesn't seem like it would
be all that difficult.
On Mon, Oct 28, 2013 at 01:43:26PM -0700, David Brown wrote:
The MSM8x50 SoC support was added in 2010 based on code from
On 10/29, Stephen Boyd wrote:
On 10/29/13 01:21, Kumar Gala wrote:
On Oct 28, 2013, at 7:31 PM, Stephen Boyd wrote:
The Krait L1/L2 error reporting device is made up of two
interrupts, one per-CPU interrupt for the L1 caches and one
interrupt for the L2 cache.
Cc:
On Mon, Oct 28, 2013 at 01:12:35PM -0500, Josh Cartwright wrote:
From: Kenneth Heitke khei...@codeaurora.org
System Power Management Interface (SPMI) is a specification
developed by the MIPI (Mobile Industry Process Interface) Alliance
optimized for the real time control of Power Management
On Tue, Oct 29, 2013 at 05:06:45AM +, Stephen Boyd wrote:
On 10/28, Mark Rutland wrote:
On Tue, Oct 29, 2013 at 12:31:28AM +, Stephen Boyd wrote:
+
+Optional properties:
+- interrupt-names: Should contain the interrupt names l1_irq and
+ l2_irq
As with my comment on
On Tue, Oct 29, 2013 at 06:00:59PM +, Stephen Boyd wrote:
On 10/29/13 01:21, Kumar Gala wrote:
On Oct 28, 2013, at 7:31 PM, Stephen Boyd wrote:
The Krait L1/L2 error reporting device is made up of two
interrupts, one per-CPU interrupt for the L1 caches and one
interrupt for the L2
On Fri, Oct 18, 2013 at 11:39:28AM -0700, Stephen Boyd wrote:
On 10/15/13 07:11, Stanimir Varbanov wrote:
This adds a driver for hardware random number generator present
on Qualcomm MSM SoC's.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
Reviewed-by: Stephen Boyd
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