Re: [PATCH v4 0/3] usb: chipidea: msm: Clean and fix glue layer driver

2014-04-29 Thread Ivan T. Ivanov
On Tue, 2014-04-29 at 08:45 +0800, Peter Chen wrote: Applied, thanks Thank you, Ivan -- To unsubscribe from this list: send the line unsubscribe linux-arm-msm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

[PATCH v1 00/11] Add Qualcomm SD Card Controller support.

2014-04-29 Thread srinivas . kandagatla
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org Hi Russell, This patch series adds Qualcomm SD Card Controller support in pl180 mmci driver. QCom SDCC is basically a pl180, but bit more customized, some of the register layouts and offsets are different to the ones mentioned in pl180

[PATCH v1 02/11] mmc: mmci: Add Qualcomm Id to amba id table

2014-04-29 Thread srinivas . kandagatla
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org This patch adds a fake Qualcomm ID 0x00051180 to the amba_ids, as Qualcomm SDCC controller is pl180, but amba id registers read 0x0's. The plan is to remove SDCC driver totally and use mmci as the main SD controller driver for Qualcomm

[PATCH v1 01/11] ARM: amba: Add Qualcomm vendor ID.

2014-04-29 Thread srinivas . kandagatla
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org This patch adds Qualcomm amba vendor Id to the list. This ID is used in mmci driver. Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org --- include/linux/amba/bus.h |1 + 1 file changed, 1 insertion(+) diff --git

[PATCH v1 06/11] mmc: mmci: Qcomm: Add 3 clock cycle delay after register write

2014-04-29 Thread srinivas . kandagatla
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org Most of the Qcomm SD card controller registers must be updated to the MCLK domain so subsequent writes to registers will be ignored until 3 clock cycles have passed. This patch adds a 3 clock cycle delay required after writing to

[PATCH v1 11/11] mmc: mmci: Add Qcom specific pio_read function.

2014-04-29 Thread srinivas . kandagatla
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org MCIFIFOCNT register behaviour on Qcom chips is very different than the other pl180 integrations. MCIFIFOCNT register contains the number of words that are still waiting to be transferred through the FIFO. It keeps decrementing once the host

[PATCH v1 10/11] mmc: mmci: Add Qcom variations to MCICommand register.

2014-04-29 Thread srinivas . kandagatla
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org Some bits which control Command Path State Machine (CPSM) are new in Qcom integration, so this patch adds support to those bits. Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org --- drivers/mmc/host/mmci.c |4

[PATCH v1 08/11] mmc: mmci: Qcom fix MCICLK register settings.

2014-04-29 Thread srinivas . kandagatla
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org MCICLK register layout is bit different to the standard pl180 register layout. Qcom SDCC controller some setup in MCICLK register to get it going. So this patch adds new setup and makes it specific to Qcom hw designer. Signed-off-by:

[PATCH v1 07/11] mmc: mmci: move ST specific register extensions access under condition.

2014-04-29 Thread srinivas . kandagatla
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org This patch moves some of the ST specific register extensions access under condition, so that other SOCs like Qualcomm or ARM would not a side effect of writing to those reserved/different purpose bits. Signed-off-by: Srinivas Kandagatla

[PATCH v1 05/11] mmc: mmci: use NSEC_PER_SEC macro

2014-04-29 Thread srinivas . kandagatla
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org This patch replaces a constant used in calculating timeout with a proper macro. This is make code more readable. Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org --- drivers/mmc/host/mmci.c |2 +- 1 file changed, 1

[PATCH v1 04/11] mmc: mmci: Add register read/write wrappers.

2014-04-29 Thread srinivas . kandagatla
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org This patch adds wrappers for readl/writel functions used in the driver. The reason for this wrappers is to accommodate SOCs like Qualcomm which has requirement for delaying the write for few cycles when writing to its SD Card Controller

[PATCH v1 03/11] mmc: mmci: Add Qcom datactrl register variant

2014-04-29 Thread srinivas . kandagatla
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl register. Bit postion datactrl[16:4] hold the true block size instead of power of 2. Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org ---

Re: [PATCH v6 3/5] devicetree: bindings: Document Krait cache error interrupts

2014-04-29 Thread Lorenzo Pieralisi
On Tue, Apr 08, 2014 at 04:39:25PM +0100, Borislav Petkov wrote: On Fri, Apr 04, 2014 at 12:57:28PM -0700, Stephen Boyd wrote: The Krait L1/L2 error reporting hardware is made up a per-CPU interrupt for the L1 cache and a SPI interrupt for the L2. Cc: Lorenzo Pieralisi

Re: [RFC PATCH v2 4/9] crypto: qce: Add ablkcipher algorithms

2014-04-29 Thread Stanimir Varbanov
Thanks for the review! On 04/28/2014 11:00 AM, Herbert Xu wrote: On Mon, Apr 14, 2014 at 03:48:40PM +0300, Stanimir Varbanov wrote: +if (IS_AES(flags)) { +switch (keylen) { +case AES_KEYSIZE_128: +case AES_KEYSIZE_256: +break; +

Re: [RFC PATCH v2 1/9] crypto: qce: Add core driver implementation

2014-04-29 Thread Stanimir Varbanov
Thanks for the review! On 04/28/2014 11:50 AM, Herbert Xu wrote: On Mon, Apr 14, 2014 at 03:48:37PM +0300, Stanimir Varbanov wrote: +if (backlog) +backlog-complete(backlog, -EINPROGRESS); The completion function needs to be called with BH disabled. Cheers, This is new

Re: [RFC PATCH v2 1/9] crypto: qce: Add core driver implementation

2014-04-29 Thread Herbert Xu
On Tue, Apr 29, 2014 at 05:38:14PM +0300, Stanimir Varbanov wrote: This is new for me because I saw similar code in cryptd.c where in cryptd_queue_worker() (workqueue context) the backlog-complete() is called outside of local_bh_disable(). That's what I thought :) If you dig deeper you'll