Hi Lina,
On Wednesday 24 September 2014 05:21 AM, Lina Iyer wrote:
Add SPM device bindings for QCOM 8974 based cpus. SPM is the sub-system
power manager and controls the logic around the cores (cpu and L2).
Each core has an instance of SPM and controls only that core. Each cpu
SPM is
On Tue, 23 Sep 2014, Bjorn Andersson wrote:
On Tue 23 Sep 01:17 PDT 2014, Srinivas Kandagatla wrote:
Hi Bjorn,
Thankyou for the new patchset.
I got few device-tree patches for apq8064 usb, sata, phy and hdmi which
depend on rpm header file. It will be nice to get this
On Tue, 2014-09-23 at 21:18 -0700, Bjorn Andersson wrote:
On Mon 15 Sep 07:44 PDT 2014, Ivan T. Ivanov wrote:
This is the pinctrl, pinmux, pinconf and gpiolib driver for the
Qualcomm GPIO sub-function blocks found in the PMIC chips.
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
I
On Mon, 22 Sep 2014, Bjorn Andersson wrote:
Add binding for the Qualcomm Resource Power Manager (RPM) found in 8660,
8960 and 8064 based devices. The binding currently describes the rpm
itself and the regulator subnodes.
Signed-off-by: Bjorn Andersson bjorn.anders...@sonymobile.com
---
On Mon, 22 Sep 2014, Bjorn Andersson wrote:
Driver for the Resource Power Manager (RPM) found in Qualcomm 8660, 8960
and 8064 based devices. The driver exposes resources that child drivers
can operate on; to implementing regulator, clock and bus frequency
drivers.
Signed-off-by: Bjorn
On Mon, Sep 22, 2014 at 04:25:29PM -0700, Bjorn Andersson wrote:
Driver for regulators exposed by the Resource Power Manager (RPM) found
in Qualcomm 8660, 8960 and 8064 based devices.
Applied, thanks.
signature.asc
Description: Digital signature
On Fri, 01 Aug 2014, Stanimir Varbanov wrote:
From: Josh Cartwright jo...@codeaurora.org
The Qualcomm SPMI PMIC chips are components used with the
Snapdragon 800 series SoC family. This driver exists
largely as a glue mfd component, it exists to be an owner
of an SPMI regmap for children
On Mon, 04 Aug 2014, Stanimir Varbanov wrote:
Kumar, Stephen, David can I have your Acked/Reviewed-by tag for 2/3 and
if possible for 3/3. The last patch can wait because currently we don't
have child peripherals. Thanks.
No one seems to have an opinion, negative or otherwise.
Applied,
On Wed, Sep 24, 2014 at 11:44:44AM +0100, Arnd Bergmann wrote:
On Tuesday 23 September 2014 18:04:37 Josh Cartwright wrote:
+- clocks : shall contain the input clock phandle
Just nitpicking, but this is not just a phandle, it's a clock
descriptor, which is a phandle followed by a set of
There is no need to init .owner field.
Based on the patch from Peter Griffin peter.grif...@linaro.org
mmc: remove .owner field for drivers using module_platform_driver
This patch removes the superflous .owner field for drivers which
use the module_platform_driver API, as this is overriden in
Changes since v2:
- fixes per comments from Hartmut Knaack and Jonathan Cameron.
- now register through IIO core only ADC channels described in DT.
- register TEMP_DIE channel as IIO_TEMP type and as processed return value.
- implement INFO_RAW and INFO_SCALE masks support in order to avoid
The voltage ADC is peripheral of Qualcomm SPMI PMIC chips. It has
15bits resolution and register space inside PMIC accessible across
SPMI bus.
The vadc driver registers itself through IIO interface.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
Signed-off-by: Ivan T. Ivanov
Document DT binding for Qualcomm SPMI PMIC voltage ADC
driver.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
.../devicetree/bindings/iio/adc/qcom,spmi-vadc.txt | 130
1 files changed, 130 insertions(+), 0
On Tue, 2014-09-23 at 21:18 -0700, Bjorn Andersson wrote:
On Mon 15 Sep 07:44 PDT 2014, Ivan T. Ivanov wrote:
snip
+static int pmic_gpio_of_xlate(struct gpio_chip *chip,
+ const struct of_phandle_args *gpio_desc,
+ u32 *flags)
+{
On Sep 23, 2014, at 11:27 PM, Bjorn Andersson bjorn.anders...@sonymobile.com
wrote:
On Tue 23 Sep 01:17 PDT 2014, Srinivas Kandagatla wrote:
Hi Bjorn,
Thankyou for the new patchset.
I got few device-tree patches for apq8064 usb, sata, phy and hdmi which
depend on rpm header file. It
On Wed, Sep 24 2014 at 00:14 -0600, Pramod Gurav wrote:
Hi Lina,
On Wednesday 24 September 2014 05:21 AM, Lina Iyer wrote:
Add SPM device bindings for QCOM 8974 based cpus. SPM is the sub-system
power manager and controls the logic around the cores (cpu and L2).
Each core has an instance of
On Sep 24, 2014, at 3:35 AM, Mark Brown broo...@kernel.org wrote:
On Mon, Sep 22, 2014 at 04:25:29PM -0700, Bjorn Andersson wrote:
Driver for regulators exposed by the Resource Power Manager (RPM) found
in Qualcomm 8660, 8960 and 8064 based devices.
Applied, thanks.
Mark, can you drop
The current ADC is peripheral of Qualcomm SPMI PMIC chips. It has
16 bits resolution and register space inside PMIC accessible across
SPMI bus.
The driver registers itself through IIO interface.
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
Changes:
- Fix Kconfig dependencies
- Reword
On Sep 24, 2014, at 8:49 AM, Lina Iyer lina.i...@linaro.org wrote:
On Wed, Sep 24 2014 at 00:14 -0600, Pramod Gurav wrote:
Hi Lina,
On Wednesday 24 September 2014 05:21 AM, Lina Iyer wrote:
Add SPM device bindings for QCOM 8974 based cpus. SPM is the sub-system
power manager and controls
On Wed, Sep 24 2014 at 08:03 -0600, Kumar Gala wrote:
On Sep 24, 2014, at 8:49 AM, Lina Iyer lina.i...@linaro.org wrote:
On Wed, Sep 24 2014 at 00:14 -0600, Pramod Gurav wrote:
Hi Lina,
On Wednesday 24 September 2014 05:21 AM, Lina Iyer wrote:
Add SPM device bindings for QCOM 8974 based
On Mon, 2014-09-15 at 11:30 -0400, Eduardo Valentin wrote:
Hey Ivan,
Please give us at least a two weeks time frame before resending your
patches.
Hi Eduardo,
Should I wait for more comments or I can post updated
version of this patch?
Regards,
Ivan
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To unsubscribe from this list: send
This DTS has support for the Sony Xperia Z1 phone (codenamed Honami).
This first version of the DTS supports just a serial console.
changes from v1
- removed qcom,msm-id attribute
- removed mis-capitalized Qualcomm word
- changed dts file name
- added board-specific compatible-string
This patch seies introduces support for power management in the driver as well
as vendor specific initialization - registers, clocks, voltage regulators etc.
It includes also a rework for the init sequence and other PM pre-requisite such
as write protection support, handling well-known LUN,
From: Subhash Jadavani subha...@codeaurora.org
If LLD has added scsi device (by calling scsi_add_device) before scheduling
async scsi_scan_host then scsi_finish_async_scan() will end up calling
scsi_sysfs_add_sdev for scsi device which was already added by LLD.
This patch fixes this issue by
From: Subhash Jadavani subha...@codeaurora.org
Add capability to control the auto bkops during suspend.
If host explicitly enables the auto bkops (background operation) on device
then only device would perform the bkops on its own. If auto bkops is not
enabled explicitly and if the device reaches
From: Sahitya Tummala stumm...@codeaurora.org
The UFS controller clocks can be gated after certain period of
inactivity, which is typically less than runtime suspend timeout.
In addition to clocks the link will also be put into Hibern8 mode
to save more power.
The clock gating can be turned on
From: Sujit Reddy Thumma sthu...@codeaurora.org
Some vendor specific controller versions might need to configure
vendor specific - registers, clocks, voltage regulators etc. to
initialize the host controller UTP layer and Uni-Pro stack.
Provide some common initialization operations that can be
On Wed, Sep 24, 2014 at 02:58:23PM +0100, Ivan T. Ivanov wrote:
The current ADC is peripheral of Qualcomm SPMI PMIC chips. It has
16 bits resolution and register space inside PMIC accessible across
SPMI bus.
The driver registers itself through IIO interface.
Signed-off-by: Ivan T. Ivanov
From: Sahitya Tummala stumm...@codeaurora.org
Add freq-table-hz propery for UFS device to keep track of
min max frequencies supported by UFS clocks.
Signed-off-by: Sahitya Tummala stumm...@codeaurora.org
Signed-off-by: Dolev Raviv dra...@codeaurora.org
diff --git
Sometimes, the device shall report its maximum power and speed
capabilities, but we might not wish to configure it to use those
maximum capabilities.
This change adds support for the vendor specific host driver to
implement power change notify callback.
To enable configuring different power modes
From: Subhash Jadavani subha...@codeaurora.org
UFS device specification requires the UFS devices to support 4 well known
logical units:
REPORT_LUNS (address: 01h)
UFS Device (address: 50h)
RPMB (address: 44h)
BOOT (address: 30h)
UFS device may have standard LUs
From: Subhash Jadavani subha...@codeaurora.org
Some devices may respond with wrong type for well-known logical units.
This patch forces well-known type for devices which doesn't report it
correct.
Signed-off-by: Subhash Jadavani subha...@codeaurora.org
Signed-off-by: Sujit Reddy Thumma
From: Sujit Reddy Thumma sthu...@codeaurora.org
UFS devices are powered by at most three external power supplies -
- VCC - The flash memory core power supply, 2.7V to 3.6V or 1.70V to 1.95V
- VCCQ - The controller and I/O power supply, 1.1V to 1.3V
- VCCQ2 - Secondary controller and/or I/O power
From: Subhash Jadavani subha...@codeaurora.org
This patch adds support for UFS device and UniPro link power management
during runtime/system PM.
Main idea is to define multiple UFS low power levels based on UFS device
and UFS link power states. This would allow any specific platform or pci
From: Sahitya Tummala stumm...@codeaurora.org
The clocks for UFS device will be managed by generic DVFS (Dynamic
Voltage and Frequency Scaling) framework within kernel. This devfreq
framework works with different governors to scale the clocks. By default,
UFS devices uses simple_ondemand governor
From: Yaniv Gardi yga...@codeaurora.org
The maximum power consumption in active is determined by bActiveICCLevel.
The configuration is done by reading max current supported by the
regulators connected to VCC, VCCQ and VCCQ2 rails on the boards, and
reading the current consumption levels from the
- Adding some of the definitions missing in unipro.h, including power
enumeration.
- Read Modify Write Line helper function
- Indication for the type of suspend
Signed-off-by: Dolev Raviv dra...@codeaurora.org
Signed-off-by: Subhash Jadavani subha...@codeaurora.org
Signed-off-by: Yaniv Gardi
From: Sujit Reddy Thumma sthu...@codeaurora.org
Add generic clock initialization support for UFSHCD platform
driver. The clock info is read from device tree using standard
clock bindings. A generic max-clock-frequency-hz property is
defined to save information on maximum operating clock frequency
Srinivas Kandagatla srinivas.kandaga...@linaro.org writes:
since commit 31964ffebbb9 (tty: serial: msm: Remove direct access to GSBI)'
serial hangs if earlyprintk are enabled.
This hang is noticed only when the GSBI driver is probed and all the
earlyprintks before gsbi probe are seen on the
On 24/09/14 16:22, Kevin Hilman wrote:
Srinivas Kandagatla srinivas.kandaga...@linaro.org writes:
since commit 31964ffebbb9 (tty: serial: msm: Remove direct access to GSBI)'
serial hangs if earlyprintk are enabled.
This hang is noticed only when the GSBI driver is probed and all the
On Wed, Sep 24, 2014 at 08:50:38AM -0500, Kumar Gala wrote:
Fix your mailer to word wrap within paragraphs please.
Mark, can you drop this until we see at least an RFC patch for the RPM
support for b-family SoCs (8074, 8084, etc) chips. The regulator
could should either be the same or highly
On Wed 24 Sep 01:22 PDT 2014, Lee Jones wrote:
On Mon, 22 Sep 2014, Bjorn Andersson wrote:
Add binding for the Qualcomm Resource Power Manager (RPM) found in 8660,
8960 and 8064 based devices. The binding currently describes the rpm
itself and the regulator subnodes.
Signed-off-by:
On Tue, Sep 23, 2014 at 06:04:36PM -0500, Josh Cartwright wrote:
Add a driver for the watchdog timer block found in the Krait Processor
Subsystem (KPSS) on the MSM8960, APQ8064, and IPQ8064.
Signed-off-by: Josh Cartwright jo...@codeaurora.org
Hi Josh,
looks much better. Couple of comments
On Wed, 2014-09-24 at 15:55 +0100, Mark Rutland wrote:
On Wed, Sep 24, 2014 at 02:58:23PM +0100, Ivan T. Ivanov wrote:
The current ADC is peripheral of Qualcomm SPMI PMIC chips. It has
16 bits resolution and register space inside PMIC accessible across
SPMI bus.
The driver registers
On Wed, Sep 24, 2014 at 06:13:57PM +0300, Dolev Raviv wrote:
From: Subhash Jadavani subha...@codeaurora.org
Some devices may respond with wrong type for well-known logical units.
This patch forces well-known type for devices which doesn't report it
correct.
This looks fine to me, as the
On Wed, Sep 24, 2014 at 06:13:58PM +0300, Dolev Raviv wrote:
From: Subhash Jadavani subha...@codeaurora.org
If LLD has added scsi device (by calling scsi_add_device) before scheduling
async scsi_scan_host then scsi_finish_async_scan() will end up calling
scsi_sysfs_add_sdev for scsi device
On Wed, 24 Sep 2014, Bjorn Andersson wrote:
On Wed 24 Sep 01:22 PDT 2014, Lee Jones wrote:
On Mon, 22 Sep 2014, Bjorn Andersson wrote:
Add binding for the Qualcomm Resource Power Manager (RPM) found in 8660,
8960 and 8064 based devices. The binding currently describes the rpm
/**
+ * ufshcd_set_queue_depth - set lun queue depth
+ * @sdev: pointer to SCSI device
+ *
+ * Read bLUQueueDepth value and activate scsi tagged command
+ * queueing. For WLUN, queue depth is set to 1. For best-effort
+ * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
+ *
If LLD has added scsi device (by calling scsi_add_device) before
scheduling async scsi_scan_host then scsi_finish_async_scan() will end
up calling scsi_sysfs_add_sdev for scsi device which was already added by
LLD.
This patch fixes this issue by adding a check at the start of
On Sep 23, 2014, at 6:51 PM, Lina Iyer lina.i...@linaro.org wrote:
Based on work by many authors, available at codeaurora.org
SPM is a hardware block that controls the peripheral logic surrounding
the application cores (cpu/l$). When the core executes WFI instruction,
the SPM takes over
Comments inline:
-Original Message-
From: Christoph Hellwig [mailto:h...@infradead.org]
Sent: Wednesday, September 24, 2014 9:25 AM
To: Dolev Raviv
Cc: james.bottom...@hansenpartnership.com; h...@infradead.org;
linux-s...@vger.kernel.org; linux-scsi-ow...@vger.kernel.org;
On Sep 22, 2014, at 6:25 PM, Bjorn Andersson bjorn.anders...@sonymobile.com
wrote:
Add binding for the Qualcomm Resource Power Manager (RPM) found in 8660,
8960 and 8064 based devices. The binding currently describes the rpm
itself and the regulator subnodes.
Signed-off-by: Bjorn
On Wed, Sep 24, 2014 at 09:36:37AM -0700, Subhash Jadavani wrote:
Where do you release these references again? It seems like they are never
released on the device removal path.
[Subhash] That's because these are embedded/non-removable UFS devices which
are always present on the board and
On Wed, Sep 24, 2014 at 09:27:47AM -0700, Subhash Jadavani wrote:
No, It happens in this sequence of events:
1. LLD calls the __scsi_add_device() for well known logical units before
scsi_scan_host() (This is done as part of [PATCH V5 10/17] scsi: ufs:
manually add well known logical units).
Just after the call to scsi_remove_host sounds right to me.
scsi_remove_host already removes all regularly scanned devices, but
because __scsi_add_device keeps and additional reference it doesn't free
those that you added manually.
Ok, we are calling scsi_remove_host() as part of ufs driver
On Tue, Sep 23, 2014 at 06:04:38PM -0500, Josh Cartwright wrote:
The WDT's BITE_TIME warm-reset behavior can be leveraged as a last
resort mechanism for triggering chip reset. Usually, other restart
methods (such as PS_HOLD) are preferrable for issuing a more complete
reset of the chip. As
+
+- qcom,rsense:
+Usage: optional
+Value type: u32
+Definition: External sense register value in Ohm. Defining this
+propery will instruct ADC to use external ADC sense
channel.
+If property is not defined ADC will use internal
On 09/24/14 06:49, Lina Iyer wrote:
On Wed, Sep 24 2014 at 00:14 -0600, Pramod Gurav wrote:
Hi Lina,
On Wednesday 24 September 2014 05:21 AM, Lina Iyer wrote:
Add SPM device bindings for QCOM 8974 based cpus. SPM is the sub-system
power manager and controls the logic around the cores (cpu
On Wed, Sep 24 2014 at 10:33 -0600, Kumar Gala wrote:
On Sep 23, 2014, at 6:51 PM, Lina Iyer lina.i...@linaro.org wrote:
Based on work by many authors, available at codeaurora.org
SPM is a hardware block that controls the peripheral logic surrounding
the application cores (cpu/l$). When the
On Wed, Sep 24 2014 at 11:21 -0600, Stephen Boyd wrote:
On 09/24/14 06:49, Lina Iyer wrote:
On Wed, Sep 24 2014 at 00:14 -0600, Pramod Gurav wrote:
Hi Lina,
On Wednesday 24 September 2014 05:21 AM, Lina Iyer wrote:
Add SPM device bindings for QCOM 8974 based cpus. SPM is the sub-system
power
Hey Lina-
A few comments inline:
On Tue, Sep 23, 2014 at 05:51:17PM -0600, Lina Iyer wrote:
+++ b/drivers/soc/qcom/spm.c
[..]
+
+static u32 reg_offsets_saw2_v2_1[MSM_SPM_REG_NR] = {
const?
+ [MSM_SPM_REG_SAW2_SECURE] = 0x00,
+ [MSM_SPM_REG_SAW2_ID]
On Sep 24, 2014, at 12:21 PM, Lina Iyer lina.i...@linaro.org wrote:
On Wed, Sep 24 2014 at 10:33 -0600, Kumar Gala wrote:
On Sep 23, 2014, at 6:51 PM, Lina Iyer lina.i...@linaro.org wrote:
Based on work by many authors, available at codeaurora.org
SPM is a hardware block that controls
On Sep 23, 2014, at 6:51 PM, Lina Iyer lina.i...@linaro.org wrote:
Based on work by many authors, available at codeaurora.org
SPM is a hardware block that controls the peripheral logic surrounding
the application cores (cpu/l$). When the core executes WFI instruction,
the SPM takes over
Move to just using the SoC name in the compatible list so we don't need
to update this for every board going forward. Also added qcom,msm8974
to the list as we support qcom,apq8074 already (the modemless version
of qcom,msm8974).
Signed-off-by: Kumar Gala ga...@codeaurora.org
---
On Sep 24, 2014, at 10:12 AM, Tim Bird tim.b...@sonymobile.com wrote:
This DTS has support for the Sony Xperia Z1 phone (codenamed Honami).
This first version of the DTS supports just a serial console.
changes from v1
- removed qcom,msm-id attribute
- removed mis-capitalized Qualcomm word
Hello Ivan,
On Wed, Sep 24, 2014 at 05:56:10PM +0300, Ivan T. Ivanov wrote:
On Mon, 2014-09-15 at 11:30 -0400, Eduardo Valentin wrote:
Hey Ivan,
Please give us at least a two weeks time frame before resending your
patches.
Hi Eduardo,
Should I wait for more comments or I can post
On 09/24/14 11:20, Kumar Gala wrote:
Move to just using the SoC name in the compatible list so we don't need
to update this for every board going forward. Also added qcom,msm8974
to the list as we support qcom,apq8074 already (the modemless version
of qcom,msm8974).
Signed-off-by: Kumar
On Wed, Sep 24, 2014 at 08:58:54AM -0700, Guenter Roeck wrote:
On Tue, Sep 23, 2014 at 06:04:36PM -0500, Josh Cartwright wrote:
Add a driver for the watchdog timer block found in the Krait Processor
Subsystem (KPSS) on the MSM8960, APQ8064, and IPQ8064.
Signed-off-by: Josh Cartwright
On Wed, Sep 24 2014 at 12:07 -0600, Kumar Gala wrote:
On Sep 23, 2014, at 6:51 PM, Lina Iyer lina.i...@linaro.org wrote:
Based on work by many authors, available at codeaurora.org
SPM is a hardware block that controls the peripheral logic surrounding
the application cores (cpu/l$). When the
On Wed, Sep 24 2014 at 11:49 -0600, Josh Cartwright wrote:
Hey Lina-
A few comments inline:
On Tue, Sep 23, 2014 at 05:51:17PM -0600, Lina Iyer wrote:
+++ b/drivers/soc/qcom/spm.c
[..]
+
+static u32 reg_offsets_saw2_v2_1[MSM_SPM_REG_NR] = {
const?
sure
+ [MSM_SPM_REG_SAW2_SECURE]
On Sep 24, 2014, at 1:34 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 09/24/14 11:20, Kumar Gala wrote:
Move to just using the SoC name in the compatible list so we don't need
to update this for every board going forward. Also added qcom,msm8974
to the list as we support qcom,apq8074
On Wed, Sep 24 2014 at 11:53 -0600, Kumar Gala wrote:
On Sep 24, 2014, at 12:21 PM, Lina Iyer lina.i...@linaro.org wrote:
On Wed, Sep 24 2014 at 10:33 -0600, Kumar Gala wrote:
On Sep 23, 2014, at 6:51 PM, Lina Iyer lina.i...@linaro.org wrote:
Based on work by many authors, available at
On Wed, 2014-09-24 at 14:24 -0400, Eduardo Valentin wrote:
Hello Ivan,
On Wed, Sep 24, 2014 at 05:56:10PM +0300, Ivan T. Ivanov wrote:
On Mon, 2014-09-15 at 11:30 -0400, Eduardo Valentin wrote:
Hey Ivan,
Please give us at least a two weeks time frame before resending your
From: Christoph Hellwig [mailto:h...@infradead.org]
...
On Wed, Sep 24, 2014 at 06:13:57PM +0300, Dolev Raviv wrote:
From: Subhash Jadavani subha...@codeaurora.org
Some devices may respond with wrong type for well-known logical units.
This patch forces well-known type for devices which
On Wednesday, September 24, 2014 11:21 AM, Kumar Gala [ga...@codeaurora.org]
wrote:
On Sep 24, 2014, at 10:12 AM, Tim Bird tim.b...@sonymobile.com wrote:
This DTS has support for the Sony Xperia Z1 phone (codenamed Honami).
This first version of the DTS supports just a serial console.
On 09/24/14 10:23, Lina Iyer wrote:
On Wed, Sep 24 2014 at 11:21 -0600, Stephen Boyd wrote:
On 09/24/14 06:49, Lina Iyer wrote:
On Wed, Sep 24 2014 at 00:14 -0600, Pramod Gurav wrote:
Hi Lina,
On Wednesday 24 September 2014 05:21 AM, Lina Iyer wrote:
Add SPM device bindings for QCOM 8974
2014-09-25 0:14 GMT+09:00 Dolev Raviv dra...@codeaurora.org:
+int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
{
- struct uic_command uic_cmd = {0};
- struct completion pwr_done;
+ struct completion uic_async_done;
unsigned long flags;
Hi Tim,
Tim Bird tim.b...@sonymobile.com writes:
This DTS has support for the Sony Xperia Z1 phone (codenamed Honami).
This first version of the DTS supports just a serial console.
changes from v1
- removed qcom,msm-id attribute
- removed mis-capitalized Qualcomm word
- changed dts
Ok. Can you move the is_visible check to scsi_sysfs_add_devices, should
be fine to place it just after the sdev_state check.
Sure, will move it in next patch.
-Original Message-
From: 'Christoph Hellwig' [mailto:h...@infradead.org]
Sent: Wednesday, September 24, 2014 9:38 AM
To:
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