-Original Message-
From: linux-scsi-ow...@vger.kernel.org
[mailto:linux-scsi-ow...@vger.kernel.org] On Behalf Of Dolev Raviv
Sent: Thursday, August 14, 2014 9:31 PM
To: james.bottom...@hansenpartnership.com; h...@infradead.org
Cc: linux-s...@vger.kernel.org;
Hi Bjorn,
Two things which I noticed while trying out this driver to drive a reset
line.
1 gpio numbering for pinconf vs gpio are not consistent, they differ by
an offset of 1.
For example to control GPIO43 I had to do something like this in pinconf:
wlan_default_gpios: wlan-gpios {
Hi Hugh,
+ unsigned long enable;
+ int err;
+
+ err = kstrtoul(buf, 10,enable);
+ if (err 0)
+ return err;
+ if (enable= 1)
+ return -EINVAL;
I haven't studied the patch itself, I'm still worrying about the concept.
But this caught my eye just before hitting Send: I don't think we need
a
This patch adds pinmux and i2c pinctrl DT node for IFC6410 board.
It also adds necessary DT support for i2c eeprom which is present on
IFC6410.
Tested on IFC6410 board.
Signed-off-by: Kiran Padwal kiran.pad...@smartplayin.com
---
Chages since v1:
- Renamed pinmux phandle qcom_pinmux to
schedule_timeout wakes up the CPU from IDLE state. For some use cases it
is not desirable, hence introduce a convenient API
(schedule_timeout_deferrable_interruptible) on similar pattern which uses
a deferrable timer.
Signed-off-by: Chintan Pandya cpan...@codeaurora.org
Cc: Thomas Gleixner
KSM thread to scan pages is scheduled on definite timeout. That wakes up
CPU from idle state and hence may affect the power consumption. Provide
an optional support to use deferrable timer which suites low-power
use-cases.
Typically, on our setup we observed, 10% less power consumption with some
Christoph == Christoph Hellwig h...@infradead.org writes:
Christoph This looks reasonable to me.
I agree.
Reviewed-by: Martin K. Petersen martin.peter...@oracle.com
--
Martin K. Petersen Oracle Linux Engineering
--
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On Tue, Aug 19, 2014 at 10:52:46PM +0200, Laurent Pinchart wrote:
On Tuesday 19 August 2014 11:40:24 Olav Haugan wrote:
On 8/19/2014 9:11 AM, Laurent Pinchart wrote:
On Tuesday 19 August 2014 13:59:54 Joerg Roedel wrote:
On Mon, Aug 18, 2014 at 03:47:56PM -0700, Olav Haugan wrote:
If
Hi Konrad,
On Wednesday 20 August 2014 09:02:50 Konrad Rzeszutek Wilk wrote:
On Tue, Aug 19, 2014 at 10:52:46PM +0200, Laurent Pinchart wrote:
On Tuesday 19 August 2014 11:40:24 Olav Haugan wrote:
On 8/19/2014 9:11 AM, Laurent Pinchart wrote:
On Tuesday 19 August 2014 13:59:54 Joerg
Hi,
Am 20.08.2014 14:02, schrieb Kiran Padwal:
This patch adds pinmux and i2c pinctrl DT node for IFC6410 board.
It also adds necessary DT support for i2c eeprom which is present on
IFC6410.
Tested on IFC6410 board.
Signed-off-by: Kiran Padwal kiran.pad...@smartplayin.com
---
Chages
On Tue, Aug 19, 2014 at 09:39:30PM -0700, Bjorn Andersson wrote:
On Tue 19 Aug 10:22 PDT 2014, Georgi Djakov wrote:
This patch adds support for the TLMM (Top-Level Mode Mux) block found
in the APQ8084 platform.
[...]
+
+#define NUM_GPIO_PINGROUPS 143
+
I think this looks good
On Thu, Jul 17, 2014 at 09:16:40PM +0100, Srinivas Kandagatla wrote:
This patch makes the phy reset clk and reset line optional as this clk
is not available on boards like IFC6410 with APQ8064.
phy-reset clk is only used as argument to the mach level callbacks, so
this patch adds condition
On 08/17/14 17:17, Nicolas Pitre wrote:
On Sun, 17 Aug 2014, Russell King - ARM Linux wrote:
I have no problem with changing gic_raise_softirq() to use a different
lock, which gic_migrate_target(), and gic_set_affinity() can also use.
There's no need for horrid locking here, because the only
On 08/17/14 18:54, Jason Cooper wrote:
Stephen, is the out of tree code that triggered this bound for mainline?
It's bound for mainline eventually. We're actively working on enabling
more low power modes and when that happens we'll need this patch. We can
always carry this patch for now if you
Commit 1a6b69b6548c (ARM: gic: add CPU migration support,
2012-04-12) introduced an acquisition of the irq_controller_lock
in gic_raise_softirq() which can lead to a spinlock recursion if
the gic_arch_extn hooks call into the scheduler (via complete()
or wake_up(), etc.). This happens because
On 20.08.14 18:42, Andy Gross wrote:
On Tue, Aug 19, 2014 at 09:39:30PM -0700, Bjorn Andersson wrote:
On Tue 19 Aug 10:22 PDT 2014, Georgi Djakov wrote:
This patch adds support for the TLMM (Top-Level Mode Mux) block found
in the APQ8084 platform.
[...]
+
+#define NUM_GPIO_PINGROUPS 143
On Tue, Aug 19, 2014 at 08:22:14PM +0300, Georgi Djakov wrote:
This patch adds support for the TLMM (Top-Level Mode Mux) block found
in the APQ8084 platform.
Comment in-line
snip
+ PINCTRL_PIN(134, GPIO_134),
+ PINCTRL_PIN(135, GPIO_135),
+ PINCTRL_PIN(136, GPIO_136),
+
On Wed, 20 Aug 2014, Stephen Boyd wrote:
Commit 1a6b69b6548c (ARM: gic: add CPU migration support,
2012-04-12) introduced an acquisition of the irq_controller_lock
in gic_raise_softirq() which can lead to a spinlock recursion if
the gic_arch_extn hooks call into the scheduler (via complete()
On Wed 20 Aug 01:06 PDT 2014, Srinivas Kandagatla wrote:
Hi Bjorn,
Hi Srinivas,
Thanks for the testing. I'm reworking the driver to incorporate yours, Linus'
and Ivans feedback.
Two things which I noticed while trying out this driver to drive a reset
line.
1 gpio numbering for pinconf
On Mon 18 Aug 00:16 PDT 2014, Ivan T. Ivanov wrote:
On Sat, 2014-08-16 at 16:24 +0100, Daniel wrote:
@Ivan: sorry about the double post.
Am 11.08.2014 um 16:40 schrieb Ivan T. Ivanov iiva...@mm-sol.com:
[...]
+#define PMIC_GPIO_PULL_UP_30 1
+#define PMIC_GPIO_PULL_UP_1P5
On Wed, Aug 20, 2014 at 2:28 PM, Bjorn Andersson
bjorn.anders...@sonymobile.com wrote:
On Wed 20 Aug 01:06 PDT 2014, Srinivas Kandagatla wrote:
2 Looking back at v3.4 kernel, for gpio modes, BIT(0) of bank 0 is set
to enable gpio mode. without this bit driver does not work for output pins.
On Mon 11 Aug 08:40 PDT 2014, Ivan T. Ivanov wrote:
[...]
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt
b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt
[...]
+SUBNODES:
[...]
+- function:
+ Usage: required
+ Value type: string
+
On Mon 11 Aug 08:40 PDT 2014, Ivan T. Ivanov wrote:
diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard-pmics-pins.dtsi
b/arch/arm/boot/dts/qcom-apq8074-dragonboard-pmics-pins.dtsi
[...]
+
+pm8941_gpios {
+
+ pinctrl-names = default;
+ pinctrl-0 = pm8941_gpios_default;
+
+
On 08/19/14 20:24, Lina Iyer wrote:
On Tue, Aug 19, 2014 at 07:01:53PM -0700, Stephen Boyd wrote:
On 08/19/14 15:15, Lina Iyer wrote:
SPM is a hardware block that controls the peripheral logic surrounding
the application cores (cpu/l$). When the core executes WFI instruction,
the SPM takes
On 08/20/2014 12:15 AM, Lina Iyer wrote:
Add cpuidle driver interface to allow cpus to go into C-States.
Use the cpuidle DT interfacecommon across ARM architectures to provide
the C-State information to the cpuidle framework.
Signed-off-by: Lina Iyer
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