Hi,
On 07/27/2015 02:29 PM, Laurent Pinchart wrote:
Hi Archit,
(CC'ing Boris Brezillon)
Thank you for the patch.
On Monday 27 July 2015 11:46:57 Archit Taneja wrote:
ADV7511 is represented as an i2c drm slave encoder device. ADV7533, on
the other hand, is going be a normal i2c client device
Hi Andy,
This patchset removes the fixed regulators with real regulators
on IFC6410 and QS600 board.
This patchset is based on qcom/dt branch.
Thanks,
srini
Srinivas Kandagatla (3):
ARM: dts: apq8064: remove temporary fixed regulator for mmc
ARM: dts: ifc6410: add real regulators for sdcc
From: Stephen Boyd sb...@codeaurora.org
There's just one GDSC as part of the msm8974 GCC block.
Signed-off-by: Stephen Boyd sb...@codeaurora.org
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
---
drivers/clk/qcom/Kconfig | 1 +
drivers/clk/qcom/gcc-msm8974.c
Add the GDSC instances that exist as part of apq8084 GCC block
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
---
drivers/clk/qcom/Kconfig | 1 +
drivers/clk/qcom/gcc-apq8084.c | 46
include/dt-bindings/clock/qcom,gcc-apq8084.h
From: Stephane Viau sv...@codeaurora.org
Add the GDSC instances that exist as part of apq8084 MMCC block.
Signed-off-by: Stephane Viau sv...@codeaurora.org
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
---
drivers/clk/qcom/Kconfig | 1 +
With CONFIG_PM disabled, turn the devices clocks on during
driver binding to the device, and turn them off when the
driver is unbound from the device.
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
---
drivers/clk/qcom/gdsc.c | 71 +
1 file
Certain devices can have GDSCs' which support ON as the only state.
They can't be power collapsed to either hit RET or OFF.
The clients drivers for these GDSCs' however would expect the state
of the core to be reset following a GDSC disable and re-enable.
To do this assert/deassert reset lines
Along with the GDSC power switch, there is additional control
to either retain all memory (core and peripheral) within a given
powerdomain or to turn them off while the GDSC is powered down.
Add support for these by modelling a RET state where all
memory is retained and an OFF state where all
The devices within a gdsc power domain, quite often have additional
clocks to be turned on/off along with the power domain itself.
Once the drivers for these devices are converted to use runtime PM,
it would be possible to remove all clock handling from the drivers if
the gdsc driver can handle
On 27/07/15 21:32, Andy Gross wrote:
On Mon, Jul 27, 2015 at 02:50:12PM +0100, Srinivas Kandagatla wrote:
snip
sdcc3: sdcc@1218 {
status = okay;
+ vmmc-supply = pm8921_l6;
GDSCs (Global Distributed Switch Controllers) control switches
that supply power to an on-chip power domain and hence can be
programmed in SW to safely power collapse and restore power to the
respective PDs. They are part of a considerable number of recent QCOM
SoCs (This series adds support for
On 07/23/2015 01:35 AM, Rajendra Nayak wrote:
[]..
+
+#ifndef CONFIG_PM
+static void enable_clock(struct device *dev, const char *con_id)
+{
+struct clk *clk;
+
+clk = clk_get(dev, con_id);
+if (!IS_ERR(clk)) {
+clk_prepare_enable(clk);
+clk_put(clk);
+}
+}
+
Antoine and Rob,
I was just doing some testing with USB on a Qualcomm SoC.
I followed the instructions in the binding document:
Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
which has a compatible for qcom,ci-hdrc, and is, in general,
for chipidea-based USB controllers.
It says in the
On 07/27/2015 09:34 PM, Archit Taneja wrote:
Hi,
On 07/25/2015 06:21 AM, Stephen Boyd wrote:
On 07/21/2015 03:34 AM, Archit Taneja wrote:
+ int size)
+{
+struct desc_info *desc;
+struct dma_async_tx_descriptor *dma_desc;
+struct scatterlist *sgl;
+int r;
+
+
This patch enables MDP support on QS600 platform.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
This patch adds LVDS panel for IFC6410.
Signed-off-by: Rob Clark robdcl...@gmail.com
[Rob Clark: WIP patch]
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 66 ++
1 file changed, 66 insertions(+)
diff
This patch adds real regulators to sdcc nodes.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
This patch adds real regulators for all the three sdcc nodes.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 27 +++
1 file changed, 27 insertions(+)
diff --git
This patch removes temporary fixed regluator use for mmc.
Board files should use the regulators which are wiredup appropriately.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 12
1 file changed, 12 deletions(-)
diff
From: Stephen Boyd sb...@codeaurora.org
GDSCs (Global Distributed Switch Controllers) are responsible for
safely collapsing and restoring power to peripherals in the SoC.
These are best modelled as power domains using genpd and given
the registers are scattered throughout the clock controller
The common clk probe registers a clk provider and a reset controller.
Update it to register a genpd provider using the gdsc data provided
by each platform.
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
---
drivers/clk/qcom/common.c | 15 ++-
drivers/clk/qcom/common.h | 2 ++
2
Add all data for the GDSCs which are part of msm8916 GCC block.
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
---
drivers/clk/qcom/Kconfig | 1 +
drivers/clk/qcom/gcc-msm8916.c | 57
Some gdsc instances require a certain root clock (RCG) to be turned on
*before* the power domain itself can be turned on. Handle this as part
of the gdsc enable/disable callbacks.
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
---
drivers/clk/qcom/gdsc.c | 20 +++-
Archit, Laurent,
On Tue, 28 Jul 2015 13:47:37 +0530
Archit Taneja arch...@codeaurora.org wrote:
Hi,
On 07/27/2015 02:29 PM, Laurent Pinchart wrote:
Hi Archit,
(CC'ing Boris Brezillon)
Thank you for the patch.
On Monday 27 July 2015 11:46:57 Archit Taneja wrote:
ADV7511 is
I was just doing some testing with USB on a Qualcomm SoC.
I followed the instructions in the binding document:
Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
which has a compatible for qcom,ci-hdrc, and is, in general, for
chipidea-based USB controllers.
It says in the
From: Rob Clark robdcl...@gmail.com
This patch adds MDP node to APQ8064 dt.
Signed-off-by: Rob Clark robdcl...@gmail.com
[Srinivas Kandagatla] : updated with new style rpm regulators
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 87
This patch adds heart-beat led support on IFC6410.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
Add pwrseq support to sdcc4 which would enable a proper reset of WLAN
without ugly hacks in the board support file.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 26 ++
1 file changed, 26 insertions(+)
This patch adds pwrseq for WLAN which resets the WLAN just before the
SDIO bus is up.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 24
1 file changed, 24 insertions(+)
diff --git
Hi Andy,
As discussed here are some dt patches which depend on
pmic header dt-bindings/pinctrl/qcom,pmic-gpio.h which is availble in
linux-next.
One more thing we discussed w.r.t MDP patch is that it can use
something like OPPs. Which IMHO can be done at later stage as suggested by Rob.
Having
On Tue, Jul 28, 2015 at 10:12 PM, Peter Chen peter.c...@freescale.com wrote:
I was just doing some testing with USB on a Qualcomm SoC.
I followed the instructions in the binding document:
Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
which has a compatible for qcom,ci-hdrc,
On Tue, Jul 28, 2015 at 01:52:36PM +0100, Srinivas Kandagatla wrote:
Hi Andy,
As discussed here are some dt patches which depend on
pmic header dt-bindings/pinctrl/qcom,pmic-gpio.h which is availble in
linux-next.
Ok. I took all of these and put them on top of my 4.3 tags on the
On 07/29/2015 07:18 AM, Stephen Boyd wrote:
On 07/27/2015 09:34 PM, Archit Taneja wrote:
Hi,
On 07/25/2015 06:21 AM, Stephen Boyd wrote:
On 07/21/2015 03:34 AM, Archit Taneja wrote:
+ int size)
+{Looks like a
+struct desc_info *desc;
+struct dma_async_tx_descriptor
Hi Srini,
On 07/28/2015 06:24 PM, Srinivas Kandagatla wrote:
This patch adds LVDS panel for IFC6410.
Signed-off-by: Rob Clark robdcl...@gmail.com
[Rob Clark: WIP patch]
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 66
On Tue, Jul 28, 2015 at 8:06 PM, Tim Bird tim.b...@sonymobile.com wrote:
Antoine and Rob,
I was just doing some testing with USB on a Qualcomm SoC.
I followed the instructions in the binding document:
Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
which has a compatible for
On 07/29/2015 06:34 AM, Stephen Boyd wrote:
On 07/23/2015 01:35 AM, Rajendra Nayak wrote:
[]..
+
+#ifndef CONFIG_PM
+static void enable_clock(struct device *dev, const char *con_id)
+{
+struct clk *clk;
+
+clk = clk_get(dev, con_id);
+if (!IS_ERR(clk)) {
+
Hi,
Am 28.07.2015 um 14:54 schrieb Srinivas Kandagatla:
From: Rob Clark robdcl...@gmail.com
This patch adds MDP node to APQ8064 dt.
Signed-off-by: Rob Clark robdcl...@gmail.com
[Srinivas Kandagatla] : updated with new style rpm regulators
Signed-off-by: Srinivas Kandagatla
Am 28.07.2015 um 14:54 schrieb Srinivas Kandagatla:
This patch adds LVDS panel for IFC6410.
Signed-off-by: Rob Clark robdcl...@gmail.com
[Rob Clark: WIP patch]
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 66
On Tue, Jul 28, 2015 at 1:50 PM, Andreas Färber afaer...@suse.de wrote:
Am 28.07.2015 um 14:54 schrieb Srinivas Kandagatla:
This patch adds LVDS panel for IFC6410.
Signed-off-by: Rob Clark robdcl...@gmail.com
[Rob Clark: WIP patch]
Signed-off-by: Srinivas Kandagatla
On Tue, Jul 28, 2015 at 09:13:05AM +0100, Srinivas Kandagatla wrote:
This patch adds real regulators to sdcc nodes.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
Applied. Thanks
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of
On Tue, Jul 28, 2015 at 09:12:51AM +0100, Srinivas Kandagatla wrote:
This patch removes temporary fixed regluator use for mmc.
Board files should use the regulators which are wiredup appropriately.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
Applied. Thanks!
--
On 28.07.2015 22:09, Cassidy Burden wrote:
I've tested Yury Norov's find_bit reimplementation with the test_find_bit
module (https://lkml.org/lkml/2015/3/8/141) and measured about 35-40%
performance degradation on arm64 3.18 run with fixed CPU frequency.
The performance degradation appears to
On 29.07.2015 00:23, Yury wrote:
On 28.07.2015 22:09, Cassidy Burden wrote:
I've tested Yury Norov's find_bit reimplementation with the
test_find_bit
module (https://lkml.org/lkml/2015/3/8/141) and measured about 35-40%
performance degradation on arm64 3.18 run with fixed CPU frequency.
The
On Wed, 29 Jul 2015 00:23:18 +0300 Yury yury.no...@gmail.com wrote:
But I think, before/after for x86 is needed as well.
That would be nice.
And why don't you consider '__always_inline__'? Simple inline is only a
hint and
guarantees nothing.
Yup. My x86_64 compiler just ignores the
On Sat, Jul 18 2015 at 05:31 -0600, Ohad Ben-Cohen wrote:
Hi Lina,
On Thu, Jul 2, 2015 at 11:30 PM, Lina Iyer lina.i...@linaro.org wrote:
You are right, RAW capability is not lock specific. But we dont want to
impose this on every lock in the bank either.
I'm not sure I'm following your
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