;b-...@ti.com>
Acked-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-sham.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index 86b89ace836f..07235d0be29c 100644
--- a/drivers/crypto/omap-sham.
Hi Francis,
This has similar checkpatch issues + being split into multipart message
as your other patch.
Also, I think this patch should be split up in two, as there are two
issues you are fixing; the bad pointer issue (which I think you only
fixed partially, also the in->sgl has similar
On 23/03/18 15:50, Tero Kristo wrote:
Hi Francis,
Your email program is still messing up things, the patch was sent as a
multipart message. Use git-send-email tool or something similar if
possible.
Also, there are at least two checkpatch issues (run
scripts/checkpatch.pl -strict
Hi Francis,
Your email program is still messing up things, the patch was sent as a
multipart message. Use git-send-email tool or something similar if possible.
Also, there are at least two checkpatch issues (run
scripts/checkpatch.pl -strict ), in addition to the UTF-8
formatted message
e.
Remove the indentation to fix Smatch warning:
drivers/crypto/omap-sham.c:1761 omap_sham_done_task() warn: inconsistent
indenting
Signed-off-by: Krzysztof Kozlowski <k...@kernel.org>
Acked-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-sham.c | 2 +-
1 fil
fer is capable of DMA.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-crypto.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/crypto/omap-crypto.c b/drivers/crypto/omap-crypto.c
index 23e3777..2c42e4b 100644
--- a/drivers/crypto/omap-crypto.c
+++ b/drive
Crypto driver fallback size can now be configured from userspace. This
allows optimizing the DMA usage based on use case. Default fallback
size of 256 is still used.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-sham.c | 56 +++
Crypto driver fallback size can now be configured from userspace. This
allows optimizing the DMA usage based on use case. Detault fallback
size of 200 is still used.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-aes.c | 48
fer is capable of DMA.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
Reported-by: Aparna Balasubramanian <apar...@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvu...@ti.com>
---
drivers/crypto/omap-sham.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/crypto/omap-sh
Crypto driver queue size can now be configured from userspace. This
allows optimizing the queue usage based on use case. Default queue
size is still 10 entries.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-sham.c | 38 ++
1 file c
Hi,
This series contains a couple of fixes for LPAE data handling (patch #1/#2),
and also a few configuration patches (#3..#6.) Without the fixes,
the driver will see crashes in certain data configs, most notably when
using cryptodev and passing data buffers from userspace. All these
patches can
Crypto driver queue size can now be configured from userspace. This
allows optimizing the queue usage based on use case. Default queue
size is still 10 entries.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-aes.c | 43 +++
com>
[t-kri...@ti.com: forward port to latest upstream kernel, conversion to use
omap-crypto lib and some additional fixes]
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/Kconfig| 1 +
drivers/crypto/Makefile | 3 +-
drivers/crypto/omap-aes
Move over most of the omap-aes driver internal definitions to a separate
header file. This is done so that the same definitions can be used in
the upcoming AES-GCM support code.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-aes.c
These are going to be required by the addition of the GCM support.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-aes.c | 12 ++--
drivers/crypto/omap-aes.h | 7 +++
2 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/crypto/omap-a
Use the SG alignment APIs from the OMAP crypto support library instead
of using own implementations.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-aes.c | 120 +++---
1 file changed, 28 insertions(+), 92 deletions(-)
diff
Convert the driver to use autosuspend for runtime_pm. This boosts the
performance, and optimizes the power consumption for the driver. By
default, the timeout value for autosuspend is set to one second.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-des.c | 10 +++
Use the SG alignment APIs from the OMAP crypto support library instead
of using own implementations. This reduces the amount of copy-paste
code.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-des.c | 112 --
1 file chang
This contains the generic APIs for aligning SG buffers.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/Kconfig | 11 +++
drivers/crypto/Makefile | 1 +
drivers/crypto/omap-crypto.c | 185 +++
drivers/crypto/omap-cr
OMAP DES crypto accelerator itself is unable to detect weak keys, so
add a specific call to the generic des driver to check the key strength
if requested.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-des.c | 16 ++--
1 file changed, 14 insertions
, fix an issue with omap_sham_update
that surfaces with this fix, so that the code checks the bufcnt
instead of total data amount against buffer length to avoid any
buffer overflows.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-sham.c | 22 ++
This was previously missed from the code, causing SDMA to hang in
some cases where the buffer ended up being not aligned.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-sham.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/omap-sh
close the hash properly.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
Reported-by: Aparna Balasubramanian <apar...@ti.com>
---
drivers/crypto/omap-sham.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
i
this by moving the used HW device under reqctx, which is stored
per-request basis.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-aes.c | 35 ++-
1 file changed, 14 insertions(+), 21 deletions(-)
diff --git a/drivers/crypto/omap-aes.c b/drivers/
Hi,
This series has a number of fixes towards 4.13 merge window (I don't
think we need to rush these as nobody has complained of any of the
issues so far), and the addition of AES GCM mode. Lokesh posted
the support patch for GCM quite a while back, I have addressed
the comments received back
This is not used for anything, so drop it.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-aes.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
index fe32dd9..ad6e2b3 100644
--- a/drivers/crypto/omap-aes.c
OMAP HW generally expects data for DMA to be on word boundary, so make the
SHA driver inform crypto framework of the same preference.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-sham.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/d
Hi,
This series converts the omap-sham buffer handling towards a scatterlist
approach. This avoids the need to have a huge internal buffer within the
driver, and also allows us to properly implement export/import for the
driver. I tried splitting up the changes to some sane patches, but this
was
Now that the driver has been converted to use scatterlists for data
handling, add proper implementation for the export/import stubs also.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-sham.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
The current internal buffer size is way too large for crypto core, so
shrink it to be smaller. This makes the buffer to fit into the space
reserved for the export/import buffers also.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-sham.c | 2 +-
1 file changed, 1 ins
is no longer
needed.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-sham.c | 344 ++---
1 file changed, 74 insertions(+), 270 deletions(-)
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index 5c95bf9..412559e
The current usage of sgl will be deprecated, and will be replaced by an
array required by the sg based driver implementation. Rename the existing
variable as sgl_tmp so that it can be removed from the driver easily later.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypt
On 13/09/16 15:38, Herbert Xu wrote:
On Thu, Aug 04, 2016 at 01:28:35PM +0300, Tero Kristo wrote:
Hi,
This revision took quite a bit time to craft due to the rework needed
for sham buffer handling and export/import. I ended up implementing
a flush functionality for draining out the sham buffer
On 01/09/16 10:46, Tero Kristo wrote:
On 01/09/16 10:31, Herbert Xu wrote:
On Thu, Sep 01, 2016 at 10:28:47AM +0300, Tero Kristo wrote:
Yeah, the flush should do the trick now. Kind of a chicken-egg
problem here. :P How do you see the situation with the above
explanation?
The export
On 01/09/16 10:31, Herbert Xu wrote:
On Thu, Sep 01, 2016 at 10:28:47AM +0300, Tero Kristo wrote:
Yeah, the flush should do the trick now. Kind of a chicken-egg
problem here. :P How do you see the situation with the above
explanation?
The export function is not allowed to sleep so you must
On 01/09/16 10:19, Herbert Xu wrote:
On Thu, Sep 01, 2016 at 09:56:06AM +0300, Tero Kristo wrote:
Hmm, looking at the driver, sham_update returns 0 immediately if it
just caches data. In a sense, the update is not completed at this
point. Are you saying this is illegal and can't be done
On 01/09/16 09:16, Herbert Xu wrote:
On Thu, Sep 01, 2016 at 09:12:59AM +0300, Tero Kristo wrote:
Well, but the driver doesn't flush its buffers automatically, it
caches data until it has sufficient amount available. So, assuming
you want to do this:
sham_init
sham_update 256 bytes
On 01/09/16 06:33, Herbert Xu wrote:
On Mon, Aug 29, 2016 at 05:11:35PM +0300, Tero Kristo wrote:
+static int omap_sham_export(struct ahash_request *req, void *out)
+{
+ struct omap_sham_reqctx *rctx = ahash_request_ctx(req);
+
+ while (omap_sham_flush(req) == -EINPROGRESS
On 09/08/16 13:06, Herbert Xu wrote:
On Thu, Aug 04, 2016 at 01:28:38PM +0300, Tero Kristo wrote:
Context export/import are now required for ahash algorithms due to
required support in algif_hash. Implement these for OMAP SHA driver,
saving and restoring the internal state of the driver
If we have processed any data with the hardware accelerator (digcnt > 0),
we must complete the entire hash by using it. This is because the current
hash value can't be imported to the software fallback algorithm. Otherwise
we end up with wrong hash results.
Signed-off-by: Tero Kristo <
com: forward ported to 4.7 kernel]
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-aes.c | 20 ++--
1 file changed, 6 insertions(+), 14 deletions(-)
diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
index f443042..3cf7b8f 100644
--- a/d
-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-sham.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index b4f5131..f9c5fe5 100644
--- a/drivers/crypto/omap-sham.c
+++ b/drivers/crypt
Hi,
This revision took quite a bit time to craft due to the rework needed
for sham buffer handling and export/import. I ended up implementing
a flush functionality for draining out the sham buffer when doing
export/import; just shrinking the buffer to sufficiently small size
impacted the
Some of the call paths of OMAP SHA driver can avoid executing the next
step of the crypto queue under tasklet; instead, execute the next step
directly via function call. This avoids a costly round-trip via the
scheduler giving a slight performance boost.
Signed-off-by: Tero Kristo <t-
com>
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-des.c | 27 +--
1 file changed, 17 insertions(+), 10 deletions(-)
diff --git a/drivers/crypto/omap-des.c b/drivers/crypto/omap-des.c
index 5691434..d0b59f6 100644
--- a/drivers/crypto/omap-des.c
+
This flushes any full blocks of data from the data buffer. Required for
implementing the export/import APIs for the driver, as the flush allows
saving a much smaller context; basically only one block of buffer is
required.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypt
The crypto engine must be initialized before registering algorithms,
otherwise the test manager will crash as it attempts to execute
tests for the algos while they are being registered.
Fixes: f1b77aaca85a ("crypto: omap-des - Integrate with the crypto engine
framework")
Signed-of
not been used for a sufficiently long time period.
By default, the timeout value is 1 second.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-aes.c | 43 ---
1 file changed, 16 insertions(+), 27 deletions(-)
diff --git a/drivers/
Context export/import are now required for ahash algorithms due to
required support in algif_hash. Implement these for OMAP SHA driver,
saving and restoring the internal state of the driver.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-sham.
com: udpated against latest upstream, to use skcipher mainly]
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/Kconfig| 3 +++
drivers/crypto/omap-aes.c | 53 +++
2 files changed, 52 insertions(+), 4 deletions(-)
diff --gi
The crypto engine must be initialized before registering algorithms,
otherwise the test manager will crash as it attempts to execute
tests for the algos while they are being registered.
Fixes: 0529900a01cb ("crypto: omap-aes - Support crypto engine framework")
Signed-off-by: Tero Kri
On 04/07/16 12:19, Herbert Xu wrote:
On Mon, Jul 04, 2016 at 12:17:02PM +0300, Tero Kristo wrote:
I need some clarification on this, afaik request_alloc related
functionality only works per-request basis. The export / import
functionality however is supposed to work across multiple requests
On 27/06/16 08:00, Herbert Xu wrote:
On Mon, Jun 27, 2016 at 07:58:43AM +0300, Tero Kristo wrote:
Ok, I think I need to allocate the storage space locally then within
the driver. Would it be ok to call kmalloc / free in the export /
import implementation of the driver? The size of the unhashed
On 29/06/16 19:11, Bin Liu wrote:
Some software alg has cra_priority as higher as 300, so increase
omap-sham priority to 400 to ensure it is on top of any software alg.
You could mention the case where this is causing issues, namely the
arm-neon-sha implementations which currently have
On 24/06/16 13:30, Herbert Xu wrote:
On Wed, Jun 22, 2016 at 04:23:38PM +0300, Tero Kristo wrote:
Some of the call paths of OMAP SHA driver can avoid executing the next
step of the crypto queue under tasklet; instead, execute the next step
directly via function call. This avoids a costly round
On 24/06/16 13:32, Herbert Xu wrote:
On Wed, Jun 22, 2016 at 04:23:39PM +0300, Tero Kristo wrote:
The statesize is used to determine the maximum size for saved ahash
context. In some cases, this can be much larger than what is currently
allocated for it, for example omap-sham driver uses
From: Lokesh Vutla <lokeshvu...@ti.com>
Hardware random number generator is present in both AM33xx and AM43xx
SoC's. So moving the hwmod data to common data.
Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
Signed-off-by: Tero Kristo <t-kri...@ti.com>
-
com>
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-des.c | 27 +--
1 file changed, 17 insertions(+), 10 deletions(-)
diff --git a/drivers/crypto/omap-des.c b/drivers/crypto/omap-des.c
index 3eedb03..e4c87bc 100644
--- a/drivers/crypto/omap-des.c
+
The crypto engine must be initialized before registering algorithms,
otherwise the test manager will crash as it attempts to execute
tests for the algos while they are being registered.
Fixes: f1b77aaca85a ("crypto: omap-des - Integrate with the crypto engine
framework")
Signed-of
From: Lokesh Vutla <lokeshvu...@ti.com>
As setting up the DMA operations is quite costly, add software fallback
support for requests smaller than 200 bytes. This change gives some 10%
extra performance in ipsec use case.
Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
Signed-off-by:
Crypto engine will now hi-jack the currently running thread for executing
crypto functionality. Only if we are not running a thread (in interrupt
context) the kthread will be scheduled.
This will improve performance of crypto operations using crypto engine.
Signed-off-by: Tero Kristo <t-
From: Joel Fernandes
DRA7xx SoCs have a DES3DES IP. Add DT data for the same.
Signed-off-by: Joel Fernandes
---
arch/arm/boot/dts/dra7.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
The crypto engine must be initialized before registering algorithms,
otherwise the test manager will crash as it attempts to execute
tests for the algos while they are being registered.
Fixes: 0529900a01cb ("crypto: omap-aes - Support crypto engine framework")
Signed-off-by: Tero Kri
The statesize is used to determine the maximum size for saved ahash
context. In some cases, this can be much larger than what is currently
allocated for it, for example omap-sham driver uses a buffer size of
PAGE_SIZE. Increase the statesize to accommodate this.
Signed-off-by: Tero Kristo <t-
Some of the call paths of OMAP SHA driver can avoid executing the next
step of the crypto queue under tasklet; instead, execute the next step
directly via function call. This avoids a costly round-trip via the
scheduler giving a slight performance boost.
Signed-off-by: Tero Kristo <t-
From: Lokesh Vutla
Adding DT node for hardware random number generator.
Signed-off-by: Lokesh Vutla
---
arch/arm/boot/dts/am4372.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/am4372.dtsi
com: forward ported to 4.7 kernel]
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-aes.c | 20 ++--
1 file changed, 6 insertions(+), 14 deletions(-)
diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
index cf53d3f..f710602 100644
--- a/d
From: Lokesh Vutla <lokeshvu...@ti.com>
DRA7 SoC has the same SHA IP as OMAP5. Add DT entry for the same.
Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
[t-kri...@ti.com: changed SHA to use EDMA instead of SDMA]
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/boot/
From: Lokesh Vutla
Add clk node for RNG module.
Signed-off-by: Lokesh Vutla
---
arch/arm/boot/dts/am43xx-clocks.dtsi | 8
drivers/clk/ti/clk-43xx.c| 1 +
2 files changed, 9 insertions(+)
diff --git
support for two AES cores]
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/boot/dts/dra7.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 959f99b..da31a72 100644
--- a/arch/arm/
From: Joel Fernandes <jo...@ti.com>
DRA7 SoC contains DES crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.
Signed-off-by: Joel Fernandes <jo...@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
Signed-off-by:
com>
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach-omap2/clockdomains7xx_data.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/clockdomains7xx_data.c
b/arch/arm/mach-omap2/clockdomains7xx_data.c
index ef9ed36..6c67965 100644
-
From: Lokesh Vutla <lokeshvu...@ti.com>
DRA7 SoC contains SHA crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.
Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
a
IP flag fixes from Lokesh,
squashed the HS chip fix from Daniel Allred]
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 36 +++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_
From: Lokesh Vutla <lokeshvu...@ti.com>
AM43xx SoC contains DES crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.
Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
a
squash in support for both AES1 and AES2 cores]
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 62 +++
1 file changed, 62 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/oma
From: Lokesh Vutla
Adding dt node for hardware random number generator IP.
Signed-off-by: Lokesh Vutla
---
arch/arm/boot/dts/dra7.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
From: Lokesh Vutla
Enable clocks for all cores before starting session.
Driver has to pic the aes core dynamically based on the queue length.
Signed-off-by: Lokesh Vutla
---
drivers/crypto/omap-aes.c | 23 +++
1 file changed, 7
Hi,
Changes compared to v1 of the series:
- dropped first patch from the series (crypto: omap-aes: Fix registration of
algorithms) as it was queued by Herbert already
- modified the second (now first) patch of the series to use runtime auto-
suspend instead of getting static sync over a cra
ri...@ti.com: dropped the extra traces, updated some comments
on the code]
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-sham.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
inde
Context export/import are now required for ahash algorithms due to
required support in algif_hash. Implement these for OMAP SHA driver,
saving and restoring the internal state of the driver.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-sham.
.
Convert the driver to use runtime_pm autosuspend instead, with a default
timeout value of 1 second. This results in upto ~50% speedup.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-sham.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/d
From: Lokesh Vutla <lokeshvu...@ti.com>
The extra call to dmaengine_terminate_all is not needed, as the DMA
is not running at this point. This improves performance slightly.
Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
d
Change crypto queue size from 1 to 10 for omap SHA driver. This should
allow clients to enqueue requests more effectively to avoid serializing
whole crypto sequences, giving extra performance.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
drivers/crypto/omap-sham.c | 2 +-
1 file chan
On 07/06/16 15:24, Grygorii Strashko wrote:
On 06/07/2016 02:52 PM, Tero Kristo wrote:
On 07/06/16 13:08, Herbert Xu wrote:
On Wed, Jun 01, 2016 at 06:03:52PM -0500, Dave Gerlach wrote:
On 06/01/2016 04:53 AM, Grygorii Strashko wrote:
On 06/01/2016 11:56 AM, Tero Kristo wrote:
From: Lokesh
On 10/06/16 14:38, Tony Lindgren wrote:
* Tero Kristo <t-kri...@ti.com> [160601 02:09]:
From: Joel Fernandes <jo...@ti.com>
DRA7xx SoCs have a DES3DES IP. Add DT data for the same.
Are these dts changes safe to apply separately or do they
cause issues like extra warnings during
On 07/06/16 13:48, Herbert Xu wrote:
On Wed, Jun 01, 2016 at 11:56:02AM +0300, Tero Kristo wrote:
From: Lokesh Vutla <lokeshvu...@ti.com>
Algorithms can be registered only once. So skip registration of
algorithms if already registered (i.e. in case we have two AES cores
in the system.)
On 07/06/16 13:08, Herbert Xu wrote:
On Wed, Jun 01, 2016 at 06:03:52PM -0500, Dave Gerlach wrote:
On 06/01/2016 04:53 AM, Grygorii Strashko wrote:
On 06/01/2016 11:56 AM, Tero Kristo wrote:
From: Lokesh Vutla <lokeshvu...@ti.com>
Calling runtime PM API for every block causes seriou
From: Lokesh Vutla
Adding DT node for hardware random number generator.
Signed-off-by: Lokesh Vutla
---
arch/arm/boot/dts/am4372.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/am4372.dtsi
com>
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach-omap2/clockdomains7xx_data.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/clockdomains7xx_data.c
b/arch/arm/mach-omap2/clockdomains7xx_data.c
index ef9ed36..6c67965 100644
-
From: Lokesh Vutla
Adding dt node for hardware random number generator IP.
Signed-off-by: Lokesh Vutla
---
arch/arm/boot/dts/dra7.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
From: Lokesh Vutla
Add clk node for RNG module.
Signed-off-by: Lokesh Vutla
---
arch/arm/boot/dts/am43xx-clocks.dtsi | 8
drivers/clk/ti/clk-43xx.c| 1 +
2 files changed, 9 insertions(+)
diff --git
support for two AES cores]
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/boot/dts/dra7.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 959f99b..da31a72 100644
--- a/arch/arm/
From: Lokesh Vutla <lokeshvu...@ti.com>
DRA7 SoC has the same SHA IP as OMAP5. Add DT entry for the same.
Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
[t-kri...@ti.com: changed SHA to use EDMA instead of SDMA]
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/boot/
From: Lokesh Vutla <lokeshvu...@ti.com>
Hardware random number generator is present in both AM33xx and AM43xx
SoC's. So moving the hwmod data to common data.
Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
Signed-off-by: Tero Kristo <t-kri...@ti.com>
-
From: Joel Fernandes
DRA7xx SoCs have a DES3DES IP. Add DT data for the same.
Signed-off-by: Joel Fernandes
---
arch/arm/boot/dts/dra7.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
IP flag fixes from Lokesh,
squashed the HS chip fix from Daniel Allred]
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 36 +++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_
From: Lokesh Vutla <lokeshvu...@ti.com>
DRA7 SoC contains SHA crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.
Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
a
squash in support for both AES1 and AES2 cores]
Signed-off-by: Tero Kristo <t-kri...@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 62 +++
1 file changed, 62 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/oma
From: Joel Fernandes <jo...@ti.com>
DRA7 SoC contains DES crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.
Signed-off-by: Joel Fernandes <jo...@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
Signed-off-by:
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