The cipher implementations of the kernel crypto API favor in-place
cipher operations. Thus, switch the CTR cipher operation in the DRBG to
perform in-place operations. This is implemented by using the output
buffer as input buffer and zeroizing it before the cipher operation to
implement a CTR
On Fri, 20 Jul 2018 10:30:10 -0600
Rob Herring wrote:
> On Mon, Jul 16, 2018 at 11:43:40AM +0100, Jonathan Cameron wrote:
> > The hip06 and hip07 SoCs contain a number of these crypto units which
> > accelerate AES and DES operations.
> >
> > Signed-off-by: Jonathan Cameron
> > ---
> >
On Mon, Jul 16, 2018 at 11:43:40AM +0100, Jonathan Cameron wrote:
> The hip06 and hip07 SoCs contain a number of these crypto units which
> accelerate AES and DES operations.
>
> Signed-off-by: Jonathan Cameron
> ---
> .../bindings/crypto/hisilicon,hip07-sec.txt| 69
>
On Wed, Jul 11, 2018 at 08:35:49PM +0200, Stephan Müller wrote:
> By adding a zero byte-length for the DH parameter Q value, the public
> key verification test is disabled for the given test.
>
> Reported-by: Eric Biggers
> Signed-off-by: Stephan Mueller
Patch applied. Thanks.
--
Email:
On Sun, Jul 15, 2018 at 12:27:06AM +0200, Michael Müller wrote:
> This patch fixes two typos related to unregistering algorithms supported by
> SAHARAH 3. In sahara_register_algs the wrong algorithms are unregistered
> in case of an error. In sahara_unregister_algs the wrong array is used to
>
On Wed, Jul 11, 2018 at 08:36:23PM +0200, Stephan Müller wrote:
> Fix the b value to be compliant with FIPS 186-4 D.1.2.1. This fix is
> required to make sure the SP800-56A public key test passes for P-192.
>
> Signed-off-by: Stephan Mueller
Patch applied. Thanks.
--
Email: Herbert Xu
Home
On Fri, Jul 20, 2018 at 07:09:05AM +0200, Stephan Mueller wrote:
>
> Maybe I have a different understanding of how such interface should look like.
>
> Can you give me some more detail on how you envision such virtual address
> interface should work?
It should look like shash.
Cheers,
--
On Fri, Jul 13, 2018 at 05:43:16PM +0200, Antoine Tenart wrote:
> In the cipher safexcel_send_req function, GCC warns that
> first_rdesc may be used uninitialized. While this should never
> happen, this patch removes the warning by initializing this
> variable to NULL to make GCC happy.
>
> This
On Tue, Jul 10, 2018 at 05:56:33PM +0200, Stephan Müller wrote:
> The CTR DRBG requires two SGLs pointing to input/output buffers for the
> CTR AES operation. The used SGLs always have only one entry. Thus, the
> SGL can be initialized during allocation time, preventing a
> re-initialization of
On Fri, Jul 20, 2018 at 08:08:22AM +0200, Stephan Mueller wrote:
>
> - should it be synchronous like blkcipher?
It should be synchronous.
> - the TFMs (cipher Impls and templates) all operate on SGLs - should a virt
> API simply convert a virt address into an SGL? If so, the problem that
>
On Fri, Jul 13, 2018 at 04:51:37PM +0200, Antoine Tenart wrote:
> Use the appropriate SPDX license identifiers and drop the license text.
> This patch is only cosmetic.
>
> Signed-off-by: Antoine Tenart
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page:
On Tue, Jul 10, 2018 at 09:22:52AM -0500, Gustavo A. R. Silva wrote:
> In case memory resources for *base* were allocated, release them
> before return.
>
> Addresses-Coverity-ID: 1471702 ("Resource leak")
> Fixes: e3fe0ae12962 ("crypto: dh - add public key verification test")
> Signed-off-by:
>> On Fri, Jul 20, 2018 at 07:09:05AM +0200, Stephan Mueller wrote:
>>
>> Maybe I have a different understanding of how such interface should look
>> like.
>>
>> Can you give me some more detail on how you envision such virtual address
>> interface should work?
>
> It should look like
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