Re: [bug report] crypto: user - Implement a generic crypto statistics

On Thu, Oct 11, 2018 at 02:10:42PM +0300, Dan Carpenter wrote: > Hello Corentin Labbe, > > The patch cac5818c25d0: "crypto: user - Implement a generic crypto > statistics" from Sep 19, 2018, leads to the following static checker > warning: > > crypto/crypto_user_stat.c:53

Re: [PATCH 1/2] crypto: Implement a generic crypto statistics

On Fri, Jan 12, 2018 at 10:11:18AM +0100, Stephan Mueller wrote: > Am Freitag, 12. Januar 2018, 10:07:30 CET schrieb LABBE Corentin: > > > > > + __u64 stat_hash_tlen; > > > > > > > > }; > > > > > > What I am s

Re: [PATCH 1/2] crypto: Implement a generic crypto statistics

On Fri, Jan 12, 2018 at 07:49:43AM +0100, Stephan Mueller wrote: > Am Donnerstag, 11. Januar 2018, 20:56:56 CET schrieb Corentin Labbe: > > Hi Corentin, > > > This patch implement a generic way to get statistics about all crypto > > usages. > > > > Signed-off-by: Corentin Labbe

Re: [PATCH RFC 1/3] crypto: Prevent to register duplicate cra_driver_name

On Thu, Dec 21, 2017 at 01:35:27PM +0100, LABBE Corentin wrote: > On Thu, Dec 21, 2017 at 05:35:22PM +1100, Herbert Xu wrote: > > On Wed, Dec 20, 2017 at 08:09:25PM +, Corentin Labbe wrote: > > > Each crypto algorithm "cra_name" can have multiple implementation c

Re: [PATCH RFC 2/3] crypto: Implement a generic crypto statistics

On Thu, Dec 21, 2017 at 07:38:35AM +0100, Stephan Mueller wrote: > Am Mittwoch, 20. Dezember 2017, 21:09:26 CET schrieb Corentin Labbe: > > Hi Corentin, > > > This patch implement a generic way to get statistics about all crypto > > usages. > > > > Signed-off-by: Corentin Labbe

Re: [PATCH RFC 1/3] crypto: Prevent to register duplicate cra_driver_name

On Thu, Dec 21, 2017 at 05:35:22PM +1100, Herbert Xu wrote: > On Wed, Dec 20, 2017 at 08:09:25PM +, Corentin Labbe wrote: > > Each crypto algorithm "cra_name" can have multiple implementation called > > "cra_driver_name". > > If two different implementation have the same cra_driver_name,

Re: [PATCH] crypto: arm64/aes - do not call crypto_unregister_skcipher twice on error

On Wed, Nov 22, 2017 at 08:55:14AM +, Ard Biesheuvel wrote: > Hello Corentin, > > On 22 November 2017 at 08:08, Corentin Labbe wrote: > > When a cipher fail > > fails > > > to register in aes_init(), the error path go thought > > goes through > > > aes_exit() then

Re: [PATCH] nvmem: sunxi-sid: SID content is not a valid source of randomness

On Tue, Oct 25, 2016 at 09:06:34AM +0200, Jean-Francois Moine wrote: > On Tue, 25 Oct 2016 07:38:55 +0200 > LABBE Corentin <clabbe.montj...@gmail.com> wrote: > > > > On Sat, Oct 22, 2016 at 03:53:28PM +0200, Corentin Labbe wrote: > > > > Since S

Re: [PATCH] nvmem: sunxi-sid: SID content is not a valid source of randomness

On Mon, Oct 24, 2016 at 10:10:20PM +0200, Maxime Ripard wrote: > On Sat, Oct 22, 2016 at 03:53:28PM +0200, Corentin Labbe wrote: > > Since SID's content is constant over reboot, > > That's not true, at least not across all the Allwinner SoCs, and > especially not on the A10 and A20 that this

[PATCH v3 1/8] hwrng: amd: Fix style problem with blank line

Some blank line are unncessary, and one is missing after declaration. This patch fix thoses style problems. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/driver

[PATCH v3 2/8] hwrng: amd: use the BIT macro

This patch add usage of the BIT() macro Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/char/hw_random/amd-rng.c b/drivers/char/hw_random/amd-rng.c index 4

[PATCH v3 3/8] hwrng: amd: Be consitent with the driver name

The driver name is displayed each time differently. This patch make use of the same name everywhere. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 11 +-- 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/driver

[PATCH v3 7/8] hwrng: amd: Access hardware via ioread32/iowrite32

Instead of accessing hw directly via pmbase, it's better to access after ioport_map() via ioread32/iowrite32. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 31 +-- 1 file changed, 25 insertions(+), 6 del

[PATCH v3 4/8] hwrng: amd: Remove asm/io.h

checkpatch complains about used instead of linux/io.h. In fact it is not needed. This patch remove it, and in the process, alphabetize the other headers. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 7 +++ 1 file changed, 3 inse

[PATCH v3 5/8] hwrng: amd: release_region must be called after hwrng_unregister

The driver release the memory region before being sure that nobody use it. This patch made hwrng_unregister ran before any release was done. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 3 ++- 1 file changed, 2 insertions(+), 1 de

[PATCH v3 8/8] hwrng: amd: Convert to new hwrng read() API

This patch convert the hwrng interface used by amd768-rng to its new API by replacing data_read()/data_present() by read(). Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 47 1 file changed, 28 inse

[PATCH v3 6/8] hwrng: amd: Replace global variable with private struct

Instead of having two global variable, it's better to use a private struct. This will permit to remove amd_pdev variable Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 57 ++-- 1 file changed, 38 inse

[PATCH v3 0/8] hwrng: amd: rework of the amd hwrng driver

Changes since v2: - split the latest patch in 4 Changes since v1: - Keep the hwrng name as "amd" LABBE Corentin (8): hwrng: amd: Fix style problem with blank line hwrng: amd: use the BIT macro hwrng: amd: Be consitent with the driver name hwrng: amd: Remove asm/io.h

Re: [PATCH v2 5/5] hwrng: amd: Rework of the amd768-hwrng driver

On Thu, Aug 25, 2016 at 02:56:38PM +, Jason Cooper wrote: > Hi Corentin, > > On Thu, Aug 25, 2016 at 02:16:35PM +0200, LABBE Corentin wrote: > > This patch convert the hwrng interface used by amd768-rng to its new API > > by replacing data_read()/data_present() by read().

[PATCH v2 1/5] hwrng: amd: Fix style problem with blank line

Some blank line are unncessary, and one is missing after declaration. This patch fix thoses style problems. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/driver

[PATCH v2 0/5] hwrng: amd: rework of the amd hwrng driver

Changes since v1: - Keep the hwrng name as "amd" LABBE Corentin (5): hwrng: amd: Fix style problem with blank line hwrng: amd: use the BIT macro hwrng: amd: Be consitent with the driver name hwrng: amd: Remove asm/io.h hwrng: amd: Rework of the amd768-hwrng driver dr

[PATCH v2 4/5] hwrng: amd: Remove asm/io.h

checkpatch complains about used instead of linux/io.h. In fact it is not needed. This patch remove it, and in the process, alphabetize the other headers. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 7 +++ 1 file changed, 3 inse

[PATCH v2 5/5] hwrng: amd: Rework of the amd768-hwrng driver

directly via pmbase, it's better to access after ioport_map() via ioread32/iowrite32. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 151 +-- 1 file changed, 99 insertions(+), 52 deletions(-) diff --git a/d

Re: [PATCH] hwrng: pasemi_rng.c: Migrate to managed API

On Thu, Aug 25, 2016 at 05:04:16PM +0530, PrasannaKumar Muralidharan wrote: > Use devm_ioremap and devm_hwrng_register instead of ioremap and > hwrng_register. This removes unregistering and error handling code. > > This patch is not tested with hardware as I don't have access to it. > >

[PATCH v2 3/5] hwrng: amd: Be consitent with the driver name

The driver name is displayed each time differently. This patch make use of the same name everywhere. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 11 +-- 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/driver

[PATCH v2 2/5] hwrng: amd: use the BIT macro

This patch add usage of the BIT() macro Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/char/hw_random/amd-rng.c b/drivers/char/hw_random/amd-rng.c index 4

Re: [PATCH 3/5] hwrng: amd: Be consitent with the driver name

On Wed, Aug 24, 2016 at 06:58:11PM +0800, Herbert Xu wrote: > On Fri, Aug 19, 2016 at 03:42:55PM +0200, LABBE Corentin wrote: > > The driver name is displayed each time differently. > > This patch make use of the same name everywhere. > > > > Signed-off-by: L

[PATCH 1/5] hwrng: amd: Fix style problem with blank line

Some blank line are unncessary, and one is missing after declaration. This patch fix thoses style problems. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/driver

[PATCH 4/5] hwrng: amd: Remove asm/io.h

checkpatch complains about used instead of linux/io.h. In fact it is not needed. This patch remove it, and in the process, alphabetize the other headers. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 7 +++ 1 file changed, 3 inse

[PATCH 2/5] hwrng: amd: use the BIT macro

This patch add usage of the BIT() macro Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/char/hw_random/amd-rng.c b/drivers/char/hw_random/amd-rng.c index 4

[PATCH 5/5] hwrng: amd: Rework of the amd768-hwrng driver

directly via pmbase, it's better to access after ioport_map() via ioread32/iowrite32. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 151 +-- 1 file changed, 99 insertions(+), 52 deletions(-) diff --git a/d

[PATCH 3/5] hwrng: amd: Be consitent with the driver name

The driver name is displayed each time differently. This patch make use of the same name everywhere. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/char/hw_random/amd-rng.c | 13 ++--- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/driver

Re: [PATCH] Add Ingenic JZ4780 hardware RNG driver

On Thu, Aug 18, 2016 at 10:44:18AM +0530, PrasannaKumar Muralidharan wrote: > >> +static int jz4780_rng_read(struct hwrng *rng, void *buf, size_t max, bool > >> wait) > >> +{ > >> + struct jz4780_rng *jz4780_rng = container_of(rng, struct jz4780_rng, > >> +

[PATCH 5/6] crypto: sun4i-ss: Always use sun4i_tfm_ctx for storing pointer to dev ss

The dev *ss is stored both in sun4i_tfm_ctx and sun4i_req_ctx. Since this pointer will never be changed during tfm life, it is better to remove it from sun4i_req_ctx. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/sunxi-ss/sun4i-ss-hash.c | 13 +++-- d

[PATCH 4/6] crypto: sun4i-ss: fix spelling

Two words are badly spelled, this patch respell them. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/sunxi-ss/sun4i-ss-hash.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-hash.c b/drivers/crypto/su

[PATCH 2/6] crypto: sun4i-ss: unify update/final function

The update and final functions have lots of common action. This patch mix them in one function. This will give some improvements: - This will permit asynchronous support more easily - This will permit to use finup/digest functions with some performance improvements Signed-off-by: LABBE Corentin

[PATCH 6/6] crypto: sun4i-ss: fix indentation of two crypto alg

Two crypto alg are badly indented, this patch fix this style issue. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/sunxi-ss/sun4i-ss-core.c | 68 - 1 file changed, 34 insertions(+), 34 deletions(-) diff --git a/drivers/crypto

[PATCH] crypto: fix a little typo

The sentence 'Based on' is misspelled, respell it. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- crypto/xts.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/crypto/xts.c b/crypto/xts.c index 26ba583..305343f 100644 --- a/crypto/xts.c +++ b/crypto

[PATCH 3/6] crypto: sun4i-ss: clean unused ss

The ss variable is never used, remove it. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/sunxi-ss/sun4i-ss-hash.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-hash.c b/drivers/crypto/sunxi-ss/sun4i-ss-hash.c index 2

[PATCH 1/6] crypto: sun4i-ss: fix a few signed warning

The variable i is always checked against unsigned value and cannot be negative. This patch set it as unsigned. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/sunxi-ss/sun4i-ss-cipher.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/d

Re: [PATCH v3 1/1] crypto: engine: permit to enqueue ashash_request

On Tue, Jun 07, 2016 at 06:31:39PM +0800, Herbert Xu wrote: > On Thu, Jun 02, 2016 at 03:13:32PM +0200, LABBE Corentin wrote: > > > > static int omap_aes_prepare_req(struct crypto_engine *engine, > > - struct ab

Re: [PATCH 1/3] char: hw_random: Add Amlogic Meson Hardware Random Generator

> + return sizeof(u32); > +} I think you need a test for max < sizeof(u32) Regards LABBE Corentin -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

[PATCH v3 1/1] crypto: engine: permit to enqueue ashash_request

crypto_one_request to do_one_request. Since omap-aes/omap-des are the only users, this patch also convert them to the new cryptoengine API. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- crypto/crypto_engine.c| 19 --- drivers/crypto/omap-aes.

[PATCH v3 0/1] crypto: engine: permit to enqueue ashash_request

- Test the type of request before processing it LABBE Corentin (1): crypto: engine: permit to enqueue ashash_request crypto/crypto_engine.c| 19 --- drivers/crypto/omap-aes.c | 18 +- drivers/crypto/omap-des.c | 18 +- include/crypto/algapi.h

Re: [PATCH v2 1/2] crypto: engine: permit to enqueue ashash_request

On Thu, Jun 02, 2016 at 05:19:40PM +0800, Herbert Xu wrote: > On Thu, Jun 02, 2016 at 11:12:13AM +0200, LABBE Corentin wrote: > > On Thu, Jun 02, 2016 at 04:32:59PM +0800, Herbert Xu wrote: > > > On Mon, May 30, 2016 at 03:32:01PM +0200, LABBE Corentin wrote: > > >

Re: [PATCH v2 1/2] crypto: engine: permit to enqueue ashash_request

On Thu, Jun 02, 2016 at 04:32:59PM +0800, Herbert Xu wrote: > On Mon, May 30, 2016 at 03:32:01PM +0200, LABBE Corentin wrote: > > The current crypto engine allow only ablkcipher_request to be enqueued. > > Thus denying any use of it for hardware that also handle hash algo. >

Re: [PATCH 2/2] crypto: omap: convert to the new cryptoengine API

On Mon, May 30, 2016 at 10:20:01AM +0800, Baolin Wang wrote: > On 18 May 2016 at 17:21, LABBE Corentin <clabbe.montj...@gmail.com> wrote: > > Since the crypto engine has been converted to use crypto_async_request > > instead of ablkcipher_request, minor changes are needed to

[PATCH v2 1/2] crypto: engine: permit to enqueue ashash_request

The current crypto engine allow only ablkcipher_request to be enqueued. Thus denying any use of it for hardware that also handle hash algo. This patch convert all ablkcipher_request references to the more general crypto_async_request. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.

[PATCH v2 2/2] crypto: omap: convert to the new cryptoengine API

Since the crypto engine has been converted to use crypto_async_request instead of ablkcipher_request, minor changes are needed to use it. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/omap-aes.c | 10 ++ drivers/crypto/omap-des.c | 10 ++ 2

[PATCH v2 0/2] crypto: engine: permit to enqueue ashash_request

patch was only compile tested but the crypto engine with hash support was tested on two different offtree driver (sun4i-ss and sun8i-ce) Regards Changes since v1: - rebased on cryptodev for handling omap-des LABBE Corentin (2): crypto: engine: permit to enqueue ashash_request crypto: omap

[PATCH 0/2] crypto: engine: permit to enqueue ashash_request

patch was only compile tested but the crypto engine with hash support was tested on two different offtree driver (sun4i-ss and sun8i-ce) Regards LABBE Corentin (2): crypto: engine: permit to enqueue ashash_request crypto: omap: convert to the new cryptoengine API crypto/crypto_engine.c| 17

[PATCH 2/2] crypto: omap: convert to the new cryptoengine API

Since the crypto engine has been converted to use crypto_async_request instead of ablkcipher_request, minor changes are needed to use it. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/omap-aes.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-)

[PATCH 1/2] crypto: engine: permit to enqueue ashash_request

The current crypto engine allow only ablkcipher_request to be enqueued. Thus denying any use of it for hardware that also handle hash algo. This patch convert all ablkcipher_request references to the more general crypto_async_request. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.

Re: [PATCH] crypto: document correct return value for request allocation

On Sat, Apr 02, 2016 at 10:54:56AM -0500, Eric Biggers wrote: > Signed-off-by: Eric Biggers > --- > Documentation/DocBook/crypto-API.tmpl | 6 +++--- > include/crypto/aead.h | 3 +-- > include/crypto/hash.h | 3 +-- > include/crypto/skcipher.h

[PATCH RESEND] crypto: sun4i-ss: Replace spinlock_bh by spin_lock_irq{save|restore}

- Add Allwinner Security System crypto accelerator") Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> Cc: stable <sta...@vger.kernel.org> --- drivers/crypto/sunxi-ss/sun4i-ss-cipher.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/cr

[PATCH] crypto: sun4i-ss: use spin_lock_irq{save|restore}

The current sun4i-ss driver is subject to data corruption when ciphering/deciphering. It occurs randomly on end of handled data. No root cause have been found and the only way to remove it is to replace all spin_lock_bh by they irq counterparts. Signed-off-by: LABBE Corentin <clabbe.mo

Re: [linux-sunxi] [PATCH 02/11] crypto: sunxi-ss: prevent compilation on 64-bit

On Mon, Feb 01, 2016 at 05:39:21PM +, Andre Przywara wrote: > The driver for the sunxi-ss crypto engine is not entirely 64-bit safe, > compilation on arm64 spits some warnings. > The proper fix was deemed to involved [1], so since 64-bit SoCs won't > have this IP block we just disable this

Re: [PATCH v3 2/4] crypto: niagara: Use precalculated hash from headers

On Thu, Dec 17, 2015 at 04:40:18PM +0800, Herbert Xu wrote: > On Tue, Dec 15, 2015 at 02:00:21PM +0100, LABBE Corentin wrote: > > Precalculated hash for empty message are now present in hash headers. > > This patch just use them. > > > > Signed-off-by: LABBE Corentin

[PATCH v4 2/4] crypto: niagara: Use precalculated hash from headers

Precalculated hash for empty message are now present in hash headers. This patch just use them. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/Kconfig | 3 +++ drivers/crypto/n2_core.c | 33 ++--- 2 files changed, 9 insertions(

[PATCH v4 3/4] crypto: ccp: Use precalculated hash from headers

Precalculated hash for empty message are now present in hash headers. This patch just use them. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> Tested-by: Tom Lendacky <thomas.lenda...@amd.com> Acked-by: Tom Lendacky <thomas.lenda...@amd.com> --- drivers/crypto/

[PATCH v4 1/4] crypto: hash: add zero length message hash for shax and md5

Some crypto drivers cannot process empty data message and return a precalculated hash for md5/sha1/sha224/sha256. This patch add thoses precalculated hash in include/crypto. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- crypto/md5.c| 6 ++ crypto/sha1_gen

[PATCH v4 4/4] crypto: ux500: Use precalculated hash from headers

Precalculated hash for empty message are now present in hash headers. This patch just use them. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/ux500/Kconfig | 2 ++ drivers/crypto/ux500/hash/hash_core.c | 20 ++-- 2 files chan

[PATCH v4 0/4] crypto: add precalculated hash for zero message length

/SHA1 Changes since v1 - Moved arrays from headers to c file and made them EXPORT. LABBE Corentin (4): crypto: hash: add zero length message hash for shax and md5 crypto: niagara: Use precalculated hash from headers crypto: ccp: Use precalculated hash from headers crypto: ux500: Use

[PATCH v3 3/4] crypto: ccp: Use precalculated hash from headers

Precalculated hash for empty message are now present in hash headers. This patch just use them. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> Tested-by: Tom Lendacky <thomas.lenda...@amd.com> Acked-by: Tom Lendacky <thomas.lenda...@amd.com> --- drivers/crypto/

[PATCH v3 4/4] crypto: ux500: Use precalculated hash from headers

Precalculated hash for empty message are now present in hash headers. This patch just use them. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/ux500/Kconfig | 1 + drivers/crypto/ux500/hash/hash_core.c | 20 ++-- 2 files chan

[PATCH v3 2/4] crypto: niagara: Use precalculated hash from headers

Precalculated hash for empty message are now present in hash headers. This patch just use them. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/Kconfig | 2 ++ drivers/crypto/n2_core.c | 33 ++--- 2 files changed, 8 insertions(

[PATCH v3 1/4] crypto: hash: add zero length message hash for shax and md5

Some crypto drivers cannot process empty data message and return a precalculated hash for md5/sha1/sha224/sha256. This patch add thoses precalculated hash in include/crypto. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- crypto/md5.c| 6 ++ crypto/sha1_gen

[PATCH v3 0/4] crypto: add precalculated hash for zero message length

and made them EXPORT. LABBE Corentin (4): crypto: hash: add zero length message hash for shax and md5 crypto: niagara: Use precalculated hash from headers crypto: ccp: Use precalculated hash from headers crypto: ux500: Use precalculated hash from headers crypto/md5.c

Re: [RFC PATCH V3] Crypto: rockchip/crypto - add hash support for crypto engine in rk3288

Hello I have some minor comments below. On Fri, Dec 11, 2015 at 09:58:23AM +0800, Zain Wang wrote: > Add md5 sha1 sha256 support for crypto engine in rk3288. > This patch can't support multiple updatings because of limited of IC, > as result, it can't support import and export too. > >

Re: [RFC PATCH V2] Crypto: rockchip/crypto - add hash support for crypto engine in rk3288

Hello I have some comments below. On Wed, Dec 09, 2015 at 06:16:42PM +0800, Zain Wang wrote: > Add md5 sha1 sha256 support for crypto engine in rk3288. > This patch can't support multiple updatings because of limited of IC, > as result, it can't support import and export too. > > Signed-off-by:

[PATCH] crypto: akcipher: fix typos in include/crypto/akcipher.h

Fix numerous spelling error in include/crypto/akcipher.h Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- include/crypto/akcipher.h | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/include/crypto/akcipher.h b/include/crypto/akcipher.h index 4

[PATCH v2 1/4] crypto: hash: add zero length message hash for shax and md5

Some crypto drivers cannot process empty data message and return a precalculated hash for md5/sha1/sha224/sha256. This patch add thoses precalculated hash in include/crypto. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- crypto/md5.c| 6 ++ crypto/sha1_gen

[PATCH v2 4/4] crypto: ux500: Use precalculated hash from headers

Precalculated hash for empty message are now present in hash headers. This patch just use them. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/ux500/hash/hash_core.c | 20 ++-- 1 file changed, 2 insertions(+), 18 deletions(-) diff --git a/d

[PATCH v2 3/4] crypto: ccp: Use precalculated hash from headers

Precalculated hash for empty message are now present in hash headers. This patch just use them. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> Tested-by: Tom Lendacky <thomas.lenda...@amd.com> Acked-by: Tom Lendacky <thomas.lenda...@amd.com> --- drivers/crypto/

[PATCH v2 2/4] crypto: niagara: Use precalculated hash from headers

Precalculated hash for empty message are now present in hash headers. This patch just use them. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/n2_core.c | 33 ++--- 1 file changed, 6 insertions(+), 27 deletions(-) diff --git a/d

[PATCH v2 0/4] crypto: add precalculated hash for zero message length

headers to c file and made them EXPORT. LABBE Corentin (4): crypto: hash: add zero length message hash for shax and md5 crypto: niagara: Use precalculated hash from headers crypto: ccp: Use precalculated hash from headers crypto: ux500: Use precalculated hash from headers crypto/md5.c

[PATCH 2/2] crypto: picoxcell: set [src|dst]_nents and nents as signed int

value of sg_nents_for_len") Reported-by: Dan Carpenter <dan.carpen...@oracle.com> Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/picoxcell_crypto.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/picoxcell_cryp

[PATCH 1/2] crypto: sahara: set nb_[in|out]_sg as signed int

value of sg_nents_for_len") Reported-by: Dan Carpenter <dan.carpen...@oracle.com> Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/sahara.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/sahara.c b/drivers/crypto/

[PATCH v2 0/2] fix a possible NULL dereference

- Use of_device_get_match_data - Add the missing patch for constify atmel_nand_caps structures LABBE Corentin (2): mtd: nand: atmel_nand: constify atmel_nand_caps structures mtd: nand: atmel_nand: fix a possible NULL dereference drivers/mtd/nand/atmel_nand.c | 11 ++- 1 file changed, 6 insertions(

Re: [PATCH] crypto: sun4i-ss: add missing statesize

On Tue, Nov 17, 2015 at 10:09:38PM +0800, Herbert Xu wrote: > On Fri, Nov 13, 2015 at 02:10:28PM +0100, LABBE Corentin wrote: > > sun4i-ss implementaton of md5/sha1 is via ahash algorithms. > > Commit 8996eafdcbad ("crypto: ahash - ensure statesize is non-zero") > &g

[PATCH v2] crypto: sun4i-ss: add missing statesize

winner Security System crypto accelerator") Cc: <sta...@vger.kernel.org> # v4.3+ Tested-by: Chen-Yu Tsai <w...@csie.org> Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/sunxi-ss/sun4i-ss-core.c | 2 ++ 1 file changed, 2 insertions(+) diff --

[PATCH v2] crypto: sun4i-ss: add missing statesize

Hello The current sun4i-ss cannot be loaded with the error "Failed to load md5". The following patch will fix that. Changes since v1: - Add the correct fixes tag. - Add the correct #version comment for stable. - Be more precise against the commit who made this change necessary. Regards -- To

[PATCH] crypto: sun4i-ss: add missing statesize

winner Security System crypto accelerator") Cc: <sta...@vger.kernel.org> # v4.3+ Tested-by: Chen-Yu Tsai <w...@csie.org> Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/sunxi-ss/sun4i-ss-core.c | 2 ++ 1 file changed, 2 insertions(+) diff --

[PATCH] crypto: sun4i-ss: add missing statesize

sun4i-ss implementaton of md5/sha1 is via ahash algorithms. A recent change make impossible to load them without giving statesize. This patch specifiy statesize for sha1 and md5. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> Cc: sta...@vger.kernel.org --- drivers/crypto/su

[PATCH 1/7] crypto: marvell: check return value of sg_nents_for_len

The sg_nents_for_len() function could fail, this patch add a check for its return value. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/marvell/cipher.c | 8 drivers/crypto/marvell/hash.c | 4 2 files changed, 12 insertions(+) diff --git a/d

[PATCH 6/7] crypto: caam: check return value of sg_nents_for_len

The sg_nents_for_len() function could fail, this patch add a check for its return value. We do the same for sg_count since it use sg_nents_for_len(). Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/caam/caamhash.c | 24 1 file chang

[PATCH 2/7] crypto: talitos: check return value of sg_nents_for_len

The sg_nents_for_len() function could fail, this patch add a check for its return value. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/talitos.c | 41 ++--- 1 file changed, 34 insertions(+), 7 deletions(-) diff --git a/d

[PATCH 4/7] crypto: qce: check return value of sg_nents_for_len

The sg_nents_for_len() function could fail, this patch add a check for its return value. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/qce/ablkcipher.c | 8 drivers/crypto/qce/sha.c| 5 + 2 files changed, 13 insertions(+) diff --git a/d

[PATCH 5/7] crypto: picoxcell: check return value of sg_nents_for_len

The sg_nents_for_len() function could fail, this patch add a check for its return value. In the same time, we remove sg_count() as it is used as an alias of sg_nents_for_len. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/picoxcell_crypto.

[PATCH 3/7] crypto: sahara: check return value of sg_nents_for_len

The sg_nents_for_len() function could fail, this patch add a check for its return value. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/sahara.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/crypto/sahara.c b/drivers/crypto/sahara.c

[PATCH 7/7] crypto: amcc: check return value of sg_nents_for_len

The sg_nents_for_len() function could fail, this patch add a check for its return value. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/amcc/crypto4xx_core.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/crypto/amcc/crypto4xx_core.c b/d

Re: [PATCH v1 1/4] Crypto: Crypto driver support aes/des/des3 for rk3288

+ .cra_driver_name= "cbc-aes-rk", > + .cra_priority = 300, > + .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | > + CRYPTO_ALG_ASYNC, > + .cra_blocksize = AES_BLOCK_SIZE, > + .cra_ctxsize

Re: [PATCH] crypto: qce: dma_map_sg can handle chained SG

On Tue, Nov 03, 2015 at 12:39:57PM +0200, Stanimir Varbanov wrote: > Hi, > > I know that this patch has been queued up, but ... > > On 10/02/2015 09:01 AM, LABBE Corentin wrote: > > The qce driver use two dma_map_sg path according to SG are chained > > or not. >

Re: [RESEND PATCH 1/4] Crypto: Crypto driver support aes/des/des3 for rk3288

On Fri, Oct 30, 2015 at 04:22:46PM +0800, Zain Wang wrote: > Crypto driver support cbc/ecb two chainmode, and aes/des/des3 three cipher > mode. > The names registered are: > ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede) > You can alloc tags above in your case. > > And other

Re: [PATCH] crypto: x86: Remove duplicate define of SHA1_DIGEST_SIZE

On Fri, Oct 16, 2015 at 09:04:58AM -0700, Tim Chen wrote: > On Wed, 2015-10-14 at 21:15 +0200, LABBE Corentin wrote: > > The sha x86 crypto code use two define for the same thing: > > NUM_SHA1_DIGEST_WORDS and SHA1_DIGEST_LENGTH > > Replace them by SHA1_DIGEST_SIZE/4 >

[PATCH 11/11] crypto: algif: Change some variable to size_t

Some variable are set as int but store only positive values. Furthermore there are used in operation/function that wait for unsigned value. This patch set them as size_t. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- crypto/algif_aead.c | 6 +++--- crypto/algif_skci

[no subject]

Hello This patch series was begun by my finding that memcpy_[to|from]_msg have a parameter len which is an int but used as size_t in whole functions. Without blindly changing the parameter to size_t, I have tried to see if anywhere in linux source code, someone give a negative argument with the

[PATCH 1/4] crypto: hifn_795x: replace simple_strtoul by kstrtouint

The simple_strtoul function is marked as obsolete. This patch replace it by kstrtouint at the cost of changing some function return type from void to int. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/hifn_795x.c | 28 1 file c

[PATCH 3/4] crypto: hifn_795x: use dev_xx/pr_xx instead of printk

This patch replace all printk by their dev_xx/pr_xx counterpart. The patch remove also all custom dprintk by pr_debug/dev_debug Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/hifn_795x.c | 149 - 1 file chang

[PATCH 4/4] crypto: hifn_795x: fix coding style

The hifn_795x driver is old and have lots of style issue. This patch try to solve easy ones. Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com> --- drivers/crypto/hifn_795x.c | 301 + 1 file changed, 138 insertions(+), 163 deletions(-)

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