On Mon, 17 Oct 2016, Alan Tull wrote:
> +/**
> + * of_fpga_bridge_get - get an exclusive reference to a fpga bridge
> + *
> + * @np: node pointer of a FPGA bridge
> + * @info: fpga image specific information
> + *
> + * Return fpga_bridge struct if successful.
> + * Return -EBUSY if someone alread
On Mon, 17 Oct 2016, Moritz Fischer wrote:
> Hi Alan,
>
> couple of nits inline and some comments on ordering the patches ;-)
>
> On Mon, Oct 17, 2016 at 6:09 PM, Alan Tull
> wrote:
> > This patch adds a minor change in the FPGA Mangager API
>
> s/Mangager/Manager/
Yup!
>
> > to hold infor
On Tue, 18 Oct 2016, Rob Herring wrote:
> On Mon, Oct 17, 2016 at 11:09:34AM -0500, Alan Tull wrote:
> > Add bindings document for the Altera Freeze Bridge. A Freeze
> > Bridge is used to gate traffic to/from a region of a FPGA
> > such that that region can be reprogrammed. The Freeze Bridge
> >
On Tue, 18 Oct 2016, Moritz Fischer wrote:
> On Mon, Oct 17, 2016 at 11:09:41AM -0500, Alan Tull wrote:
> > Add low level driver to support reprogramming FPGAs for Altera
> > SoCFPGA Arria10.
> >
> > Signed-off-by: Alan Tull
>
> Reviewed-by: Moritz Fischer
> > +
> > +MODULE_AUTHOR("Alan Tull
On Sat, 5 Mar 2016, Rob Herring wrote:
> On Thu, Feb 25, 2016 at 05:25:07PM -0600, Alan Tull wrote:
> > Add bindings documentation for Altera SOCFPGA bridges:
> > * fpga2sdram
> > * fpga2hps
> > * hps2fpga
> > * lwhps2fpga
> >
> > Signed-off-by: Alan Tull
> > Signed-off-by: Matthew Gerlach
On Sat, 5 Mar 2016, Rob Herring wrote:
> > +Example:
> > + hps_fpgabridge0: fpgabridge@ff40 {
>
> No underscores.
>
> fpga-bridge@...
Hi Rob,
The dtc is not letting me compile if I use a hyphen in the label.
I think we have to use hyphens in the node names and underscores
in the labels.
On Fri, 10 Jun 2016, Trent Piepho wrote:
> On Fri, 2016-02-05 at 15:30 -0600, at...@opensource.altera.com wrote:
> > Supports Altera SOCFPGA bridges:
> > * fpga2sdram
> > * fpga2hps
> > * hps2fpga
> > * lwhps2fpga
> >
> > Allows enabling/disabling the bridges through the FPGA
> > Bridge Frame
On Thu, 28 Jul 2016, Andrea Galbusera wrote:
> On Fri, Jun 10, 2016 at 4:18 AM, Trent Piepho wrote:
> > On Fri, 2016-02-05 at 15:30 -0600, at...@opensource.altera.com wrote:
> >> Supports Altera SOCFPGA bridges:
> >> * fpga2sdram
> >> * fpga2hps
> >> * hps2fpga
> >> * lwhps2fpga
> >>
> >> All
On Thu, 28 Jul 2016, Trent Piepho wrote:
> On Thu, 2016-07-28 at 10:21 -0500, atull wrote:
> > > >
> > > > This isn't going work if more than one bridge is used. Each bridge has
> > > > its own priv and thus priv->l3_remap_value. Each bridge
From: Alan Tull
Add bindings documentation for Altera SOCFPGA bridges:
* fpga2sdram
* fpga2hps
* hps2fpga
* lwhps2fpga
Signed-off-by: Alan Tull
Signed-off-by: Matthew Gerlach
Signed-off-by: Dinh Nguyen
---
v2: separate into 2 documents for the 2 drivers
v12: bump version to line up with
From: Alan Tull
FPGA Area and FPGA Bus support programming FPGA under control of
the Device Tree.
A FPGA Bus contains the devices necessary for programming an
FPGA.
When a Device Tree Overlay containing a FPGA Area is
applied, the FPGA Area will be probed and will:
* check to see if there is a
From: Alan Tull
This framework adds API functions for enabling/
disabling FPGA bridges under kernel control.
This allows the Linux kernel to disable FPGA bridges
during FPGA reprogramming and to enable FPGA bridges
when FPGA reprogramming is done. This framework is
be manufacturer-agnostic, all
From: Alan Tull
New bindings document for FPGA Area for reprogramming
FPGA's under Device Tree control
Signed-off-by: Alan Tull
---
v9: initial version added to this patchset
v10: s/fpga/FPGA/g
replace DT overlay example with slightly more complicated example
move to staging/simple-f
From: Alan Tull
For v15, I'm not using the FPGA Manager as the bus. I'm adding a FPGA Bus;
the FPGA Manager and bridges go below it.
I've gotten enough feedback that my proposals are Altera specific that I am
going with that and changing the bindings to include an 'altr,' prefix.
I've combined
From: Alan Tull
Supports Altera SOCFPGA bridges:
* fpga2sdram
* fpga2hps
* hps2fpga
* lwhps2fpga
Allows enabling/disabling the bridges through the FPGA
Bridge Framework API functions.
The fpga2sdram driver only supports enabling and disabling
of the ports that been configured early on. Thi
From: Alan Tull
Add documentation for new FPGA bridge class's sysfs interface.
Signed-off-by: Alan Tull
--
v15: Document added in v15 of patch set
---
Documentation/ABI/testing/sysfs-class-fpga-bridge | 11 +++
1 file changed, 11 insertions(+)
create mode 100644 Documentation/ABI/te
On Wed, 20 Jan 2016, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> Add documentation for new FPGA bridge class's sysfs interface.
>
> Signed-off-by: Alan Tull
I've received two emails that there was no patch in this email. The
copy I received has 11 lines of changes, adding one fi
On Thu, 21 Jan 2016, Moritz Fischer wrote:
> Hi Alan,
>
> On Wed, Jan 20, 2016 at 8:24 PM, wrote:
> > From: Alan Tull
> >
> > For v15, I'm not using the FPGA Manager as the bus. I'm adding a FPGA Bus;
> > the FPGA Manager and bridges go below it.
> >
> > I've gotten enough feedback that my pr
On Thu, 21 Jan 2016, Moritz Fischer wrote:
> Hi Alan,
>
> I tried getting a simple example to work with overlays, however so far
> I failed getting
> the child nodes to probe drivers, maybe you have an idea? The fpga
> image is loaded just fine.
>
> in dts:
>
>fpga_bus@0 {
>
On Thu, 21 Jan 2016, Moritz Fischer wrote:
> Hi Alan,
>
> minor nits inline:
>
> On Wed, Jan 20, 2016 at 8:24 PM, wrote:
>
> > v15: Add altr,fpga-bus implementation
> > Change compatible string "fpga-area" -> "altr,fpga-area"
>
> Doesn't look that way down there. Or am I reading the cod
On Fri, 22 Jan 2016, Moritz Fischer wrote:
> Alan,
>
> On Wed, Jan 20, 2016 at 8:24 PM, wrote:
>
> > +static int fpga_area_probe(struct platform_device *pdev)
> > +{
> > + struct device *dev = &pdev->dev;
> > + struct device_node *np = dev->of_node;
> > + struct fpga_area *ar
On Mon, 25 Jan 2016, Rob Herring wrote:
> On Fri, Jan 22, 2016 at 6:07 PM, Moritz Fischer
> wrote:
> > On Fri, Jan 22, 2016 at 5:37 PM, atull wrote:
> >> On Fri, 22 Jan 2016, Moritz Fischer wrote:
> >>
> >>> Alan,
> >>>
> >>> O
On Mon, 25 Jan 2016, Rob Herring wrote:
> On Wed, Jan 20, 2016 at 01:24:22PM -0600, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > New bindings document for FPGA Area for reprogramming
> > FPGA's under Device Tree control
> >
> > Signed-off-by: Alan Tull
> > ---
> > v9: initia
From: Alan Tull
New bindings document for FPGA Region to support programming
FPGA's under Device Tree control
Signed-off-by: Alan Tull
Signed-off-by: Moritz Fischer
---
v9: initial version added to this patchset
v10: s/fpga/FPGA/g
replace DT overlay example with slightly more complicated
From: Alan Tull
Add documentation for new FPGA bridge class's sysfs interface.
Signed-off-by: Alan Tull
--
v15: Document added in v15 of patch set
v16: No change to this patch in v16 of patch set
---
Documentation/ABI/testing/sysfs-class-fpga-bridge | 11 +++
1 file changed, 11 inser
From: Alan Tull
FPGA Regions support programming FPGA under control of the Device
Tree.
Signed-off-by: Alan Tull
---
v9: initial version (this patch added during rest of patchset's v9)
v10: request deferral if fpga mgr or bridges not available yet
cleanup as fpga manager core goes into th
From: Alan Tull
This framework adds API functions for enabling/
disabling FPGA bridges under kernel control.
This allows the Linux kernel to disable FPGA bridges
during FPGA reprogramming and to enable FPGA bridges
when FPGA reprogramming is done. This framework is
be manufacturer-agnostic, all
From: Alan Tull
Supports Altera SOCFPGA bridges:
* fpga2sdram
* fpga2hps
* hps2fpga
* lwhps2fpga
Allows enabling/disabling the bridges through the FPGA
Bridge Framework API functions.
The fpga2sdram driver only supports enabling and disabling
of the ports that been configured early on. Thi
From: Alan Tull
v16 Refactors the FPGA Area and FPGA Bus into single thing called an
FPGA Region and eliminates using simple-bus. I'm using the word
"region" as it's a term is used in the literature of both the major
FPGA manufacturors.
Changes for v16:
* Refactor the FPGA Area and FPGA Bus int
From: Alan Tull
Add bindings documentation for Altera SOCFPGA bridges:
* fpga2sdram
* fpga2hps
* hps2fpga
* lwhps2fpga
Signed-off-by: Alan Tull
Signed-off-by: Matthew Gerlach
Signed-off-by: Dinh Nguyen
---
v2: separate into 2 documents for the 2 drivers
v12: bump version to line up with
On Fri, 5 Feb 2016, Josh Cartwright wrote:
> Hey Alan-
>
> First off, thanks for all of your (and others') work on this.
>
> On Fri, Feb 05, 2016 at 03:29:58PM -0600, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > New bindings document for FPGA Region to support programming
> >
On Fri, 5 Feb 2016, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> v16 Refactors the FPGA Area and FPGA Bus into single thing called an
> FPGA Region and eliminates using simple-bus. I'm using the word
> "region" as it's a term is used in the literature of both the major
> FPGA manufa
On Thu, 11 Feb 2016, Rob Herring wrote:
> On Thu, Feb 11, 2016 at 2:49 PM, atull wrote:
> > On Fri, 5 Feb 2016, at...@opensource.altera.com wrote:
> >
> >> From: Alan Tull
> >>
> >> v16 Refactors the FPGA Area and FPGA Bus into single thing called an
&g
On Thu, 11 Feb 2016, atull wrote:
> On Thu, 11 Feb 2016, Rob Herring wrote:
>
> > On Thu, Feb 11, 2016 at 2:49 PM, atull wrote:
> > > On Fri, 5 Feb 2016, at...@opensource.altera.com wrote:
> > >
> > >> From: Alan Tull
> > >>
> > &
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