On Mon, Mar 2, 2015 at 4:27 PM, Michael Welling mwell...@ieee.org wrote:
On Mon, Mar 02, 2015 at 03:16:06PM +0900, Alexandre Courbot wrote:
On Fri, Feb 27, 2015 at 10:15 PM, Linus Walleij
linus.wall...@linaro.org wrote:
On Thu, Feb 26, 2015 at 11:27 AM, Alexandre Courbot gnu...@gmail.com
It's possible that boot-loader that worked on CPU before Linux kernel
made some changes in GPIO controller registers. For example interrupts
could be all masked.
Current implementation of DW GPIO driver relies on default values in
mask register.
This is especially problematic in this DW GPIO
On Thursday 26 February 2015 18:54:53 Alexandre Courbot wrote:
On Thu, Feb 12, 2015 at 1:28 AM, Rojhalat Ibrahim i...@rtschenk.de wrote:
Use the new gpiod_get_array and gpiod_put_array functions for obtaining and
disposing of GPIO descriptors.
Cc: David Miller da...@davemloft.net
On 02/03/2015 at 19:28:45 +0200, Baruch Siach wrote :
There is no code ender the 'err' label. Just return the error code directly.
Signed-off-by: Baruch Siach bar...@tkos.co.il
Reviewed-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
drivers/pinctrl/pinctrl-at91.c | 6 +-
Maxime Coquelin schreef op ma 02-03-2015 om 17:53 [+0100]:
Do you agree if I define it like this:
config ARMV7M_SYSTICK
bool Clocksource driver for ARMv7-M System timer
depends on OF (CPU_V7M || COMPILE_TEST)
select CLKSRC_OF
select CLKSRC_MMIO
help
This
Hi Andreas,
Thanks for this detailed review.
2015-03-02 18:42 GMT+01:00 Andreas Färber afaer...@suse.de:
Hi Maxime,
Please don't put the whole world in To, that makes replying to you much
harder. You can put maintainers in CC instead.
Ok.
Am 20.02.2015 um 19:01 schrieb Maxime Coquelin:
On 02/24/2015 02:00 PM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
Various non-semantic tweaks and layout/consistency fixes for existing
Tegra pinctrl drivers.
Move the definition of DRV_PINGROUP_REG() before the definition of
PINGROUP() so that a future SoC driver can
SoC family such as DRA7 family of processors have, in addition
to the regular muxing of pins (as done by pinctrl-single), an
additional hardware module called IODelay which is also expected to be
configured. This IODelay module has it's own register space that is
independent of the control module.
PING
On Thu, Feb 26, 2015 at 3:41 PM, Sonic Zhang sonic@gmail.com wrote:
From: Sonic Zhang sonic.zh...@analog.com
The blackfin pinmux and gpio controller doesn't allow user to set up 1 pin
for both GPIO and peripheral function. So, check both gpio_owner and
mux_owner before approving the
SoCs such as DRA7 family from Texas Instruments also include a highly
configurable hardware block called the IOdelay block. This block
allows very specific custom fine tuning for electrical characteristics
of IO pins.
In addition to the regular pin muxing modes supported by the
pinctrl-single,
Having aliases for Ethernet devices is useless, since the networking
subsystem unfortunately doesn't care about aliases to name network
interfaces.
Note that the 'aliases' nodes in armada-370-xp.dtsi and armada-xp.dtsi
become empty, but that we keep it as is since a followup patch will
re-add
The Device Tree nodes describing the MPIC nodes on Armada 370, 375,
38x and XP had a unit address that did not match the first reg
property, as suggested by the ePAPR. This commit fixes that.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
Hello,
This is the third version of the patch series adding Armada 39x basic
support.
This set of patches add basic support for a new family of Marvell EBU
processors: the Armada 39x. They are based on Cortex-A9 (like Armada
375 and 38x) and the most important new feature is probably the
On Marvell Armada 38x, the USB2 controller registers are at 0x58000,
so the corresponding Device Tree node should have a unit address of
58000, and not 5. We were using 5 due to an incorrect
copy/pastebin of Armada 370/XP code.
Signed-off-by: Thomas Petazzoni
This commit updates the ARM CPUs Device Tree binding to document a new
enable method of Marvell Armada 39x processors.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
Documentation/devicetree/bindings/arm/cpus.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
This commit adds a new clock driver for the Marvell Armada 39x family
of processors. This driver is fairly similar to the ones already used
on other Marvell EBU processors, with the following main differences:
* Different set of ratios
* Different set of core clocks
* Configurable reference
This commit adds the core support for Armada 39x, which is quite
simple:
- a new Kconfig option which selects the appropriate clock and
pinctrl drivers as well as other common features (GIC, L2 cache,
SMP, etc.)
- a new DT_MACHINE_START which references the top-level compatible
With the introduction of the Marvell Armada 39x SoC, the DT bindings
for Marvell EBU clocks need to be extended. This commit include the
corresponding update to the Device Tree bindings documentation.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
This commit adds the stdout-path property in /chosen for all Armada
boards that were not yet carrying this property, and gets rid of
/chosen/bootargs which becomes unneeded: earlyprintk should not be
used by default, and the console= parameter is replaced by the
/chosen/stdout-path property.
This commit adds the Device Tree files for the Armada 39x family of
processors, as well as one Armada 398 Development Board.
Like for other Marvell EBU families, a common armada-39x.dtsi contains
the description of the common features of all Armada 39x SoCs, while
armada-390.dtsi and
This commit adds 'serialX' aliases for the various serial ports on
Armada 370, 375, 38x and XP platforms. It will allow the usage of the
stdout-path property.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
arch/arm/boot/dts/armada-370-xp.dtsi | 2 ++
Following the introduction of the Marvell Armada 39x support, let's
enabled it by default in mvebu_v7_defconfig.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
arch/arm/configs/mvebu_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
The Armada 39x, contrary to its predecessor, has a configurable
reference clock frequency, of either 25 Mhz, or 40 Mhz. For the
previous SoCs, it was fixed to 25 Mhz and described directly as such
in the Device Tree.
For Armada 39x, we need to read certain registers to know whether the
frequency
This commit adds the standard uart0 and uart1 DT labels to the Device
Tree description of the Marvell Armada 375 SoC.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
arch/arm/boot/dts/armada-375.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Following the introduction of the Marvell Armada 39x support, let's
enable this support by default in multi_v7_defconfig.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: a...@kernel.org
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff
The Armada 38x had a label for UART0, but not UART1. This commit fixes
that.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Acked-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-38x.dtsi | 2 +-
1 file changed, 1 insertion(+), 1
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