+ /* If the master is a maxtor in UDMA6 then the slave should not use
UDMA 6 */
+ if(strstr(model_num, Maxtor) == 0 pair-dma_mode == XFER_UDMA_6)
+ mask = ~ (1 (6 + ATA_SHIFT_UDMA));
Some Maxtor drives have Maxtor while others have MAXTOR in the IDENTIFY
data.
Should
Hi Albert,
Thanks for quick answer.
[ 35.082749] Uniform CD-ROM driver Revision: 3.20
[ 35.083141] sr 0:0:0:0: Attached scsi CD-ROM sr0
[ 35.092019] sr1: scsi3-mmc drive: 231x/52x cd/rw xa/form2 cdda tray
[ 35.092385] sr 0:0:1:0: Attached scsi CD-ROM sr1
[ 35.099265] sr 0:0:0:0:
Tejun Heo wrote:
[cc'ing Albert Lee. Hi!]
Vlad Codrea wrote:
Okay, now that you're on libata driver, it's easier for me to debug.
Can you apply the attached patch over 2.6.20 and report what the kernel
says? (the patch will apply with some noise, it's okay)
I've applied your patch
Daniel Mack wrote:
Hi,
this makes the DMA part of Au1xxx's IDE interface compile again.
Signed-of-by: Daniel Mack [EMAIL PROTECTED]
diff --git a/drivers/ide/mips/au1xxx-ide.c b/drivers/ide/mips/au1xxx-ide.c
Do you mean between disabling IRQ mechanisms and enabling PCI device in
pcim_prepare_device()?
Yes.
-Andi
-
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On Wed, Mar 14, 2007 at 10:46:47PM +0100, Andi Kleen wrote:
Tejun Heo [EMAIL PROTECTED] writes:
Let's assume there's a device which shares its INTX IRQ line with
another device and the other one is already initialized. During boot,
due to BIOS's fault, bad hardware design or sheer bad
Sergei Shtylyov wrote:
Hello, I wrote:
Bartlomiej Zolnierkiewicz wrote:
[PATCH] sl82c105: add -speedproc support
* add sl82c105_tunepio() wrapper for sl82c105_tune_drive()
(just to get the error value)
* add sl82c105_tune_chipset() (-speedproc method) for setting
transfer mode
Regions are requested twice during initialization causing the second
one to fail. This is regression introduced during iomap conversion.
Signed-off-by: Tejun Heo [EMAIL PROTECTED]
---
Nate, this should fix it. But LBA48 support is broken on the
controller.
diff --git
YUP wrote:
Hi Albert,
Thanks for quick answer.
[ 35.082749] Uniform CD-ROM driver Revision: 3.20
[ 35.083141] sr 0:0:0:0: Attached scsi CD-ROM sr0
[ 35.092019] sr1: scsi3-mmc drive: 231x/52x cd/rw xa/form2 cdda tray
[ 35.092385] sr 0:0:1:0: Attached scsi CD-ROM sr1
[
Hello,
Bob Stewart wrote:
Is there an easy way to tell whether the command was sent as
LBA48, say, in the driver's bmdma_start function or even in the
hardreset function after the fact? One of my tests was using a 64
sector limit, with pretty much the same results. I always test against
Vlad Codrea wrote:
Tejun Heo wrote:
[cc'ing Albert Lee. Hi!]
Vlad Codrea wrote:
Okay, now that you're on libata driver, it's easier for me to debug.
Can you apply the attached patch over 2.6.20 and report what the kernel
says? (the patch will apply with some noise, it's okay)
--- Tejun Heo [EMAIL PROTECTED] wrote:
The driver is seriously broken regarding LBA48 support. The timeout
goes away if max_sectors is decreased to ATA_MAX_SECTORS - 1, doh. But
both the reading and writing are seriously broken. I can't tell whether
they end up in the wrong sectors or
I wrote:
I have a SiI3124 PCI-X controller
..
I have been using this configuration with a DS-1220 external
enclosure + port multiplier:
..
Occasionally, I get an error like this:
Mar 9 12:53:18 localhost kernel: ata8.00: exception Emask 0x0 SAct 0x1 SErr
0x0 action 0x2 frozen
Mar 9
On Wednesday 14 March 2007, Stanislav Brabec wrote:
Bartlomiej Zolnierkiewicz wrote:
On Wednesday 14 March 2007, Stanislav Brabec wrote:
Albert Lee wrote:
Tejun Heo wrote:
Hmmm... weird. Your drive bears the same model name as Stanislav's.
I
don't think the low
Hi,
This patch removes the static prototypes from the au1xxx_ide.h, some of
them were not even implemented. Also, they caused build breakage since
they differed from the functions actually implemented in
drivers/ide/mips/au1xxx-ide.c.
Signed-off-by: Daniel Mack [EMAIL PROTECTED]
diff --git
--- Tejun Heo [EMAIL PROTECTED] wrote:
The driver is seriously broken regarding LBA48 support. The timeout
goes away if max_sectors is decreased to ATA_MAX_SECTORS - 1, doh.
Tejun,
I should have commented on this earlier. I still get occasional timeouts
regardless of the max_sectors
On Saturday 03 March 2007, Sergei Shtylyov wrote:
[PATCH] cmd64x: fix recovery time calculation
The driver wrongly takes the address setup time into account when calculating
the PIO recovery time -- this leads to slight overclocking of the PIO modes 0
and 1 (so, the prayers failed to help,
Albert Lee wrote:
This device is configured as MWDMA2:
ata2.00: ATAPI, max MWDMA2, CDB intr
ata2.00: configured for MWDMA2
The state machine should start at HSM_ST_FIRST to transfer CDB then
transit to HSM_ST_LAST after DMA is completed.
Device status 0x58 looks good for HSM_ST_FIRST,
Bob Stewart wrote:
--- Tejun Heo [EMAIL PROTECTED] wrote:
The driver is seriously broken regarding LBA48 support. The timeout
goes away if max_sectors is decreased to ATA_MAX_SECTORS - 1, doh.
Tejun,
I should have commented on this earlier. I still get occasional timeouts
regardless
Bob Stewart wrote:
--- Tejun Heo [EMAIL PROTECTED] wrote:
The driver is seriously broken regarding LBA48 support. The timeout
goes away if max_sectors is decreased to ATA_MAX_SECTORS - 1, doh. But
both the reading and writing are seriously broken. I can't tell whether
they end up in the
Jeff Garzik wrote:
Alan Cox wrote:
both the reading and writing are seriously broken. I can't tell whether
they end up in the wrong sectors or garbage is transferred to/from the
right sectors.
Does this occur regardless of which interface you use (the register
shadow or the DMA command
Bob Stewart wrote:
BTW, did you want me to load a 2.4 kernel to test the sunix driver, or did you
have something else in mind? I wasn't quite clear on what I was agreeing
to. :) I'm OK either way. I've got a spare PATA drive to put the 2.4 kernel
on if necessary, and can test with the new
On Thu, Mar 15, 2007 at 10:22:44AM -0400, Woody Suwalski wrote:
Sergei Shtylyov wrote:
I wonder is there are some W83C554 users anywhere -- that chipset
also supports UltraDMA...
MBR, Sergei
Sergei,
ARM Netwinder machines are running hard disk IDE on SL82c105.
Could you send me the
[PATCH] ide: don't allow DMA to be enabled if CONFIG_IDEDMA_{ICS,PCI}_AUTO=n
For CONFIG_IDEDMA_{ICS,PCI}_AUTO=n and/or ide=nodma option the host/device
are not programmed for DMA and it is also explicitly disabled by ide_set_dma()
(-ide_dma_check returns -1). However the code responsible for
[PATCH] ide: remove CONFIG_IDEDMA_{ICS,PCI}_AUTO config options
All modern distributions have been setting these options to y for ages.
(additionally n cases have been obsoleted for few years). Therefore use
DMA by default and remove CONFIG_IDEDMA_{ICS,PCI}_AUTO (also remove no longer
needed
On Wednesday 14 March 2007, Sergei Shtylyov wrote:
Hello, I wrote:
Bartlomiej Zolnierkiewicz wrote:
[PATCH] sl82c105: add -speedproc support
* add sl82c105_tunepio() wrapper for sl82c105_tune_drive()
(just to get the error value)
* add sl82c105_tune_chipset() (-speedproc
If you try to load both the pata_atiixp and the ahci driver
(for the same ATI SB600 adapter), very strange things happen.
The AHCI driver churns for three minutes or so, spewing
messages like this, then nothing works:
6ata3: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
4ata3.00: qc timeout
This patch fixes:
* the dependency of scc_pata on BLK_DEV_IDEDMA_PCI
* incorrect link to ide-core
* move scc_pata from ide/ppc to ide/pci
Signed-off-by: Kou Ishizaki [EMAIL PROTECTED]
Signed-off-by: Akira Iguchi [EMAIL PROTECTED]
---
diff -Nrpu -X linux-2.6.21-rc3/Documentation/dontdiff
This patch moves scc_pata from ide/ppc to ide/pci in order to
build it in normal module.
Signed-off-by: Kou Ishizaki [EMAIL PROTECTED]
Signed-off-by: Akira Iguchi [EMAIL PROTECTED]
---
diff -Nrpu -X linux-2.6.21-rc3/Documentation/dontdiff
linux-2.6.21-rc3/drivers/ide/pci/scc_pata.c
Chuck Ebbert wrote:
If you try to load both the pata_atiixp and the ahci driver
(for the same ATI SB600 adapter), very strange things happen.
The AHCI driver churns for three minutes or so, spewing
messages like this, then nothing works:
6ata3: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
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