Re: [PATCH 2.6.23-rc3] pata_pdc2027x: PLL detection fixes

2007-08-24 Thread Sergei Shtylyov
Hello. Albert Lee wrote: b) puts more work [the enter test mode stuff] in between the start and and sampling points, reducing the precision of the PLL detection; I actually observed quite noticeable differences in detected PLL frequency based on whether the start was sampled before or

Re: [PATCH 2.6.23-rc3] pata_pdc2027x: PLL detection fixes

2007-08-24 Thread Sergei Shtylyov
Hello. Jeff Garzik wrote: What have really surpried me about Promise was that they gave their SATA chip docs to Jeff who made them public and yet they continue to conceal the old PATA chip docs... :-/ They probably just need to be poked. I've been sitting on the sata_sx4 It's not

Re: [PATCH 2.6.23-rc3] pata_pdc2027x: PLL detection fixes

2007-08-24 Thread Bartlomiej Zolnierkiewicz
On Friday 24 August 2007, Sergei Shtylyov wrote: Hello. Albert Lee wrote: b) puts more work [the enter test mode stuff] in between the start and and sampling points, reducing the precision of the PLL detection; I actually observed quite noticeable differences in detected PLL

Re: [PATCH 2.6.23-rc3] pata_pdc2027x: PLL detection fixes

2007-08-24 Thread Sergei Shtylyov
Hello. Bartlomiej Zolnierkiewicz wrote: b) puts more work [the enter test mode stuff] in between the start and and sampling points, reducing the precision of the PLL detection; I actually observed quite noticeable differences in detected PLL frequency based on whether the start was sampled

Re: [PATCH 2.6.23-rc3] pata_pdc2027x: PLL detection fixes

2007-08-21 Thread Albert Lee
Sergei Shtylyov wrote: Hello. Mikael Pettersson wrote: Previously I reported that the pata_pdc2027x PLL detection changes in kernel 2.6.22 broke the driver on my PowerMac: pata_pdc2027x: Invalid PLL input clock 1691742kHz, give up! This is followed by a number of errors and speed

Re: [PATCH 2.6.23-rc3] pata_pdc2027x: PLL detection fixes

2007-08-19 Thread Sergei Shtylyov
Mikael Pettersson wrote: Previously I reported that the pata_pdc2027x PLL detection changes in kernel 2.6.22 broke the driver on my PowerMac: pata_pdc2027x: Invalid PLL input clock 1691742kHz, give up! This is followed by a number of errors and speed reduction steps on the affected ports.

Re: [PATCH 2.6.23-rc3] pata_pdc2027x: PLL detection fixes

2007-08-19 Thread Mikael Pettersson
On Sun, 19 Aug 2007 20:13:46 +0400, Sergei Shtylyov wrote: Mikael Pettersson wrote: Previously I reported that the pata_pdc2027x PLL detection changes in kernel 2.6.22 broke the driver on my PowerMac: pata_pdc2027x: Invalid PLL input clock 1691742kHz, give up! This is followed by a

Re: [PATCH 2.6.23-rc3] pata_pdc2027x: PLL detection fixes

2007-08-19 Thread Sergei Shtylyov
Hello. Mikael Pettersson wrote: Previously I reported that the pata_pdc2027x PLL detection changes in kernel 2.6.22 broke the driver on my PowerMac: pata_pdc2027x: Invalid PLL input clock 1691742kHz, give up! This is followed by a number of errors and speed reduction steps on the

Re: [PATCH 2.6.23-rc3] pata_pdc2027x: PLL detection fixes

2007-08-19 Thread Jeff Garzik
Sergei Shtylyov wrote: What have really surpried me about Promise was that they gave their SATA chip docs to Jeff who made them public and yet they continue to conceal the old PATA chip docs... :-/ They probably just need to be poked. I've been sitting on the sata_sx4 docs and cards,

[PATCH 2.6.23-rc3] pata_pdc2027x: PLL detection fixes

2007-08-18 Thread Mikael Pettersson
Previously I reported that the pata_pdc2027x PLL detection changes in kernel 2.6.22 broke the driver on my PowerMac: pata_pdc2027x: Invalid PLL input clock 1691742kHz, give up! This is followed by a number of errors and speed reduction steps on the affected ports. There are two bugs in

Re: [PATCH 2.6.23-rc3] pata_pdc2027x: PLL detection fixes

2007-08-18 Thread Jeff Garzik
Mikael Pettersson wrote: Previously I reported that the pata_pdc2027x PLL detection changes in kernel 2.6.22 broke the driver on my PowerMac: pata_pdc2027x: Invalid PLL input clock 1691742kHz, give up! This is followed by a number of errors and speed reduction steps on the affected ports.

Re: [PATCH 2.6.23-rc3] pata_pdc2027x: PLL detection fixes

2007-08-18 Thread Albert Lee
Mikael Pettersson wrote: Previously I reported that the pata_pdc2027x PLL detection changes in kernel 2.6.22 broke the driver on my PowerMac: pata_pdc2027x: Invalid PLL input clock 1691742kHz, give up! This is followed by a number of errors and speed reduction steps on the affected

Re: [PATCH 2.6.23-rc3] pata_pdc2027x: PLL detection fixes

2007-08-18 Thread Albert Lee
Jeff Garzik wrote: Mikael Pettersson wrote: Previously I reported that the pata_pdc2027x PLL detection changes in kernel 2.6.22 broke the driver on my PowerMac: pata_pdc2027x: Invalid PLL input clock 1691742kHz, give up! This is followed by a number of errors and speed reduction steps

Re: [PATCH 2.6.23-rc3] pata_pdc2027x: PLL detection fixes

2007-08-18 Thread Jeff Garzik
Albert Lee wrote: The first rmb() is to make sure bccrl is read before bccrlv for later (bccrl = bccrlv) check since both reading the same memory address. That's already guaranteed without the rmb(), AFAICS. Jeff - To unsubscribe from this list: send the line unsubscribe linux-ide

Re: [PATCH 2.6.23-rc3] pata_pdc2027x: PLL detection fixes

2007-08-18 Thread Albert Lee
Jeff Garzik wrote: Albert Lee wrote: The first rmb() is to make sure bccrl is read before bccrlv for later (bccrl = bccrlv) check since both reading the same memory address. That's already guaranteed without the rmb(), AFAICS. Hmm, thanks for the advice. Will remove both rmb()s. Will