Hello Viresh,
On Thu, May 22, 2014 at 11:07:25AM +0530, Viresh Kumar wrote:
> cpufreq-cpu0 uses thermal framework to register a cooling device, but doesn't
> depend on it as there are dummy calls provided by thermal layer when
> CONFIG_THERMAL=n. So, we don't really need to mention thermal as a de
On Thu, 22 May 2014 11:24:23 +0200 Vlastimil Babka wrote:
> > In a test running dd onto tmpfs the overhead of the pageblock-related
> > functions went from 1.27% in profiles to 0.5%.
> >
> > Signed-off-by: Mel Gorman
> > Acked-by: Vlastimil Babka
>
> Hi, I've tested if this closes the race I'
On 05/22/2014 09:03 PM, Sergei Shtylyov wrote:
Hello.
On 05/22/2014 08:44 PM, Ivan Khoronzhuk wrote:
This node is intended to allow SoC reset in case of software reset
or appropriate watchdogs.
The Keystone SoCs can contain up to 4 watchdog timers to reset
SoC. Each watchdog timer event in
Hello Sören,
On Thu, May 22, 2014 at 11:03:00AM -0700, Sören Brinkmann wrote:
> On Wed, 2014-05-21 at 01:33PM -0700, Mike Turquette wrote:
> > Quoting Uwe Kleine-König (2014-05-21 11:23:08)
> > > Hello Sören,
> > >
> > > On Wed, May 21, 2014 at 08:58:10AM -0700, Sören Brinkmann wrote:
> > > > On
On Thu, May 22, 2014 at 11:50:55AM -0600, Stephen Warren wrote:
> I think we should nail down exactly what set_sysclk() means. Since it
> takes an explicit MCLK clock rate (rather than e.g. sample rate) right
> now, surely it's a notification of what the clock /is/, not a request
> for the CODEC t
On Thu, May 22, 2014 at 05:47:26PM +0100, Will Deacon wrote:
> write{b,w,l,q}_relaxed are implemented by some architectures in order to
> permit memory-mapped I/O accesses with weaker barrier semantics than the
> non-relaxed variants.
>
> This patch adds dummy macros for the write accessors to spa
On 05/22/2014 09:47 AM, Will Deacon wrote:
> write{b,w,l,q}_relaxed are implemented by some architectures in order to
> permit memory-mapped I/O writes with weaker barrier semantics than the
> non-relaxed variants.
>
> This patch implements these write macros for Alpha, in the same vein as
> the r
"white" is misspelled in the subject line. I mentioned this before.
On Thu, May 22, 2014 at 12:02 PM, Zhang Rui wrote:
> ACPI can be used to enumerate PNP devices, but the code does not
> handle this in a good manner.
> ...
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On Thu, 22 May 2014, Will Deacon wrote:
> > Anyway, there are two possible ways of handling this. One is to avoid
> > changing the error code to -EBUSY when the device in question is a root
> > hub. Just let it go into a runtime-PM error state; it won't matter
> > since the controller doesn't
Le 22/05/2014 17:28, Arnd Bergmann a écrit :
> On Thursday 22 May 2014 17:09:56 LABBE Corentin wrote:
>> Signed-off-by: LABBE Corentin
>> ---
>> drivers/crypto/Kconfig| 49 ++
>> drivers/crypto/Makefile |1 +
>> drivers/crypto/sunxi-ss.c | 1476
>>
Hello Emil,
On Thu, May 22, 2014 at 07:51:19PM +0200, Emil Goode wrote:
> We forgot to free pdev->dev.dma_mask on error after
> having called the imx_alloc_mx3_camera function.
> This patch introduces the imx_free_mx3_camera function
> that adds the missing kfree call and is practical for
> future
The calculation of the bit rate divider used a standard C division, which
rounds down the quotient. This may lead to a higher bitrate than requested.
Round up to avoid this.
E.g. on Koelsch, the SPI flash (configured for 30 MHz) was driven at 48.75
MHz. After this patch it's driven at a safe 24.37
The acpi pnp scan handler id list just copies all the ids from all the
struct pnp_device_id instances, but some of them do not
comply with the ACPI PNP id rule (3 Alpha Charactors + 4 Hex numbers).
For those ids, the coressponding devices will never be enumerated
via ACPI, so it is safe to remove
>From: Lee Jones
>
>First introduction of the driver. Includes the basic device struct
>(some functionality isn't utilised as of yet) and supplies some of the
>important resources required for basic running of the Controller.
>
>Signed-off-by: Lee Jones
>---
>--- /dev/null
>+++ b/drivers/mtd/nand/
>From: linux-mtd [mailto:linux-mtd-boun...@lists.infradead.org] On Behalf Of
>Lee Jones
>
>This is where we describe the different new and generic options used by
>the ST BCH driver.
>
>Cc: devicet...@vger.kernel.org
>Signed-off-by: Lee Jones
>---
> Documentation/devicetree/bindings/mtd/stm-nand.
On Wed, 2014-05-21 at 01:33PM -0700, Mike Turquette wrote:
> Quoting Uwe Kleine-König (2014-05-21 11:23:08)
> > Hello Sören,
> >
> > On Wed, May 21, 2014 at 08:58:10AM -0700, Sören Brinkmann wrote:
> > > On Wed, 2014-05-21 at 09:34AM +0200, Uwe Kleine-König wrote:
> > > > On Tue, May 20, 2014 at 0
The "serial" pnp driver supports some unknown PNP modems (PNPCXXX/PNPDXXX)
by matching magic strings in the pnp device name or the pnp device card name.
ACPI enumerated PNP device neither supports pnp card, nor supports those magic
strings in its device name, which means this mechamism never works
The new ACPI device enumeration mechanism, which will be introduced
in a later patch, will enumerate the _HID devices w/o any scan
handler attached to platform bus.
This means that, for the devices that are attached to a configurable
scan handler, we should make sure no platform devices would be
cr
Only certain kind of ACPI device objects can be enumerated to platform bus.
These ACPI device objects include
1. ACPI device objects that have _HID control method.
2. some ACPI device objects that have Linux specified HID strings.
In order to distinguish those device objects from the others, a new
Because of the growing demand for enumerating ACPI devices to
platform bus, this patch changes the code to enumerate ACPI
devices to platform bus by default, if the device
1. has _HID.
2. does not have a scan handler attached.
3. is not SPB slave device, which should be enumerated by its parent.
S
For ACPI PIC (PNP), Timer (PNP0100) and DMA controller (PNP0200)
device objects, although they have _HID control method, but they
should not be enumerated to platform bus, because there will never be
any platform drivers for them.
Thus an exclude id list is introduced in this patch to prevent
The new ACPI device enumeration mechanism, which will be introduced
in a later patch, will enumerate the _HID devices w/o any scan
handler attached to platform bus.
This means that, for the devices that are attached to a configurable
scan handler, we should make sure no platform devices would be
cr
The new ACPI device enumeration mechanism, which will be introduced
in a later patch, will enumerate the _HID devices w/o any scan
handler attached to platform bus.
This means that, for the devices that are attached to a configurable
scan handler, we should make sure no platform devices would be
cr
ACPI can be used to enumerate PNP devices, but the code does not
handle this in a good manner.
Currently, if an ACPI device
1. has _CRS method,
2. has an identifications of
"three capital charactors followed by four hex numbers",
3. is not in the excluded id list,
it is enumerated to PNP bus.
Devices that can be attached to scan handlers, are kind of different from
the others, because they are known that some special actions should be taken.
But we do not mark this difference when the configurable scan handlers
are compiled out. This is harmless currently, but it will be when
we want t
Hello.
On 05/22/2014 08:44 PM, Ivan Khoronzhuk wrote:
This node is intended to allow SoC reset in case of software reset
or appropriate watchdogs.
The Keystone SoCs can contain up to 4 watchdog timers to reset
SoC. Each watchdog timer event input is connected to the Reset Mux
block. The Rese
Hi, all,
Currently, PNP bus is used as the default bus for for enumerating ACPI
devices with _HID/_CID.
For a device that needs to be enumerated to platform bus, we need to add
its id string to the platform scan handler white list explicitly.
This becomes a problem as more and more _HID devices n
Currently, ACPI scan handler uses strcmp() to match device ids
and scan handler ids.
When converting PNPACPI enumeration into a scan handler, which I will do
later in this patch set, the current code becomes not flexible enough
because ACPI pnp scan handler requires wildcase and case insensitive s
From: Laurent Pinchart
The MSTP[SC]R registers have clock stop bits, not clock enable bits. The
bit value should thus be inverted in the is_enabled() operation.
Signed-off-by: Laurent Pinchart
Signed-off-by: Geert Uytterhoeven
Cc: Mike Turquette
---
v3:
- This depends on commit 3c90c55dcde7
On Thu, May 22, 2014 at 12:54:58PM -0300, Flavio Leitner wrote:
> On Thu, May 22, 2014 at 08:10:48AM -0700, Guenter Roeck wrote:
> > On Wed, May 21, 2014 at 11:19:28PM -0300, Flavio Leitner wrote:
> > > From: Flavio Leitner
> > >
> > > It is possible to increase left fan speed on a
> > > DELL Pre
Suggested-By: Vyacheslav Dubeyko
Cc: Vyacheslav Dubeyko
Cc: Andrew Morton
Signed-off-by: Fabian Frederick
---
fs/hfsplus/extents.c | 7 +++
fs/hfsplus/super.c | 3 ++-
fs/hfsplus/xattr.c | 2 +-
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/fs/hfsplus/extents.c b/fs/h
On Thu, May 22, 2014 at 09:19:40AM -0700, Francesco Ruggeri wrote:
> Aborting a search does not sound like a correct solution.
> How does a higher level user (eg for_each_pci_dev) know that a search
> was aborted and decide whether it should try again, assuming it would
> be ok repeating the action
On Wed, May 21, 2014 at 5:38 PM, Borislav Petkov wrote:
> On Wed, May 21, 2014 at 05:18:17PM -0600, Bjorn Helgaas wrote:
>> ECS is an AMD mechanism that allows access to extended PCI config space
>> (offsets 256-4096) via I/O ports CF8/CFCh. We normally use ECAM, i.e.,
>> MMCONFIG, to access that
To be future-proof and for better readability the time comparisons are modified
to use time_before_eq() instead of plain, error-prone math.
Signed-off-by: Manuel Schölling
---
drivers/net/ethernet/micrel/ksz884x.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net
On 05/22/2014 11:34 AM, Mark Brown wrote:
> On Thu, May 22, 2014 at 09:51:38AM -0600, Stephen Warren wrote:
>> On 05/22/2014 03:17 AM, Tushar Behera wrote:
>
>>> + if (!IS_ERR(max98090->mclk)) {
>>> + freq = clk_round_rate(max98090->mclk, freq);
>>> + clk_set_rate(max98090->m
We forgot to free pdev->dev.dma_mask on error after
having called the imx_alloc_mx3_camera function.
This patch introduces the imx_free_mx3_camera function
that adds the missing kfree call and is practical for
future usage with imx_alloc_mx3_camera().
Signed-off-by: Emil Goode
---
arch/arm/mach-
On Thu, 22 May 2014 09:46:43 +0100 Mel Gorman wrote:
> > > If I'm still on track here, what happens if we switch to wake-all so we
> > > can avoid the dangling flag? I doubt if there are many collisions on
> > > that hash table?
> >
> > Wake-all will be ugly and loose a herd of waiters, all rac
To be future-proof and for better readability the time comparisons are modified
to use time_after() instead of plain, error-prone math.
Signed-off-by: Manuel Schölling
---
kernel/sched/fair.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/sched/fair.c b/kernel/sche
Fix some checkpatch warnings:
WARNING: EXPORT_SYMBOL(foo); should immediately follow its function/variable
Cc: Pablo Neira
Cc: Andrew Morton
Signed-off-by: Fabian Frederick
---
lib/nlattr.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/lib/nlattr.c b/lib
Hi Alan,
On Thu, May 22, 2014 at 04:02:06PM +0100, Alan Stern wrote:
> On Thu, 22 May 2014, Will Deacon wrote:
> > Consequently, I see a kworker thread on each CPU consuming a significant
> > amount of the system resources. Worse, if I enable something like kmemleak
> > (which adds more work to th
On Thu, May 22, 2014 at 07:47:35AM +0900, Linus Torvalds wrote:
> Due to travels and related lack of internet access, the rc releases
> haven't been following the normal Sunday release cycle, and since I
> caught up with what happened while I was off-line, rather than wait
> until next Sunday to re
Small typo and @return: -> Returns ...
Cc: Duan Jiong
Cc: Andrew Morton
Signed-off-by: Fabian Frederick
---
lib/digsig.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/lib/digsig.c b/lib/digsig.c
index 8793aed..ae05ea3 100644
--- a/lib/digsig.c
+++ b/lib/digsig.c
@@ -
devm_request_and_ioremap was the only function to use device
instead of dev(this fixes kernel-doc warning).
Also fix some checkpatch warnings.
Cc: Greg Kroah-Hartman
Cc: Andrew Morton
Signed-off-by: Fabian Frederick
---
lib/devres.c | 11 +--
1 file changed, 5 insertions(+), 6 deletio
Arnd, Olof, Kevin,
Two more fixes for AT91 dealing with iio ADC triggers on
at91sam9260/at91sam9g20. These fixes are not critical as the option is not
widely used. But as they are pretty tiny, it might be interesting to include
them now.
Thanks, best regards,
The following changes since commit 3
On Thu, May 22, 2014 at 09:51:38AM -0600, Stephen Warren wrote:
> On 05/22/2014 03:17 AM, Tushar Behera wrote:
> > + if (!IS_ERR(max98090->mclk)) {
> > + freq = clk_round_rate(max98090->mclk, freq);
> > + clk_set_rate(max98090->mclk, freq);
> > + }
> What are the intended
Hello.
On 05/22/2014 02:02 AM, Florian Fainelli wrote:
of_phy_connect_fixed_link() is becoming obsolete, and also required
platform code to register the fixed PHYs at the specified addresses for
those to be usable. Get rid of it and use the new of_phy_is_fixed_link()
plus of_phy_register_fixed_
On Thu, 2014-05-22 at 10:09 +0100, Mel Gorman wrote:
> This series is aimed at regressions noticed during reclaim activity. The
> first two patches are shrinker patches that were posted ages ago but never
> merged for reasons that are unclear to me. I'm posting them again to see if
> there was a re
On 05/22/14 09:24, Georgi Djakov wrote:
> diff --git a/drivers/clk/qcom/gcc-msm8974.c b/drivers/clk/qcom/gcc-msm8974.c
> index 58cb2f5..c2a8d77 100644
> --- a/drivers/clk/qcom/gcc-msm8974.c
> +++ b/drivers/clk/qcom/gcc-msm8974.c
> @@ -204,6 +204,12 @@ static const struct freq_tbl
> ftbl_gcc_blsp1_
On Thu, 22 May 2014, Ivan Khoronzhuk wrote:
> The Keystone II devices have a set of registers that are used to control
> the status of its peripherals. This node is intended to allow access to
> this functionality.
>
> Reviewed-by: Arnd Bergmann
> Signed-off-by: Ivan Khoronzhuk
> ---
> .../dev
On 05/22/2014 08:11 PM, Lee Jones wrote:
On Thu, 22 May 2014, Ivan Khoronzhuk wrote:
The Keystone II devices have a set of registers that are used to control
the status of its peripherals. This node is intended to allow access to
this functionality.
Reviewed-by: Arnd Bergmann
Signed-off-by:
On 05/22/2014 09:47 AM, Will Deacon wrote:
> write{b,w,l,q}_relaxed are implemented by some architectures in order to
> permit memory-mapped I/O accesses with weaker barrier semantics than the
> non-relaxed variants.
>
> This patch adds dummy macros for the read and write accessors to x86,
> which
Cody Schafer already fixed binary file creation for attribute groups, see [1].
This patch makes the appropriate changes for binary file removal
of attribute groups.
[1]: http://lkml.org/lkml/2014/2/27/832
Signed-off-by: Robert ABEL
---
fs/sysfs/group.c | 10 +-
1 file changed, 5 insertio
I sent this patch to the list on 15 Apr 14.
However, no activity since. Should I have sent this patch somewhere else?
Regards,
Robert
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Jiri Olsa [jo...@redhat.com] wrote:
|
| yep, that sounds more clear to me.. something like below?
|
| calling callchain_dup from within arch_adjust_callchain in case
| you want to change it and returning != 0 in this case, so
| we could free the new callchain
Agree.
|
| but it might be to much
On 05/22/2014 09:41 AM, Davidlohr Bueso wrote:
> From: Davidlohr Bueso
>
> Our mutexes have gone a long ways since the original implementation
> back in 2005/2006. However, the mutex-design.txt document is still
> stuck in the past, to the point where most of the information there
> is practicall
On Thu, May 22, 2014 at 10:52:06AM -0600, Jake Edge wrote:
> On Wed, 21 May 2014 01:52:17 +0400 Anton Saraev wrote:
> > On Tue, May 20, 2014 at 10:24:11AM -0600, Jake Edge wrote:
> > > On Tue, 20 May 2014 10:47:57 -0400 Jason Cooper wrote:
> > >
> > > but some kind of tests are needed to ensure not
Changelog since v7
o Further optimisation when PG_waiters is not available (peterz)
o Catch all opportunities to ClearPageWaiters (peterz)
Changelog since v6
o Optimisation when PG_waiters is not available (peterz)
o Documentation
Changelog since v5
o __always_inline where appro
Update the fixed-link Device Tree binding documentation to contain
information about the old and deprecated 5-digit 'fixed-link' property.
Signed-off-by: Florian Fainelli
---
Changes in v2:
- fixed typos and spelling mistakes as spotted by Sergei
Documentation/devicetree/bindings/net/fixed-link
write{b,w,l,q}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.
This patch adds dummy macros for the write accessors to parisc, in the
same vein as the dummy definitions for the relaxed read acc
These are now defined by asm-generic/io.h, so we don't need the private
definitions anymore.
Cc: Heiko Carstens
Cc: Martin Schwidefsky
Signed-off-by: Will Deacon
---
arch/s390/include/asm/io.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/s390/include/asm/io.h b/arch/s390/includ
These are now defined by asm-generic/io.h, so we don't need the private
definitions anymore.
Acked-by: Michal Simek
Signed-off-by: Will Deacon
---
arch/microblaze/include/asm/io.h | 8
1 file changed, 8 deletions(-)
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/inclu
On Wed, May 21, 2014 at 8:09 PM, Jet Chen wrote:
> [0.02] Security Framework initialized
> [0.02] AppArmor: AppArmor initialized
> [0.02] Kernel panic - not syncing: Could not register MntRestrict
> security module
This was originally "by design", but I've changed it to ch
{read,write}{b,w,l,q}_relaxed are implemented by some architectures in
order to permit memory-mapped I/O accesses with weaker barrier semantics
than the non-relaxed variants.
This patch adds wrappers to asm-generic so that drivers can rely on the
relaxed accessors being available, even if they don
On Thu, May 22, 2014 at 12:49 AM, Sebastian Ott
wrote:
> Hello,
>
> On Thu, 22 May 2014, Stephen Rothwell wrote:
>> Hi Bjorn,
>>
>> After merging the pci tree, today's linux-next build (arm
>> multi_v7_defconfig) failed like this:
>>
>> drivers/pci/pci-sysfs.c: In function 'devspec_show':
>> drive
Hi all,
This patch set removes of_phy_connect_fixed_link() from the tree now that
we have a better solution for dealing with fixed PHY (emulated PHY) devices
for drivers that require them.
First two patches update the 'fixed-link' Device Tree binding and drivers to
refere to it.
Patches 3 to 7 u
These are now defined by asm-generic/io.h, so we don't need the private
definitions anymore.
Cc: Chris Zankel
Cc: Max Filippov
Signed-off-by: Will Deacon
---
arch/xtensa/include/asm/io.h | 7 ---
1 file changed, 7 deletions(-)
diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/includ
of_phy_connect_fixed_link() is becoming obsolete, and also required
platform code to register the fixed PHYs at the specified addresses for
those to be usable. Get rid of it and use the new of_phy_is_fixed_link()
plus of_phy_register_fixed_link() helpers to transition over the new
scheme.
Signed-o
write{b,w,l}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.
This patch adds dummy macros for the write accessors to mn10300, in the
same vein as the dummy definitions for the relaxed read acce
Hi all,
This is version 2 of the series I originally posted here:
https://lkml.org/lkml/2014/4/17/269
Changes since v1 include:
- Added relevant acks from arch maintainers
- Fixed potential compiler re-ordering issue for x86 definitions
I'd *really* appreciate some feedback on the proposed
write{b,w,l,q}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.
This patch adds dummy macros for the write accessors to sparc, in the
same vein as the dummy definitions for the relaxed read acce
Update the Freescale TSEC PHY, Broadcom GENET & SYSTEMPORT Device Tree
binding documentation to refer to the fixed-link Device Tree binding in
fixed-link.txt.
Reviewed-by: Thomas Petazzoni
Signed-off-by: Florian Fainelli
---
No changes in v2
Documentation/devicetree/bindings/net/broadcom-bcmge
write{b,w,l}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.
This patch adds dummy macros for the write accessors to m32r, in the
same vein as the dummy definitions for the relaxed read accesso
write{b,w,l}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.
This patch adds dummy macros for the write accessors to frv, in the same
vein as the dummy definitions for the relaxed read accessor
of_phy_connect_fixed_link() is becoming obsolete, and also required
platform code to register the fixed PHYs at the specified addresses for
those to be usable. Get rid of it and use the new of_phy_is_fixed_link()
plus of_phy_register_fixed_link() helpers to transition over the new
scheme.
Signed-o
This patch extends the paragraph describing the relaxed read io accessors
so that the relaxed accessors are defined to be:
- Ordered with respect to each other if accessing the same peripheral
- Unordered with respect to normal memory accesses
- Unordered with respect to LOCK/UNLOCK operation
write{b,w,l,q}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.
This patch adds dummy macros for the write accessors to ia64, which may
be able to be optimised in a similar manner to the relaxed
of_phy_connect_fixed_link() is becoming obsolete, and also required
platform code to register the fixed PHYs at the specified addresses for
those to be usable. Get rid of it and use the new of_phy_is_fixed_link()
plus of_phy_register_fixed_link() helpers to transition over the new
scheme.
Signed-o
write{b,w,l}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.
This patch adds dummy macros for the write accessors to m68k, in the
same vein as the dummy definitions for the relaxed read accesso
On Wed, 21 May 2014 01:52:17 +0400 Anton Saraev wrote:
> On Tue, May 20, 2014 at 10:24:11AM -0600, Jake Edge wrote:
> > On Tue, 20 May 2014 10:47:57 -0400 Jason Cooper wrote:
> >
> > but some kind of tests are needed to ensure nothing breaks before
> > digging into that ...
>
> I have some test: s
Now that no architectures using asm-generic/io.h define their own relaxed
accessors, the dummy definitions can be used unconditionally.
Cc: Arnd Bergmann
Signed-off-by: Will Deacon
---
include/asm-generic/io.h | 16
1 file changed, 16 deletions(-)
diff --git a/include/asm-gene
write{b,w,l,q}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.
This patch adds dummy macros for the write accessors to powerpc, in the
same vein as the dummy definitions for the relaxed read ac
of_phy_connect_fixed_link() is becoming obsolete, and also required
platform code to register the fixed PHYs at the specified addresses for
those to be usable. Get rid of it and use the new of_phy_is_fixed_link()
plus of_phy_register_fixed_link() helpers to transition over the new
scheme.
Signed-o
of_phy_connect_fixed_link() is becoming obsolete, and also required
platform code to register the fixed PHYs at the specified addresses for
those to be usable. Get rid of it and use the new of_phy_is_fixed_link()
plus of_phy_register_fixed_link() helpers to transition over the new
scheme.
Signed-o
> This platform driver adds initial support for the SDHCI host controller
> found on STMicroelectronics SoCs.
>
> It has been tested on STiH41x b2020 platforms currently.
>
> Signed-off-by: Peter Griffin
> Signed-off-by: Giuseppe Cavallaro
> ---
> drivers/mmc/host/Kconfig| 12 +++
> driv
write{b,w,l,q}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.
This patch adds dummy macros for the read and write accessors to x86,
which simply expand to the non-relaxed variants. Note that t
write{b,w,l}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.
This patch adds dummy macros for the write accessors to Cris, in the same
vein as the dummy definitions for the relaxed read accesso
write{b,w,l,q}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O writes with weaker barrier semantics than the
non-relaxed variants.
This patch implements these write macros for Alpha, in the same vein as
the relaxed read macros, which are already implemented.
Cc:
All in-tree drivers have been converted to use the new pair of
functions: of_is_fixed_phy_link() plus of_phy_register_fixed_link(), we
can now safely remove of_phy_connect_fixed_link.
Signed-off-by: Florian Fainelli
---
No changes in v2
drivers/of/of_mdio.c| 38 -
write{b,w,l,q}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.
This patch adds dummy macros for the write accessors to tile, in the
same vein as the dummy definitions for the relaxed read acces
Parsing and registration of fixed PHY devices was needed with the use of
of_phy_connect_fixed_link() because this function was using the
designated PHY address identifier (first cell of the property) as the
address to bind the PHY on the emulated bus.
Since commit 3be2a49e5c08d268f8af0dd4fe89a24ea
Paul Bolle writes:
> Do you want to know how to test this patch on a 32 bit powermac? Ie, see
> if it has any effect, and whether that effect improves things or make
> things worse.
Yes.
Andreas.
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D
This node is intended to allow SoC reset in case of software reset
or appropriate watchdogs.
The Keystone SoCs can contain up to 4 watchdog timers to reset
SoC. Each watchdog timer event input is connected to the Reset Mux
block. The Reset Mux block can be configured to cause reset or not.
Additi
The main pll controller used to drive theC66x CorePacs, the switch fabric,
and a majority of the peripheral clocks (all but the ARM CorePacs, DDR3 and
the NETCP modules) requires a PLL Controller to manage the various clock
divisions, gating, and synchronization.
Reviewed-by: Arnd Bergmann
Signed
The pll controller register set and device state control registers
include sets of registers with different purposes, so it's logically
to add syscon entry to be able to access them from appropriate places.
So added pll controller and device state control syscon entries.
The keystone driver requi
Enable reset driver support in order to have opportunity
to reboot SoC by watchdog and by software.
Reviewed-by: Arnd Bergmann
Signed-off-by: Ivan Khoronzhuk
---
arch/arm/configs/keystone_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/configs/keystone_defconfig
b/arc
The Keystone II devices have a set of registers that are used to control
the status of its peripherals. This node is intended to allow access to
this functionality.
Reviewed-by: Arnd Bergmann
Signed-off-by: Ivan Khoronzhuk
---
.../devicetree/bindings/mfd/ti-keystone-devctrl.txt | 19 +
The keystone SoC can be rebooted in several ways. By external reset
pin, by soft and by watchdogs. To allow keystone SoC reset if
watchdog is triggered we have to enable it in reset mux configuration
register regarding of watchdog configuration. Also we need to set
soft/hard reset we are going to u
Remove reset stuff in flavour of using keystone reset driver:
driver/power/reset/keystone-reset.c
Reviewed-by: Arnd Bergmann
Signed-off-by: Ivan Khoronzhuk
---
arch/arm/mach-keystone/keystone.c | 34 --
1 file changed, 34 deletions(-)
diff --git a/arch/arm/mach-
On Thu, 2014-05-22 at 17:08 +0100, Lee Jones wrote:
> To be frank, I've never known what the double const means. Care to
> enlighten?
There's a nice table here:
http://stackoverflow.com/questions/14562845/why-does-passing-char-as-const-char-generate-a-warning
--
To unsubscribe from this list:
These patches introduce keystone reset driver.
The keystone SoC can be rebooted in several ways. By external reset
pin, by soft and by watchdogs. This driver allows software reset and reset
by one of the watchdogs. Also added opportunity to set soft/hard reset type.
Based on linux-next/master
v6
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