On Wed, May 28, 2014 at 03:37:04PM -0700, Andrew Morton wrote:
On Wed, 28 May 2014 11:01:53 +0200 Heiko Carstens heiko.carst...@de.ibm.com
wrote:
With this patch it should not happen anymore that reading /proc/stat
fails because of a failing high order memory allocation.
So this deletes
On Fri, May 30, 2014 at 11:11:20AM +0900, Namhyung Kim wrote:
Hi Jiri,
On Thu, 29 May 2014 10:37:32 +0200, Jiri Olsa wrote:
On Thu, May 29, 2014 at 09:06:05AM +0900, Namhyung Kim wrote:
On Tue, 27 May 2014 09:54:36 +0200, Jiri Olsa wrote:
On Tue, May 27, 2014 at 10:36:44AM +0900,
On 05/30/2014 04:15 AM, Waiman Long wrote:
On 05/28/2014 08:16 AM, Raghavendra K T wrote:
- we need an intelligent way to nullify the effect of batching for
baremetal
(because extra cmpxchg is not required).
To do this, you will need to have 2 slightly different algorithms
depending on the
On Tue, May 27, 2014 at 12:26:44PM -0700, eric.er...@linux.intel.com wrote:
From: Eric Ernst eric.er...@linux.intel.com
For Baytrail, you should never set a GPIO set to direct_irq
to output mode. When direct_irq_en is set for a GPIO, it is
tied directly to an APIC internally, and making the
J. R. Okajima hooanon...@gmail.com wrote:
I've found some interesting cases.
- impermissible.test,
open_file_as_bin -t -w $file -E EACCES
When $termslash is /, a '/' is appended to the expanded $file, such
as /path/fileA/. If fileA is a regular file, that path is obviously
On Thu, May 29, 2014 at 07:27:34PM -0700, Greg Kroah-Hartman wrote:
On Wed, May 28, 2014 at 09:59:45AM +0200, Johan Hovold wrote:
[ +CC: Greg, Doug, Stratos, Yuyang ]
On Wed, May 21, 2014 at 11:00:51AM +0200, Johan Hovold wrote:
On Wed, May 07, 2014 at 07:10:49AM -0700, Dirk Brandewie
On Fri, May 30, 2014 at 3:30 AM, Stephen Boyd sb...@codeaurora.org wrote:
Hm... that doesn't sound right. Please see this thread on lkml[1], and
also this video from Ben H.[2]
But Benji is talking about the *PCI BUS*, and this is raw register
access. He just says that This is how a BE CPU is
On 2014/5/30 16:08, Lee Jones wrote:
+static int intel_soc_pmic_find_gpio_irq(struct device *dev)
+{
+ struct gpio_desc *desc;
+ int irq;
+
+ desc = devm_gpiod_get_index(dev, KBUILD_MODNAME, 0);
What does KBUILD_MODNAME translate to?
It translates into intel_soc_pmic.
Can you
From: Thierry Reding tred...@nvidia.com
Commit febdbfe8a91c (arch: Prepare for smp_mb__{before,after}_atomic())
deprecated the smp_mb__{before,after}_{atomic,clear}_{dec,inc,bit}*()
functions in favour of the unified smp_mb__{before,after}_atomic().
While at it, convert the
David Howells dhowe...@redhat.com wrote:
I'll have to address the termslash alterations at some point.
Okay. Done and pushed.
David
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David Howells:
Does readlink(2) return /u/fileA instead of /ro/fileA?
No.
The test suite sets the lower symlink to point to the union path for its
target.
[root@andromeda union-testsuite]# readlink /lower/a/indirect_dir_sym100
/mnt/a/direct_dir_sym100
Now I've found your latest
-Original Message-
From: Alex Williamson [mailto:alex.william...@redhat.com]
Sent: Friday, May 23, 2014 4:39 AM
To: linux-...@vger.kernel.org; io...@lists.linux-foundation.org
Cc: linux-kernel@vger.kernel.org; aco...@gmail.com; li...@horizon.com;
bhelg...@google.com; Sethi
Hi Shijie
After apply this patch into our kernel,
We are facing data hang issue when sending big size file (2M used in test) to
uart port
Note: Rx port is also keep receiving data.
After read the implementation of uart_stop(),
I feel like, stop_tx() is used to perform flow control when like a
+static const struct i2c_device_id intel_soc_pmic_i2c_id[] = {
+{INT33FD:00, (kernel_ulong_t)intel_soc_pmic_config_crc},
+{ }
+};
+MODULE_DEVICE_TABLE(i2c, intel_soc_pmic_i2c_id);
+
+static struct acpi_device_id intel_soc_pmic_acpi_match[] = {
+{INT33FD,
Update the default value to match the patch.
Signed-off-by: Richard Fitzgerald r...@opensource.wolfsonmicro.com
---
drivers/mfd/wm5102-tables.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
Applied, thanks.
diff --git a/drivers/mfd/wm5102-tables.c
Am 29.05.2014 08:17, schrieb Artem Bityutskiy:
On Wed, 2014-05-28 at 23:09 +0200, Alexander Holler wrote:
I'm very sorry, but I find such discussions extremly tiresome.
Why discussing then at all, just go ahead and to something else.
Agreed. In order to maintain psychical health it's better
On 28 May 2014 15:46, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
This patch adds ddrmode mask to variant structure giving more flexibility
to the driver to support more SOCs which have different datactrl register
layout.
Without this
On Fri, May 30, 2014 at 10:41:39AM +0900, Chanwoo Choi wrote:
This patch set the parent device of extcon device using first parameter of
devm_extco_dev_allocate() to remove duplicate code on all of extcon provider
drivers.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Reported-by:
Hi!
This is my latest task of the eudyptula challenge.
Just a very small patch!
Signed-off-by: Federico Di Pierro nierr...@gmail.com
--- xillybus_of.c 2014-05-30 11:27:18.160063074 +0200
+++ /home/federico/xillybus_of.c 2014-05-30 11:27:10.030063570 +0200
@@ -69,7 +69,6 @@
int
This is the traditional way of obtaining a device driver's register
address space. The aim of this driver is to supply controller specific
information to the ST Thermal Core.
Signed-off-by: Ajit Pal Singh ajitpal.si...@st.com
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
This patchset adds full support for 2 types of Thermal Controllers
produced by STMicroelectronics. One is a more traditional memory
mapped variant, the other is controlled solely by system configuration
registers.
Documentation/devicetree/bindings/thermal/st-thermal.txt | 42
On 05/29/2014 06:43 AM, Namhyung Kim wrote:
But this requires a change in generation time as I faced a type error
when try to print an array argument as number. I'll post a separate
patch for this.
Thank you.
Thanks,
Namhyung
Sebastian
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To unsubscribe from this list: send the line
This core is shared by both ST's 'memory mapped' and
'system configuration register' based Thermal controllers.
Signed-off-by: Ajit Pal Singh ajitpal.si...@st.com
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
drivers/thermal/Kconfig | 5 +
drivers/thermal/Makefile| 1 +
Signed-off-by: Ajit Pal Singh ajitpal.si...@st.com
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
arch/arm/configs/multi_v7_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index d4e8a47..dcc4e3e 100644
We supply two of these. The first is controlled by the System Configuration
registers and the second one provided is a more traditional 'memory mapped'
variant. Each are handled by they own sub-driver.
Signed-off-by: Ajit Pal Singh ajitpal.si...@st.com
Signed-off-by: Lee Jones
Supply controller specific information to the ST Thermal Core.
Signed-off-by: Ajit Pal Singh ajitpal.si...@st.com
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
drivers/thermal/st/Kconfig | 4 +
drivers/thermal/st/Makefile| 1 +
On 28 May 2014 15:46, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
This patch adds a fake Qualcomm ID 0x00051180 to the amba_ids, as Qualcomm
SDCC controller is pl180, but amba id registers read 0x0's.
The plan is to remove SDCC driver
Signed-off-by: Ajit Pal Singh ajitpal.si...@st.com
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
.../devicetree/bindings/thermal/st-thermal.txt | 42 ++
1 file changed, 42 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/st-thermal.txt
diff
Hi Ming,
On 29.05.2014 00:59, Ming Lei wrote:
On Wed, May 28, 2014 at 11:42 PM, Ming Lei tom.leim...@gmail.com wrote:
Would you mind explaining why bi_iter.bi_size need to be
decreased by 'len'? In the failure path, it wasn't added by
'len', was it?
Actually, the correct thing may be
On Fri, May 30, 2014 at 10:27:35AM +0900, Chanwoo Choi wrote:
Hi Charles,
On 05/30/2014 12:27 AM, Charles Keepax wrote:
The higher levels of impedance have a higher minimum value than the
first level. As the same value was used for all levels, higher impedances
were reported with a very
Hi Ming,
On 29.05.2014 15:59, Ming Lei wrote:
The patch of bio: modify __bio_add_page() to accept pages that
don't start a new segment changes the way for adding one page
to bio:
- previously by adding page after checking successfully
- now by trying to add page and recover if
On Mon, May 26, 2014 at 07:42:57AM +0200, Stephan Mueller wrote:
A second aspect is the implementation of the stdrng. Currently, the offered
patch does not include the stdrng selection. I am currently working on the
completion of the addition of the stdrng selection to the offered patch. My
On Thu, May 29, 2014 at 5:24 PM, Linus Torvalds
torva...@linux-foundation.org wrote:
So I'm not in fact arguing against Minchan's patch of upping
THREAD_SIZE_ORDER to 2 on x86-64, but at the same time stack size does
remain one of my we really need to be careful issues, so while I am
basically
Hi Charles,
On 05/30/2014 06:36 PM, Charles Keepax wrote:
On Fri, May 30, 2014 at 10:41:39AM +0900, Chanwoo Choi wrote:
This patch set the parent device of extcon device using first parameter of
devm_extco_dev_allocate() to remove duplicate code on all of extcon provider
drivers.
On 30/05/14 10:39, Ulf Hansson wrote:
On 28 May 2014 15:46, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
This patch adds a fake Qualcomm ID 0x00051180 to the amba_ids, as Qualcomm
SDCC controller is pl180, but amba id registers read 0x0's.
On Wed, May 28, 2014 at 12:56:25PM -0400, Steven Rostedt wrote:
Instead of making that a huge string, what about a dynamic array of
special structures?
struct __attribute__((__packed__)) cper_sec_mem_rec {
short type;
int data;
};
HI, Steven Boris
We have two big chunk
On 23/05/14 16:53, Vincent Guittot wrote:
Monitor the activity level of each group of each sched_domain level. The
activity is the amount of cpu_power that is currently used on a CPU or group
of CPUs. We use the runnable_avg_sum and _period to evaluate this activity
level. In the special use
On 30/05/14 10:35, Ulf Hansson wrote:
On 28 May 2014 15:46, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
This patch adds ddrmode mask to variant structure giving more flexibility
to the driver to support more SOCs which have different
On 28 May 2014 15:47, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
This patch adds specifics of clk and datactrl register on Qualcomm SD
Card controller. This patch also populates the Qcom variant data with
these new values specific to
On 30/05/14 10:55, Ulf Hansson wrote:
On 28 May 2014 15:47, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
This patch adds specifics of clk and datactrl register on Qualcomm SD
Card controller. This patch also populates the Qcom variant data
When resuming from S3 suspend, serial console starts sending garbage
on the serial port.
Not continuously, it sends garbage only when in local console prints a
text.
It stops only when the (sending) machine is shut down, or if some
text is sent manually (i.e. with cat txtfile /dev/ttyS0).
Full
2014-05-30 2:25 GMT+08:00 Greg Kroah-Hartman gre...@linuxfoundation.org:
On Thu, May 29, 2014 at 08:14:02PM +0800, Barry Song wrote:
2014-05-29 18:13 GMT+08:00 Daniel Thompson daniel.thomp...@linaro.org:
After 07d410e0) serial: sirf: fix spinlock deadlock issue it is no longer
possiblet to
Eduardo TI address is bouncing, but it looks like he's still
contributing via his Gmail address.
Cc: Eduardo Valentin edubez...@gmail.com
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
MAINTAINERS | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS
We previously assumed 'mem_sdio' could be null but it is
dereferenced in ioremap(). Add a check to avoid a potential
null pointer dereference error.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
drivers/mfd/asic3.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
On Fri, May 30, 2014 at 05:22:32AM -0400, Chen, Gong wrote:
We have two big chunk string. One for memory error location, the other
for DIMM error location. Since DIMM error location depends on some
other conditions, how about just converting memory error location to a
compact mode but leaving
Creating this patch for the Eudyptula Challenge.
Replaced msleep() for a delay 20ms with a usleep_range() between 1us and
15000us.
Also inserted a blank line after adeclaration.
Signed-off-by: Miguel Oliveira cmro...@gmail.com
---
drivers/staging/nokia_h4p/nokia_core.c |3 ++-
1 file
Am Freitag, 30. Mai 2014, 17:05:48 schrieb Herbert Xu:
Hi Herbert,
On Mon, May 26, 2014 at 07:42:57AM +0200, Stephan Mueller wrote:
A second aspect is the implementation of the stdrng. Currently, the
offered
patch does not include the stdrng selection. I am currently working on the
On Fri, 30 May 2014, Jan Kara wrote:
Documentation/kernel-parameters.txt | 19 +-
kernel/printk/printk.c | 1218
+--
2 files changed, 878 insertions(+), 359 deletions(-)
Your patches look clean and pretty nice actually. They must be
kzalloc can fail. Add a null check to avoid null pointer
dereference error while accessing the pointer later.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
drivers/pinctrl/sunxi/pinctrl-sunxi.c |4
1 file changed, 4 insertions(+)
diff --git
On Fri, May 30, 2014 at 09:27:20AM +, Wang, Jiada (ESD) wrote:
Hi Shijie
After apply this patch into our kernel,
We are facing data hang issue when sending big size file (2M used in test) to
uart port
Note: Rx port is also keep receiving data.
After read the implementation of
On 28 May 2014 15:47, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
On Controllers like Qcom SD card controller where cclk is mclk and mclk should
be directly controlled by the driver.
This patch adds support to control mclk directly in the
On 28 May 2014 15:47, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
Some of the controller have maximum supported frequency, This patch adds
support in variant data structure to specify such restrictions. This
gives more flexibility in
Thanks Ulf,
On 30/05/14 11:28, Ulf Hansson wrote:
*/
- if (host-mclk 1) {
- ret = clk_set_rate(host-clk, 1);
+ if (host-mclk host-variant-f_max) {
You can use the local variant pointer directly, instead of host-variant.
yes, Will do that
Dear Lee Jones and Mark Brown,
The patch[1] has dependency on both mfd.git and regulator.git.
[1] regulator: s2mps11: Add support S2MPU02 regulator device
The mfd.git(for-mfd-next branch) has only following patchset[2] without
patchset[3] about drivers/mfd/sec-core.c.
The regulaotr.git
Hi Krzysztof,
On 05/30/2014 05:23 PM, Krzysztof Kozlowski wrote:
On pią, 2014-05-30 at 09:25 +0900, Chanwoo Choi wrote:
This patch add S2MPU02 regulator device to existing S2MPS11 device driver
because of little difference between S2MPS1x and S2MPU02. The S2MPU02
regulator device includes
On Fri, 2014-05-30 at 03:06 -0400, Jérôme Carretero wrote:
On Thu, 27 Mar 2014 17:57:37 +1100
Benjamin Herrenschmidt b...@kernel.crashing.org wrote:
I've been trying a 9230 on a power box here (a 9235 on the same
machine works fine) and it blows up with an IOMMU violation early
during
Thanks Ulf for reviewing.
On 30/05/14 11:25, Ulf Hansson wrote:
On 28 May 2014 15:47, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
On Controllers like Qcom SD card controller where cclk is mclk and mclk should
be directly controlled by the
Hi Joonsoo,
I think you will be loosing the benefit of below patch with your changes.
I am no expert here so please bear with me. I tried explaining in the
inline comments, let me know if I am wrong.
commit 026b08147923142e925a7d0aaa39038055ae0156
Author: Tomasz Stanislawski
On Fri, May 30, 2014 at 12:08:08PM +0200, Stephan Mueller wrote:
We already have a user-space interface to change priorities.
Great -- if I may ask, which interface is that?
Take a look at crypto/crypto_user.c
Cheers,
--
Email: Herbert Xu herb...@gondor.apana.org.au
Home Page:
On Thu, 8 May 2014, Namjae Jeon wrote:
Date: Thu, 08 May 2014 19:23:19 +0900
From: Namjae Jeon namjae.j...@samsung.com
To: Dave Chinner da...@fromorbit.com, Theodore Ts'o ty...@mit.edu
Cc: linux-ext4 linux-e...@vger.kernel.org, x...@oss.sgi.com,
linux-fsde...@vger.kernel.org,
The directories for objdump is created by the code
a few lines below:
[ ! -d $OBJDIFFD/$dn ] mkdir -p $OBJDIFFD/$dn
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Jason Cooper ja...@lakedaemon.net
---
scripts/objdiff | 2 --
1 file changed, 2 deletions(-)
diff --git
On 05/29/2014 10:28 PM, Stefan Kristiansson wrote:
On Tue, May 27, 2014 at 08:47:36AM +0200, Jonas Bonn wrote:
On 05/26/2014 10:52 PM, Geert Uytterhoeven wrote:
CC devicetree for the bindings
On Mon, May 26, 2014 at 10:31 PM, Stefan Kristiansson
stefan.kristians...@saunalahti.fi wrote:
+++
On Fri, May 23, 2014 at 10:36:35PM +0200, Thierry Reding wrote:
From: Thierry Reding tred...@nvidia.com
This commit introduces a generic device tree binding for IOMMU devices.
Only a very minimal subset is described here, but it is enough to cover
the requirements of both the Exynos System
On 29/05/14 20:04, Eric Dumazet wrote:
On Thu, 2014-05-29 at 18:12 +0100, Jim Baxter wrote:
This fixes a problem with dropped packets over 16k CDC-NCM
when the connection is being heavily used.
The issue was that the skb truesize for the unpacked NCM
packets was too high after they were
On Fri, May 30, 2014 at 08:30:08AM +0100, Thierry Reding wrote:
On Thu, May 29, 2014 at 09:52:22AM -0600, Stephen Warren wrote:
On 05/23/2014 02:36 PM, Thierry Reding wrote:
From: Thierry Reding tred...@nvidia.com
This commit introduces a generic device tree binding for IOMMU devices.
On 28 May 2014 15:48, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
MCIFIFOCNT register behaviour on Qcom chips is very different than the other
pl180 integrations. MCIFIFOCNT register contains the number of
words that are still waiting to be
On czw, 2014-05-15 at 13:18 +0200, Krzysztof Kozlowski wrote:
Without software reset the secondary CPU does not power up and
exynos_boot_secondary() ends with pen_release equal to 1. This can be
observed in dmesg:
CPU1: failed to come online
Brought up 1 CPUs
SMP: Total of
On wto, 2014-05-13 at 16:12 +0200, Krzysztof Kozlowski wrote:
On Exynos4212 USE_DELAYED_RESET_ASSERTION must be set in
ARM_CORE1_OPTION register during CPU power down. This is the proper way
of powering down CPU. Additionally without this the CPU clock down won't
work after powering down CPU1
This avoids handling gpiochip remove error in device
remove handler.
Signed-off-by: abdoulaye berthe berthe...@gmail.com
---
drivers/gpio/gpiolib.c | 24 +++-
include/linux/gpio/driver.h | 2 +-
2 files changed, 8 insertions(+), 18 deletions(-)
diff --git
On Fri 2014-05-30 11:27:13, Miguel Oliveira wrote:
Creating this patch for the Eudyptula Challenge.
Replaced msleep() for a delay 20ms with a usleep_range() between 1us
and 15000us.
Also inserted a blank line after adeclaration.
So you are changing timings without testing. Plus, burning
On Thursday 29 May 2014 06:38:35 H. Peter Anvin wrote:
On 05/29/2014 02:26 AM, Arnd Bergmann wrote:
On Wednesday 28 May 2014 14:41:52 H. Peter Anvin wrote:
On 05/19/2014 05:36 AM, Arnd Bergmann wrote:
My feeling is that all devices we can think of fall into at least one
of these
Hi,
On Tuesday 06 May 2014 10:22 PM, Tony Lindgren wrote:
* Sourav Poddar sourav.pod...@ti.com [140506 04:08]:
These add device tree entry for qspi controller driver on dra7-evm.
Thanks applying into omap-for-v3.16/dt.
There is a problem with this. The qspi node defines crossbar number
as its
On Thu, May 29, 2014 at 09:04:33PM +0200, Stephen Warren wrote:
On 05/28/2014 06:54 AM, Peter De Schrijver wrote:
Implement fuse driver for Tegra20, Tegra30, Tegra114 and Tegra124.
diff --git a/Documentation/ABI/testing/sysfs-driver-tegra-fuse
Well... I'll try to come up with something better. Even though I only
forward ported an existing patch to address a memory allocation failure.
How about the patch below then?
From 52a050f85256d7586933365da1b98c6227651449 Mon Sep 17 00:00:00 2001
From: KAMEZAWA Hiroyuki
This avoids handling gpiochip remove error in device
remove handler.
Signed-off-by: abdoulaye berthe berthe...@gmail.com
---
drivers/gpio/gpiolib.c | 24 +++-
include/linux/gpio/driver.h | 2 +-
2 files changed, 8 insertions(+), 18 deletions(-)
diff --git
On Fri, 2014-05-30 at 11:06 +0200, Thierry Reding wrote:
From: Thierry Reding tred...@nvidia.com
Commit febdbfe8a91c (arch: Prepare for smp_mb__{before,after}_atomic())
deprecated the smp_mb__{before,after}_{atomic,clear}_{dec,inc,bit}*()
functions in favour of the unified
On Fri, May 30, 2014 at 1:30 PM, abdoulaye berthe berthe...@gmail.com wrote:
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -1263,10 +1263,9 @@ static void gpiochip_irqchip_remove(struct gpio_chip
*gpiochip);
*
* A gpio_chip with any GPIOs still requested may not be
Paulo, this is what I'm going to send upstream tomorrow. FYI.
P.
8---
I have a system on which I have disabled threading in the BIOS, and I am booting
the kernel with the option idle=poll.
The kernel displays
process: WARNING: polling idle and HT enabled, performance may degrade
which
I have a system on which I have disabled threading in the BIOS, and I am booting
the kernel with the option idle=poll.
The kernel displays
process: WARNING: polling idle and HT enabled, performance may degrade
which is incorrect -- I've already disabled HT.
This warning is issued here:
void
For x86 boxes, smp_num_siblings is set to a value read in a CPUID call in
detect_ht(). This value is the *factory defined* value in all cases; even
if HT is disabled in BIOS the value still returns 2 if the CPU supports
HT. AMD also reports the factory defined value in all cases.
That is, even
Hi Ulf,
On 30/05/14 12:27, Ulf Hansson wrote:
On 28 May 2014 15:48, srinivas.kandaga...@linaro.org wrote:
...
.f_max = 20800,
.explicit_mclk_control = true,
+ .qcom_fifo = true,
};
static int mmci_card_busy(struct mmc_host
Hi Krzysztof,
On 15.05.2014 13:18, Krzysztof Kozlowski wrote:
Without software reset the secondary CPU does not power up and
exynos_boot_secondary() ends with pen_release equal to 1. This can be
observed in dmesg:
CPU1: failed to come online
Brought up 1 CPUs
SMP: Total of
On 29/05/14 19:55, Bjørn Mork wrote:
Jim Baxter jim_bax...@mentor.com writes:
The NDP was ignoring the wNextNdpIndex in the NDP which
means that NTBs containing multiple NDPs would have missed
frames.
Well, just for the record: I believe this field was meant to be reserved
and always 0
Ping,
Could you review this patch?
Thanks,
Chanwoo Choi
On 05/26/2014 03:29 PM, Chanwoo Choi wrote:
This patch add pmusysreg node for Exynos3250 to access PMU (Power Management
Unit)
register in a centralized way using syscon driver.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Hi Krzysztof,
On 13.05.2014 16:12, Krzysztof Kozlowski wrote:
On Exynos4212 USE_DELAYED_RESET_ASSERTION must be set in
ARM_CORE1_OPTION register during CPU power down. This is the proper way
of powering down CPU. Additionally without this the CPU clock down won't
work after powering down CPU1
Hi Pavel,
Creating this patch for the Eudyptula Challenge.
Replaced msleep() for a delay 20ms with a usleep_range() between 1us
and 15000us.
Also inserted a blank line after adeclaration.
So you are changing timings without testing. Plus, burning CPU power
instead of sleeping.
On 26.05.2014 08:29, Chanwoo Choi wrote:
This patch add pmusysreg node for Exynos3250 to access PMU (Power Management
Unit)
register in a centralized way using syscon driver.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
On 05/30/2014 08:52 PM, Tomasz Figa wrote:
On 26.05.2014 08:29, Chanwoo Choi wrote:
This patch add pmusysreg node for Exynos3250 to access PMU (Power Management
Unit)
register in a centralized way using syscon driver.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin
Hi Vikas, Pankaj,
On 27.05.2014 13:26, Vikas Sajjan wrote:
Hi,
Any comments on this series?
I still have this series on my to-review list, but it's quite complex
and I didn't have needed amount of time yet, sorry. At the moment I'm on
vacation, so I don't want to spend too much time on the
On Friday, May 30, 2014 11:33:25 AM Mika Westerberg wrote:
On Fri, May 30, 2014 at 04:20:41AM +0200, Rafael J. Wysocki wrote:
On Friday, May 23, 2014 02:02:22 AM Zhang Rui wrote:
Hi, all,
Currently, PNP bus is used as the default bus for for enumerating ACPI
devices with _HID/_CID.
On Fri, 30 May 2014, Naoya Horiguchi wrote:
Curretly hugepage migration is available for all archs which support pmd-level
hugepage, but testing is done only for x86_64 and there're bugs for other
archs.
So to avoid breaking such archs, this patch limits the availability strictly
to
On Fri, 30 May 2014, Naoya Horiguchi wrote:
We already have a function named hugepage_supported(), and the similar
hugepages_supported()
name hugepage_migration_support() is a bit unconfortable, so let's rename
it hugepage_migration_supported().
Signed-off-by: Naoya Horiguchi
On Fri, May 23, 2014 at 07:16:33PM +0100, Morten Rasmussen wrote:
+static struct capacity_state cap_states_cluster_a7[] = {
+ /* Cluster only power */
+ { .cap = 358, .power = 2967, }, /* 350 MHz */
+ { .cap = 410, .power = 2792, }, /* 400 MHz */
+ { .cap = 512, .power
On Friday, May 30, 2014 12:03:08 PM Sachin Kamat wrote:
Hi Viresh,
On 27 May 2014 17:20, Viresh Kumar viresh.ku...@linaro.org wrote:
All callers of of_init_opp_table() are required to take reference of
dev-of_node, by initiating calls to of_node_{get|put}(), before and after
calling
On Friday, May 30, 2014 02:00:39 PM Lan Tianyu wrote:
On 05/20/2014 08:59 PM, Lan Tianyu wrote:
ACPI 5.0 spec(5.5.2.4.5) defines GenericSerialBus(i2c, spi, uart) operation
region. It allows ACPI aml code able to access such kind of devices to
implement some ACPI standard method.
On the
On Thu, May 29, 2014 at 04:09:48PM -0700, Andrew Morton wrote:
On Fri, 9 May 2014 18:36:52 +0200 Johan Hovold jo...@hovold.com wrote:
On Thu, May 08, 2014 at 07:28:04PM +0200, Boris BREZILLON wrote:
You should also keep the flush (read of IMR) regardless (to make sure
the write has
Hi Wolfram:
Since this version resolved all comments, it's ok for you?
Sorry, I misunderstood. I thought a V4 was needed, but it isn't. I'll
try to have a look this weekend.
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On Fri, May 09, 2014 at 10:41:27AM -0600, Jens Axboe wrote:
On 05/09/2014 08:12 AM, Jens Axboe wrote:
On 05/09/2014 03:17 AM, Matias Bjørling wrote:
With multi-million IOPS and multi-node workloads, the atomic_t in_flight
tracking becomes a bottleneck. Change the in-flight accounting to
On Thursday, May 29, 2014 07:27:34 PM Greg Kroah-Hartman wrote:
On Wed, May 28, 2014 at 09:59:45AM +0200, Johan Hovold wrote:
[ +CC: Greg, Doug, Stratos, Yuyang ]
On Wed, May 21, 2014 at 11:00:51AM +0200, Johan Hovold wrote:
On Wed, May 07, 2014 at 07:10:49AM -0700, Dirk Brandewie
So the /Documentation/timers/timers-howto.txt stats:
SLEEPING FOR ~USECS OR SMALL MSECS ( 10us - 20ms):
* Use usleep_range
- Why not msleep for (1ms - 20ms)?
Explained originally here:
http://lkml.org/lkml/2007/8/3/250
msleep(1~20) may not do what the caller intends, and
will often sleep longer
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