Commit-ID: 7d4bdab5a441772bfc757d7f9eea9465ec5de0ec
Gitweb: http://git.kernel.org/tip/7d4bdab5a441772bfc757d7f9eea9465ec5de0ec
Author: Adrian Hunter adrian.hun...@intel.com
AuthorDate: Thu, 31 Jul 2014 09:00:50 +0300
Committer: Arnaldo Carvalho de Melo a...@redhat.com
CommitDate: Wed, 17
Commit-ID: a8fa496092253a6309d46ecfe75eea4ab1d6fd79
Gitweb: http://git.kernel.org/tip/a8fa496092253a6309d46ecfe75eea4ab1d6fd79
Author: Arnaldo Carvalho de Melo a...@redhat.com
AuthorDate: Mon, 15 Sep 2014 15:54:34 -0300
Committer: Arnaldo Carvalho de Melo a...@redhat.com
CommitDate: Wed,
On Thu, Sep 18, 2014 at 02:56:35PM -0500, Aravind Gopalakrishnan wrote:
Add F3, F4 device IDs to be used in amd_nb.c and amd64_edac.c
Signed-off-by: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com
Acked-by: Bjorn Helgaas bhelg...@google.com
Please merge this along with the rest of your
This a series of patches is a DRM Driver for Rockchip Socs, add support
for vop devices, eDP. Future patches will add additional encoders/connectors,
such as HDMI.
The basic crtc for rockchip is a VOP - Video Output Processor.
the vop devices found on Rockchip rk3288 Soc, rk3288 soc have two
This patch adds the basic structure of a DRM Driver for Rockchip Socs.
Signed-off-by: Mark yao mark@rock-chips.com
---
Changes in v2:
- use the component framework to defer main drm driver probe
until all VOP devices have been probed.
- use dma-mapping API with ARM_DMA_USE_IOMMU, create dma
This add a display subsystem comprise the all display interface nodes.
Signed-off-by: Mark Yao mark@rock-chips.com
---
Changes in v2:
- add DRM master device node to list all display nodes that comprise
the graphics subsystem.
Changes in v3: None
This adds binding documentation for Rockchip SoC VOP driver.
Signed-off-by: Mark Yao mark@rock-chips.com
---
Changes in v2:
- rename lcdc to vop
- add vop reset
- add iommu node
- add port for display-subsystem
Changes in v3: None
.../devicetree/bindings/video/rockchip-vop.txt | 58
Add binding documentation for Rockchip SoC EDP driver.
Signed-off-by: Jeff Chen jeff.c...@rock-chips.com
Signed-off-by: Mark Yao mark@rock-chips.com
---
Changes in v2:
- add edp reset
- add panel node
- add port for display-subsystem
Changes in v3: None
On 17 September 2014 06:25, Christopher Covington c...@codeaurora.org wrote:
On 09/16/2014 05:24 PM, Christopher Covington wrote:
On 09/16/2014 05:09 PM, Christopher Covington wrote:
ARM Linux currently has the most features available to it in hypervisor
(HYP) mode, so switch to it when
This adds support for Rockchip soc edp found on rk3288
Signed-off-by: Mark Yao mark@rock-chips.com
Signed-off-by: Jeff Chen jeff.c...@rock-chips.com
---
Changes in v2:
- fix code sytle
- use some define from drm_dp_helper.h
- use panel-simple driver for primary display.
- remove unnecessary
On Thu, Sep 18, 2014 at 06:53:16PM +0100, Mark Rutland wrote:
On Thu, Sep 18, 2014 at 03:21:27AM +0100, Robin Gong wrote:
On Wed, Sep 17, 2014 at 06:52:44PM +0100, Mark Rutland wrote:
On Wed, Sep 17, 2014 at 10:57:59AM +0100, Robin Gong wrote:
This driver register pm_power_off with snvs
Hi,
Adding CC to Xiubo Li, Geert Uytterhoeven and Stephen Warren.
On Thursday, September 18, 2014, Dong Aisheng wrote,
On Wed, Sep 17, 2014 at 04:50:50PM +0530, Pankaj Dubey wrote:
Hi,
On Wednesday, September 17, 2014, Dong Aisheng Wrote,
+ regmap = regmap_init_mmio(NULL,
On Thu, Sep 18, 2014 at 08:29:17AM +0800, Wanpeng Li wrote:
Hi Andres,
On Wed, Sep 17, 2014 at 10:51:48AM -0700, Andres Lagar-Cavilla wrote:
[...]
static inline int check_user_page_hwpoison(unsigned long addr)
{
int rc, flags = FOLL_TOUCH | FOLL_HWPOISON | FOLL_WRITE;
@@ -1177,9
On 2014/9/18 4:58, Thomas Gleixner wrote:
On Wed, 17 Sep 2014, Jiang Liu wrote:
On 2014/9/17 1:45, Thomas Gleixner wrote:
On Thu, 11 Sep 2014, Jiang Liu wrote:
+#ifdefCONFIG_IRQ_DOMAIN_HIERARCHY
+void irq_chip_ack_parent(struct irq_data *data)
+{
+ data = data-parent_data;
+ if
On Wed, Sep 17, 2014 at 10:51:48AM -0700, Andres Lagar-Cavilla wrote:
When KVM handles a tdp fault it uses FOLL_NOWAIT. If the guest memory
has been swapped out or is behind a filemap, this will trigger async
readahead and return immediately. The rationale is that KVM will kick
back the guest
On Wed, Sep 17, 2014 at 09:43:09PM -0700, Dave Hansen wrote:
On 09/17/2014 08:23 PM, Kevin Easton wrote:
I was actually thinking that the kernel would take care of the xsave /
xrstor (for current), updating tsk-thread.fpu.state (for non-running
threads) and sending an IPI for threads
On 09/18/2014 12:17 AM, Kevin Easton wrote:
I was assuming that if an application did want to enable MPX after threads
had already been created, it would generally want to enable it
simultaneously across all threads. This would be a lot easier for the
kernel than for the application.
The
On 09/17/14 20:09, Masanari Iida wrote:
This patch fix spelling typos found in Kconfig.
Signed-off-by: Masanari Iida standby2...@gmail.com
Acked-by: Randy Dunlap rdun...@infradead.org
Thanks.
---
arch/blackfin/Kconfig | 2 +-
arch/mips/cavium-octeon/Kconfig | 2 +-
On Fri, Aug 29, 2014 at 08:00:51PM +0900, Masahiro Yamada wrote:
It looks like this header file is a concatenation of two headers.
Anyway, the include guard should be renamed and placed at the correct
postion and the license block in the middle should be deleted.
Signed-off-by: Masahiro
Hi Pankaj,
One more question:
For example:
regmap_read()
_regmap_read()
2112 #ifdef LOG_DEVICE
2113 if (strcmp(dev_name(map-dev), LOG_DEVICE)
== 0)
2114 dev_info(map-dev, %x = %x\n,
reg, *val);
On 09/18/2014 01:45 AM, Alexei Starovoitov wrote:
On Wed, Sep 17, 2014 at 12:37 PM, Alexei Starovoitov a...@plumgrid.com wrote:
Hm, thinking out loudly ... perhaps this could be made a library problem.
Such that the library which wraps the syscall needs to be aware of a
marker where the
Commit: e676253b19b2d269cccf67fdb1592120a0cd0676 (serial/8250: Add
support for RS485 IOCTLs), adds support for RS485 ioctls for 825_core on
all the archs. Unfortunaltely the definition of TIOCSRS485 and
TIOCGRS485 was missing on the ioctls.h file
Reported-by: Guenter Roeck li...@roeck-us.net
On Tue, Sep 16 2014, Vladimir Davydov wrote:
Hi Suleiman,
On Mon, Sep 15, 2014 at 12:13:33PM -0700, Suleiman Souhlal wrote:
On Mon, Sep 15, 2014 at 3:44 AM, Vladimir Davydov
vdavy...@parallels.com wrote:
Hi,
I'd like to discuss downsides of the kmem accounting part of the memory
On 09/18/2014 08:25 AM, Adrian Hunter wrote:
On 09/17/2014 10:57 PM, Stephen Warren wrote:
On 09/17/2014 01:55 PM, Ulf Hansson wrote:
On 12 September 2014 19:18, Stephen Warren swar...@wwwdotorg.org wrote:
From: Stephen Warren swar...@nvidia.com
As soon as the CD IRQ is requested, it can
Hi all,
Changes since 20140917:
The net tree lost its build failure.
The fsl tree gained a build failure so I used the version from
next-20140917.
The v4l-dvb tree still had its build failure so I used the version from
next-20140908.
The kvm-arm tree gained a conflict against the kvm tree.
This patch extends the start and end address of initrd to be page aligned,
so that we can free all memory including the un-page aligned head or tail
page of initrd, if the start or end address of initrd are not page
aligned, the page can't be freed by free_initrd_mem() function.
Signed-off-by:
From: Micky Ching micky_ch...@realsil.com.cn
Fix rts52275249 failed send buffer cmd after suspend,
PM_CTRL3 should reset before send any buffer cmd after suspend.
Otherwise, buffer cmd will failed, this will lead resume fail.
Signed-off-by: Micky Ching micky_ch...@realsil.com.cn
---
Hello Doug, Andreas,
On 09/17/2014 05:47 PM, Doug Anderson wrote:
rtc@101E {
status = okay;
+ clocks = clock CLK_RTC, max77686 MAX77686_CLK_AP;
+ clock-names = rtc, rtc_src;
Wait, seriously? Snow is still using the rtc@101E
On 09/17/2014 06:40 PM, Andrew Bresticker wrote:
On Wed, Sep 17, 2014 at 2:50 AM, Qais Yousef qais.you...@imgtec.com wrote:
On 09/16/2014 12:51 AM, Andrew Bresticker wrote:
The MIPS GIC supports 7 local interrupts, 2 of which are the GIC
local watchdog and count/compare timer. The remainder
Cpufreq core introduces cpufreq_suspended flag to let cpufreq sysfs nodes
across S2RAM/S2DISK. But the flag is only set in the cpufreq_suspend()
for cpufreq drivers which have target or target_index callback. This
skips intel_pstate driver. This patch is to set the flag before checking
target or
On 09/17/2014 06:42 PM, Andrew Bresticker wrote:
On Wed, Sep 17, 2014 at 3:20 AM, Qais Yousef qais.you...@imgtec.com wrote:
On 09/16/2014 12:51 AM, Andrew Bresticker wrote:
The current MIPS GIC driver and the platform code using it are rather
ugly and could use a good cleanup before adding
On Thu, 18 Sep 2014, David Howells wrote:
James Morris jmor...@namei.org wrote:
No, if they go direct to Linus, they don't go into -next.
Can you then sync your -next branch to Linus after Linus takes them please?
Nope, I only want to sync on point releases unless absolutely necessary.
At Wed, 17 Sep 2014 21:23:37 +0200,
Andreas Mohr wrote:
Hi,
On Wed, Sep 10, 2014 at 05:57:17PM +0200, Takashi Iwai wrote:
The current codes in gameport and analog joystick drivers for the time
accounting have a long-standing problem when the system is running
with CPU freq; since the
On 2014年09月17日 21:10, Paul E. McKenney wrote:
On Wed, Sep 17, 2014 at 03:11:42PM +0800, Lan Tianyu wrote:
On 2014年08月29日 03:47, Paul E. McKenney wrote:
Currently, the expedited grace-period primitives do get_online_cpus().
This greatly simplifies their implementation, but means that calls to
On Thu, Sep 18, 2014 at 02:29:54AM +0200, Radim Krčmář wrote:
I think you proposed to use magic constant in place of of MASK_FAM_X, so
Huh, what?
Second problem: Most elements don't begin at offset 0, so the usual
retrieval would add a shift, (repurposing max_monitor_line_size)
So what?
On Wed, 2014-09-17 at 21:29 +0200, Ulf Hansson wrote:
On 17 September 2014 11:11, micky micky_ch...@realsil.com.cn wrote:
On 09/17/2014 02:01 AM, Ulf Hansson wrote:
On 12 September 2014 03:39, micky_ch...@realsil.com.cn wrote:
From: Roger Tseng rogera...@realtek.com
Some platform
For many drivers which will support rich endianness of Devices
need define DT properties by itself with the binding support.
The regmap core has already support endianness of the following
case:
Index Device DT properties needed
--
1 BE
On 2014/9/17 1:43, Thomas Gleixner wrote:
Jiang,
On Thu, 11 Sep 2014, Jiang Liu wrote:
diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c
/* Create mapping */
-virq = irq_create_mapping(domain, hwirq);
+#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
+if (domain-ops-alloc)
Hello everybody.
I'm playing around with kernel 3.17-rc and noticed a bcache misbehaviour
every now and then. The machine gets unresponsive and syslog gets this
call trace:
Sep 18 07:56:18 hn kernel: [139899.611485] Task dump for CPU 0:
Sep 18 07:56:18 hn kernel: [139899.611487] bcache_gc
Currently this driver is missing a check on the return value of devm_kzalloc,
which would cause a NULL pointer dereference in a OOM situation.
This patch adds a missing check.
Signed-off-by: Kiran Padwal kiran.pad...@smartplayin.com
---
drivers/spi/spi-pl022.c |5 +
1 file changed, 5
get voltage duty table from device tree might be better, other platforms can
also use this
driver without any modify.
Tested on a rk3288 sdk board as logic voltage regulator.
Changes in v2:
Adviced by Lee Jones
- rename the documentation
Adviced by Doug Anderson
- update the example
Adviced by
Get voltage duty table from device tree might be better, other platforms can
also use this
driver without any modify.
Signed-off-by: Chris Zhong z...@rock-chips.com
eries-changes: 2
Adviced by Lee Jones
- rename the file
- remove all the prefix st_
- add depend on PWM in Kconfig
---
Changes
Document the st-pwm regulator
Signed-off-by: Chris Zhong z...@rock-chips.com
---
Changes in v2:
Adviced by Lee Jones
- rename the documentation
Adviced by Doug Anderson
- update the example
Adviced by Mark Rutland
- remove pwm-reg-period
.../bindings/regulator/pwm-regulator.txt |
On Wed, Sep 17, 2014 at 02:55:26PM +0200, Borislav Petkov wrote:
This sounds misleading to me. If I would have to explain how I
understand physical_package_id, I'd say it is the physical piece of
silicon containing the core. Which is consistent with what Peter says
that using it to identify
On Sat, 2014-09-13 at 21:55 +0200, Christoph Hellwig wrote:
On Tue, Jul 29, 2014 at 03:15:11PM +0200, Christoph Hellwig wrote:
Nic,
any progress on looking over these? Seems like there's actually
nothing at all queued up for 3.17 in the target tree, or am І missing
something?
ping
On Wed, Sep 17, 2014 at 03:33:10PM -0700, Dave Hansen wrote:
This is a big fat RFC. It takes quite a few liberties with the
multi-core topology level that I'm not completely comfortable
with.
It has only been tested lightly.
Full dmesg for a Cluster-on-Die system with this set applied,
On Wed, Sep 17, 2014 at 10:07:13PM +0100, Russell King - ARM Linux wrote:
On Wed, Sep 17, 2014 at 01:12:23PM -0700, Daniel Thompson wrote:
I may have missed something but this sounds like the expected behaviour
to me.
Without AckCtl set (GIC_CPU_CTRL bit 2) then it is not possible to
On Wed, Sep 17, 2014 at 03:47:01PM +0200, Loic Poulain wrote:
Direct Irq En bit can be initialized to a bad value.
This bit has to be cleared for io access mode.
+Eric
I would like to have a bit better explanation *why* this bit needs to be
cleared.
Also want to ask Eric (who added the
On 2014-09-17 at 21:17:29 +0200, Benedict Boerger
benedict.boer...@cs.tu-dortmund.de wrote:
Fix the sparse warning: symbol 'CAM_read_entry' was not declared. Should it
be static?
The function CAM_read_entry is not used and therefore deleted.
Your patch is missing a Signed-off-by line.
Linus,
please pull sound fixes for v3.17-rc6 from:
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
tags/sound-3.17-rc6
The topmost commit is 779608521976e3b8d264f89c67e64c918949cc9b
sound fixes for 3.17-rc6
All
Hi,
[...]
please see regmap_get_val_endian called in regmap_init function.
static enum regmap_endian regmap_get_val_endian(struct device *dev,
const struct regmap_bus *bus,
const struct regmap_config
*config)
Use the ONE macro instead of REG, and we can simplify proc_cgroup_show().
Signed-off-by: Zefan Li lize...@huawei.com
---
fs/proc/base.c | 19 ++-
include/linux/cgroup.h | 3 ++-
kernel/cgroup.c| 18 +++---
3 files changed, 7 insertions(+), 33
Use the ONE macro instead of REG, and we can simplify proc_cpuset_show().
Signed-off-by: Zefan Li lize...@huawei.com
---
fs/proc/base.c | 20 ++--
include/linux/cpuset.h | 3 ++-
kernel/cpuset.c| 15 +++
3 files changed, 7 insertions(+), 31
Instead of using a global work to schedule release agent on removable
cgroups, we change to use a per-cgroup work to do this, which makes
the code much simpler.
v2: use a dedicated work instead of reusing css-destroy_work. (Tejun)
Signed-off-by: Zefan Li lize...@huawei.com
---
On Wed, Sep 17, 2014 at 09:10:16AM -0700, Daniel Thompson wrote:
@@ -604,8 +731,19 @@ static void gic_raise_softirq(const struct cpumask
*mask, unsigned int irq)
{
int cpu;
unsigned long flags, map = 0;
+ unsigned long softint;
-
Hi Tim,
On Tue, Sep 16, 2014 at 12:49:22PM -0600, tim.gard...@canonical.com wrote:
From: Tim Gardner tim.gard...@canonical.com
In file included from scripts/sortextable.c:194:0:
scripts/sortextable.c: In function ‘main’:
scripts/sortextable.h:176:3: warning: ‘relocs_size’ may be used
Since we cannot make sure the 'cell-num_resources' will always be none
zero here, and then if either equal to zero, the kzalloc() will return
ZERO_SIZE_PTR, which equals to ((void *)16).
So this patch fix this with just doing the zero check before calling
kzalloc().
Signed-off-by: Xiubo Li
On Wed, Sep 17, 2014 at 01:07:51PM +0300, Octavian Purdila wrote:
On Wed, Sep 17, 2014 at 12:44 PM, Johan Hovold jo...@kernel.org wrote:
snip
+ /*
+ * Buffer to hold the packet for read or write transfers. One
+ * is enough since we can't have multiple transfers in
+
On Thu, Sep 18, 2014 at 11:33:26AM +0530, Pankaj Dubey wrote:
Hi,
Adding CC to Xiubo Li, Geert Uytterhoeven and Stephen Warren.
On Thursday, September 18, 2014, Dong Aisheng wrote,
On Wed, Sep 17, 2014 at 04:50:50PM +0530, Pankaj Dubey wrote:
Hi,
On Wednesday, September 17,
This add support for the Coherent Accelerator (cxl) attached to POWER8
processors. This coherent accelerator interface is designed to allow the
coherent connection of FPGA based accelerators (and other devices) to a POWER
systems.
IBM refers to this as the Coherent Accelerator Processor
From: Ian Munsie imun...@au1.ibm.com
Signed-off-by: Ian Munsie imun...@au1.ibm.com
Signed-off-by: Michael Neuling mi...@neuling.org
---
drivers/misc/cxl/Kconfig | 18 ++
drivers/misc/cxl/Makefile | 3 +++
2 files changed, 21 insertions(+)
diff --git a/drivers/misc/cxl/Kconfig
From: Ian Munsie imun...@au1.ibm.com
This documentation gives an overview of the hardware architecture, userspace
APIs via /dev/cxl/afu0.0 and the syfs files. It also adds a MAINTAINERS file
entry for cxl.
Signed-off-by: Ian Munsie imun...@au1.ibm.com
Signed-off-by: Michael Neuling
From: Ian Munsie imun...@au1.ibm.com
This new header add defines for callbacks and structs needed by the rest of the
kernel to hook into the cxl infrastructure.
Empty functions are provided when CONFIG CXL_BASE is not enabled.
Signed-off-by: Ian Munsie imun...@au1.ibm.com
Signed-off-by: Michael
From: Ian Munsie imun...@au1.ibm.com
This is the core of the cxl driver.
It adds support for using cxl cards in the powernv environment only (no guest
support). It allows access to cxl accelerators by userspace using
/dev/cxl/afu0.0 char device.
The kernel driver has no knowledge of the
From: Ian Munsie imun...@au1.ibm.com
Some of the MSI IRQ code in pnv_pci_ioda_msi_setup() is generically useful so
split it out.
This will be used by some of the cxl PCIe code later.
Signed-off-by: Ian Munsie imun...@au1.ibm.com
Signed-off-by: Michael Neuling mi...@neuling.org
---
From: Ian Munsie imun...@au1.ibm.com
This adds the base cxl support that needs to be build into the kernel to use
cxl as a module. This is needed so that the cxl call backs from the core
powerpc mm code always exist irrespective of if the cxl module is loaded or
not. This is similar to how cell
From: Ian Munsie imun...@au1.ibm.com
Signed-off-by: Ian Munsie imun...@au1.ibm.com
Signed-off-by: Michael Neuling mi...@neuling.org
---
arch/powerpc/mm/hash_utils_64.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index
From: Ian Munsie imun...@au1.ibm.com
This defines structs and magic numbers required for userspace to interact with
the kernel cxl driver via /dev/cxl/afu0.0.
It adds this header file Kbuild so it's exported when doing make
headers_installs.
Signed-off-by: Ian Munsie imun...@au1.ibm.com
From: Ian Munsie imun...@au1.ibm.com
This add a hook into tlbie() so that we use global invalidations when there are
cxl contexts active.
Normally cxl snoops broadcast tlbie. cxl can have TLB entries invalidated via
MMIO, but we aren't doing that yet. So for now we are just disabling local
From: Ian Munsie imun...@au1.ibm.com
Currently msi_bitmap_alloc_hwirqs() will round up any IRQ allocation requests
to the nearest power of 2. eg. ask for 5 IRQs and you'll get 8. This wastes a
lot of IRQs which can be a scarce resource.
For cxl we can require multiple IRQs for every contexts
From: Ian Munsie imun...@au1.ibm.com
This adds a number of functions for allocating IRQs under powernv PCIe for cxl.
Signed-off-by: Ian Munsie imun...@au1.ibm.com
Signed-off-by: Michael Neuling mi...@neuling.org
---
arch/powerpc/include/asm/pnv-pci.h| 27 +
Dear Dmitry,
在 2014年09月18日 01:02, Dmitry Torokhov 写道:
Hi Caesar,
On Wed, Sep 17, 2014 at 11:59:10AM +0800, Caesar Wang wrote:
Thermal is TS-ADC Controller module supports
user-defined mode and automatic mode.
User-defined mode refers,TSADC all the control signals entirely by
software
From: Ian Munsie imun...@au1.ibm.com
This adds a new function hash_page_mm() based on the existing hash_page().
This version allows any struct mm to be passed in, rather than assuming
current. This is useful for servicing co-processor faults which are not in the
context of the current running
From: Ian Munsie imun...@au1.ibm.com
__spu_trap_data_seg() currently contains code to determine the VSID and ESID
required for a particular EA and mm struct.
This code is generically useful for other co-processors. This moves the code
of the cell platform so it can be used by other powerpc
From: Ian Munsie imun...@au1.ibm.com
Currently spu_handle_mm_fault() is in the cell platform.
This code is generically useful for other non-cell co-processors on powerpc.
This patch moves this function out of the cell platform into arch/powerpc/mm so
that others may use it.
Signed-off-by: Ian
From: Ian Munsie imun...@au1.ibm.com
This adds the OPAL call to change a PHB into cxl mode.
Signed-off-by: Ian Munsie imun...@au1.ibm.com
Signed-off-by: Michael Neuling mi...@neuling.org
---
arch/powerpc/include/asm/opal.h| 2 ++
arch/powerpc/platforms/powernv/opal-wrappers.S |
On 2014年09月17日 17:03, Gautham R Shenoy wrote:
Hi Lan,
Sorry missed this repost! Couple of comments.
Np, Thanks for review :)
On Fri, Aug 22, 2014 at 04:33:40PM +0800, Lan Tianyu wrote:
[.. snip ..]
+static int _cpu_up_with_trace(int cpu)
+{
+int error;
+
+
On Thu, Sep 18, 2014 at 11:19 AM, Johan Hovold jo...@kernel.org wrote:
On Wed, Sep 17, 2014 at 01:07:51PM +0300, Octavian Purdila wrote:
On Wed, Sep 17, 2014 at 12:44 PM, Johan Hovold jo...@kernel.org wrote:
snip
+ /*
+ * Buffer to hold the packet for read or write transfers. One
On Thu, Sep 18, 2014 at 12:12:42AM +0200, Rickard Strandqvist wrote:
Hi Dan
Ok, I have made two suggestions for strncpy function that also
guarantees a terminating null character.
1) retunerar number of characters to be copied, it can be good to
have, but was not really satisfied.
On Wed, Sep 17, 2014 at 09:07:53PM +0200, Guenter Roeck wrote:
Just to give you an update. I kind of got an image to run with qemu
after applying the following patches.
8119d33 cris: Add basic qemu_defconfig
40d078b cris: time.c: Add missing include file to fix compile error
a4f2390 cris:
this one is an obvious candidate for removal.
Still there in v3.17-rc5 and next-20140918. So I submit yet another
trivial cleanup.
Done on top of next-20140918. Only tested by grepping the tree. Please
note that, obviously, nothing uses s5p_gpio_get_drvstr() or
s5p_gpio_set_drvstr().
Paul Bolle
[...]
I think there should have been a check for NULL on dev in
regmap_get_val_endian, so that if dev pointer exist then only it makes
sense to get
endianness property from DT.
I will suggest following fix in regmap.c for this. With following fix I
tested it and it works well
on
On 2014/9/18 16:48, Joe.C wrote:
On Thu, 2014-09-11 at 22:03 +0800, Jiang Liu wrote:
+#else /* CONFIG_IRQ_DOMAIN_HIERARCHY */
+static inline int irq_domain_activate_irq(struct irq_data *data) { return
0; }
+static inline int irq_domain_deactivate_irq(struct irq_data *data) { return
If one adds 'gpio-controller;' to the chip in the devicetree, then
initialization fails with 'gpiochip_find_base: cannot find free range',
because ngpio is 0. This patch fixes the bug.
Tested on ml507 board.
Signed-off-by: Gernot Vormayr gvorm...@gmail.com
---
drivers/gpio/gpio-xilinx.c | 11
This patch should fix the bug reported in https://lkml.org/lkml/2014/9/11/249.
Test is still pending.
David Hildenbrand (1):
blk-mq: Avoid race condition with uninitialized requests
block/blk-mq.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
--
1.8.5.5
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This patch should fix the bug reported in https://lkml.org/lkml/2014/9/11/249.
We have to initialize at least the atomic_flags and the cmd_flags when
allocating storage for the requests.
Otherwise blk_mq_timeout_check() might dereference uninitialized pointers when
racing with the creation of a
On Thu, Sep 18, 2014 at 11:49:19AM +0300, Octavian Purdila wrote:
On Thu, Sep 18, 2014 at 11:19 AM, Johan Hovold jo...@kernel.org wrote:
On Wed, Sep 17, 2014 at 01:07:51PM +0300, Octavian Purdila wrote:
On Wed, Sep 17, 2014 at 12:44 PM, Johan Hovold jo...@kernel.org wrote:
snip
+
Reduce boilerplate code by using __seq_open_private() instead of seq_open()
in kallsyms_open().
Signed-off-by: Rob Jones rob.jo...@codethink.co.uk
---
kernel/kallsyms.c | 11 ++-
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/kernel/kallsyms.c b/kernel/kallsyms.c
index
On Mon, Sep 15, 2014 at 08:17:52PM +0200, Takashi Iwai wrote:
At Mon, 15 Sep 2014 20:55:54 +0530,
Sudip Mukherjee wrote:
On Mon, Sep 15, 2014 at 04:29:48PM +0200, Takashi Iwai wrote:
At Mon, 15 Sep 2014 19:39:41 +0530,
Sudip Mukherjee wrote:
snip
diff --git
This patch make some change to unflatten_dt_node(), make sure the
device_node don't reference to fdt raw blob memory, so that we can
free the raw blob reserved memory after initcalls.
Signed-off-by: Yalin Wang yalin.w...@sonymobile.com
---
drivers/of/fdt.c | 27 +++
On 17 September 2014 05:59, Caesar Wang caesar.w...@rock-chips.com wrote:
This add the necessary binding documentation for the thermal
found on Rockchip SoCs
Hi Caesar,
is there any reason to not use the existing thermal bindings? You can
find a description in
The RCU-friendy string API used internally by BTRFS is generic enough for
common use. This doesn't add any new functionality, but instead just moves the
code and documents the existing API.
Signed-off-by: Omar Sandoval osan...@osandov.com
---
This patch applies to 3.17-rc5.
cgroup_pidlist_start() holds cgrp-pidlist_mutex and then calls
pidlist_array_load(), and cgroup_pidlist_stop() releases the mutex.
It is wrong that we release the mutex in the failure path in
pidlist_array_load(), because cgroup_pidlist_stop() will be called
no matter if cgroup_pidlist_start()
Warn seems necessary because we unconditionally change
the pin behavior, I didn't meet any case where direct irq is truly
used on our platform. But maybe it could happen?
Don't want to cause any hidden regression.
Moreover if it is confirmed that is an hardware issue (BIOS),
We can just keep
Hi,
On September 18, 2014 1:26, Dong Aisheng wrote
On Thu, Sep 18, 2014 at 11:33:26AM +0530, Pankaj Dubey wrote:
Hi,
Adding CC to Xiubo Li, Geert Uytterhoeven and Stephen Warren.
On Thursday, September 18, 2014, Dong Aisheng wrote,
On Wed, Sep 17, 2014 at 04:50:50PM +0530, Pankaj
From: mark yao y...@rock-chips.com
This a series of patches is a DRM Driver for Rockchip Socs, add support
for vop devices, eDP. Future patches will add additional encoders/connectors,
such as HDMI.
The basic crtc for rockchip is a VOP - Video Output Processor.
the vop devices found on Rockchip
This patch adds the basic structure of a DRM Driver for Rockchip Socs.
Signed-off-by: Mark yao mark@rock-chips.com
---
Changes in v2:
- use the component framework to defer main drm driver probe
until all VOP devices have been probed.
- use dma-mapping API with ARM_DMA_USE_IOMMU, create dma
Hi,
On September 18, 2014, Li.Xiubo wrote,
Subject: RE: [PATCH v3] mfd: syscon: Decouple syscon interface from
platform
devices
[...]
I think there should have been a check for NULL on dev in
regmap_get_val_endian, so that if dev pointer exist then only it
makes sense to get
Hi Russell,
mm..
I see your meaning,
But how to debug reserved memory,
I mean how to know which physical memory are reserved in kernel if
Not use /sys/kernel/debug/memblock/reserved debug file ?
I think memblock provides a debug interface, so it should keep it
Correct for debug .
For Catalin
This add a display subsystem comprise the all display interface nodes.
Signed-off-by: Mark Yao mark@rock-chips.com
---
changes in v2:
- add DRM master device node to list all display nodes that comprise
the graphics subsystem.
.../devicetree/bindings/video/rockchip-drm.txt | 19
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