From: Yazen Ghannam
Deferred errors on AMD systems may get an Action Optional severity with the
goal of being handled by the SRAO notifier block. However, the process of
determining if an address is usable is different between Intel and AMD. So
define vendor-specific
From: Yazen Ghannam
Deferred errors on AMD systems may get an Action Optional severity with the
goal of being handled by the SRAO notifier block. However, the process of
determining if an address is usable is different between Intel and AMD. So
define vendor-specific functions for this.
Also,
On 03/17/2017 07:13 AM, Ulf Hansson wrote:
On 10 March 2017 at 14:25, Jan Glauber wrote:
Prevent data corruption on cn6xxx and cnf7xxx.
Due to an imperfection in the design of the MMC bus hardware,
the 2nd to last cache block of a DMA read must be locked into the L2
cache.
On 03/17/2017 07:13 AM, Ulf Hansson wrote:
On 10 March 2017 at 14:25, Jan Glauber wrote:
Prevent data corruption on cn6xxx and cnf7xxx.
Due to an imperfection in the design of the MMC bus hardware,
the 2nd to last cache block of a DMA read must be locked into the L2
cache.
[...]
+/**
+ *
On Mon, Mar 20, 2017 at 12:03 AM, Dong Aisheng wrote:
> On Thu, Mar 16, 2017 at 06:30:50AM -0700, Andrey Smirnov wrote:
>> Add code allowing for control of various power domains managed by GPCv2
>> IP block found in i.MX7 series of SoCs. Power domains covered by this
>> patch
On Mon, Mar 20, 2017 at 12:03 AM, Dong Aisheng wrote:
> On Thu, Mar 16, 2017 at 06:30:50AM -0700, Andrey Smirnov wrote:
>> Add code allowing for control of various power domains managed by GPCv2
>> IP block found in i.MX7 series of SoCs. Power domains covered by this
>> patch are:
>>
>> -
On 20/03/17 19:22, Adrian Hunter wrote:
> On 03/16/2017 12:32 PM, Jon Hunter wrote:
>> It is common for SD/MMC host controllers to set the parent clock that
>> drives the SD/MMC interface in order to support various operating
>> speeds. Typically, this is performed by calling common clock
On 20/03/17 19:22, Adrian Hunter wrote:
> On 03/16/2017 12:32 PM, Jon Hunter wrote:
>> It is common for SD/MMC host controllers to set the parent clock that
>> drives the SD/MMC interface in order to support various operating
>> speeds. Typically, this is performed by calling common clock
On Mon, 20 Mar 2017, Deepa Dinamani wrote:
> >> -static int ptp_clock_getres(struct posix_clock *pc, struct timespec *tp)
> >> +static int ptp_clock_getres(struct posix_clock *pc, struct timespec64 *tp)
> >
> > That's a pretty pointless exercise. getres() returns the resolution of the
> > clock
On Mon, 20 Mar 2017, Deepa Dinamani wrote:
> >> -static int ptp_clock_getres(struct posix_clock *pc, struct timespec *tp)
> >> +static int ptp_clock_getres(struct posix_clock *pc, struct timespec64 *tp)
> >
> > That's a pretty pointless exercise. getres() returns the resolution of the
> > clock
Am Montag, 20. März 2017, 21:28:05 CET schrieb Marcelo Henrique Cerri:
Hi Marcelo,
> 3DES is missing the fips_allowed flag for CTR mode.
>
> Signed-off-by: Marcelo Henrique Cerri
Acked-by: Stephan Mueller
Ciao
Stephan
Am Montag, 20. März 2017, 21:28:05 CET schrieb Marcelo Henrique Cerri:
Hi Marcelo,
> 3DES is missing the fips_allowed flag for CTR mode.
>
> Signed-off-by: Marcelo Henrique Cerri
Acked-by: Stephan Mueller
Ciao
Stephan
>> Resending to update author id in patch 7/7.
>>
>> The series is aimed at replacing struct timespec which is not
>> y2038 safe with y2038 safe struct timespec64 for k_clock interfaces.
>>
>> The series does not change the syscall interface.
>> This will be done in a follow up series.
>
> Aisde
>> Resending to update author id in patch 7/7.
>>
>> The series is aimed at replacing struct timespec which is not
>> y2038 safe with y2038 safe struct timespec64 for k_clock interfaces.
>>
>> The series does not change the syscall interface.
>> This will be done in a follow up series.
>
> Aisde
> Please do not explain WHAT the patch is doing. We can see that from the
> diff itself. What's important is the WHY. A good changelog is structured in
> paragraphs, which explain the context, the problem and the solution. Please
> read Documentation/process/submitting-patches.rst. Let me give you
> Please do not explain WHAT the patch is doing. We can see that from the
> diff itself. What's important is the WHY. A good changelog is structured in
> paragraphs, which explain the context, the problem and the solution. Please
> read Documentation/process/submitting-patches.rst. Let me give you
> When changing the PTP code, please put the PTP maintainer onto CC.
Will do. Thanks for pointing out the omission.
-Deepa
> When changing the PTP code, please put the PTP maintainer onto CC.
Will do. Thanks for pointing out the omission.
-Deepa
From: Yazen Ghannam
Give Deferred errors an Action Optional severity on SMCA systems so that
the SRAO notifier block can potentially handle them.
Signed-off-by: Yazen Ghannam
---
Link:
From: Yazen Ghannam
Give Deferred errors an Action Optional severity on SMCA systems so that
the SRAO notifier block can potentially handle them.
Signed-off-by: Yazen Ghannam
---
Link:
http://lkml.kernel.org/r/1486760120-60944-3-git-send-email-yazen.ghan...@amd.com
v1->v2:
- New in v2. Based
From: Yazen Ghannam
This set is based on an earlier 3 patch set.
Patch 1:
- Address comments by using cpu_to_node() when finding a node ID rather
than amd_get_nb_id().
Link:
http://lkml.kernel.org/r/1486760120-60944-1-git-send-email-yazen.ghan...@amd.com
Patch 2:
- Fix
From: Yazen Ghannam
This set is based on an earlier 3 patch set.
Patch 1:
- Address comments by using cpu_to_node() when finding a node ID rather
than amd_get_nb_id().
Link:
http://lkml.kernel.org/r/1486760120-60944-1-git-send-email-yazen.ghan...@amd.com
Patch 2:
- Fix up commit message.
From: Yazen Ghannam
We should move away from using AMD-specific amd_get_nb_id() to find a node
ID and move toward using generic Linux methods. We can use cpu_to_node()
since NUMA should be working as expected on newly released Fam17h systems.
Replace call to
From: Yazen Ghannam
We should move away from using AMD-specific amd_get_nb_id() to find a node
ID and move toward using generic Linux methods. We can use cpu_to_node()
since NUMA should be working as expected on newly released Fam17h systems.
Replace call to amd_get_nb_id() and related shifting
We need to find a UMC's channel number from mcheck code when translating
UMC normalized addresses to system physical addresses. So move the function
there from EDAC.
Also, drop the struct pvt from the function parameters since we don't use
it. And add a sanity check to make sure we're only
3DES is missing the fips_allowed flag for CTR mode.
Signed-off-by: Marcelo Henrique Cerri
---
crypto/testmgr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/crypto/testmgr.c b/crypto/testmgr.c
index 89f1dd1f4b13..cd075c7d8ee1 100644
--- a/crypto/testmgr.c
+++
We need to find a UMC's channel number from mcheck code when translating
UMC normalized addresses to system physical addresses. So move the function
there from EDAC.
Also, drop the struct pvt from the function parameters since we don't use
it. And add a sanity check to make sure we're only
3DES is missing the fips_allowed flag for CTR mode.
Signed-off-by: Marcelo Henrique Cerri
---
crypto/testmgr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/crypto/testmgr.c b/crypto/testmgr.c
index 89f1dd1f4b13..cd075c7d8ee1 100644
--- a/crypto/testmgr.c
+++ b/crypto/testmgr.c
@@ -2645,6
From: Andi Kleen
The uncore PMU has a lot of duplicated PMUs for different subsystems.
When expanding an uncore alias we usually end up with a large
number of identically named aliases, which makes perf stat
output difficult to read.
Automatically sum them up in perf stat,
From: Andi Kleen
The uncore PMU has a lot of duplicated PMUs for different subsystems.
When expanding an uncore alias we usually end up with a large
number of identically named aliases, which makes perf stat
output difficult to read.
Automatically sum them up in perf stat, unless --no-merge is
From: Andi Kleen
Move the printing of perf expressions and internal events to a
new clearer --details flag, instead of lumping it together
with other debug options in --debug. This makes it clearer
to use.
Before
perf list --debug
...
unc_m_power_critical_throttle_cycles
From: Andi Kleen
Move the printing of perf expressions and internal events to a
new clearer --details flag, instead of lumping it together
with other debug options in --debug. This makes it clearer
to use.
Before
perf list --debug
...
unc_m_power_critical_throttle_cycles
[Cycles all
From: Andi Kleen
Add a simple expression parser good enough to parse JSON relation
expressions. The parser is implemented using bison.
This is just intended as an simple parser for internal usage
in the event lists, not the beginning of a "perf scripting language"
v2: Use
From: Andi Kleen
Add generic infrastructure to perf stat to output ratios for "MetricExpr"
entries in the event lists. Many events are more useful as ratios
than in raw form, typically some count in relation to total ticks.
Transfer the MetricExpr information from the
From: Andi Kleen
Add a simple expression parser good enough to parse JSON relation
expressions. The parser is implemented using bison.
This is just intended as an simple parser for internal usage
in the event lists, not the beginning of a "perf scripting language"
v2: Use expr__ prefix instead
From: Andi Kleen
Add generic infrastructure to perf stat to output ratios for "MetricExpr"
entries in the event lists. Many events are more useful as ratios
than in raw form, typically some count in relation to total ticks.
Transfer the MetricExpr information from the alias to the evsel.
We
From: Andi Kleen
To be used in next patch to support automatic summing of alias
events.
v2: Move check for bad results to next patch
v3: Remove trivial addition.
v4: Use perf_evsel__cpus instead of evsel->cpus
Signed-off-by: Andi Kleen
---
From: Andi Kleen
To be used in next patch to support automatic summing of alias
events.
v2: Move check for bad results to next patch
v3: Remove trivial addition.
v4: Use perf_evsel__cpus instead of evsel->cpus
Signed-off-by: Andi Kleen
---
tools/perf/builtin-stat.c | 103
Hi James,
Please see inline:
On Mon, 20 Mar 2017, James Chapman wrote:
> I suggest change the wording of the first paragraph in the patch comment
> to better represent why the changes are being made. Perhaps something
> like the following?
>
> "Existing L2TP kernel code does not derive the
Hi James,
Please see inline:
On Mon, 20 Mar 2017, James Chapman wrote:
> I suggest change the wording of the first paragraph in the patch comment
> to better represent why the changes are being made. Perhaps something
> like the following?
>
> "Existing L2TP kernel code does not derive the
From: Andi Kleen
Special case uncore_ prefix in PMU match, to allow for shorter event
uncore specifications.
Before
perf stat -a -e uncore_cbox/event=0x35,umask=0x1,filter_opc=0x19C/ sleep 1
After
perf stat -a -e cbox/event=0x35,umask=0x1,filter_opc=0x19C/ sleep 1
From: Andi Kleen
Special case uncore_ prefix in PMU match, to allow for shorter event
uncore specifications.
Before
perf stat -a -e uncore_cbox/event=0x35,umask=0x1,filter_opc=0x19C/ sleep 1
After
perf stat -a -e cbox/event=0x35,umask=0x1,filter_opc=0x19C/ sleep 1
Signed-off-by: Andi Kleen
Hello Andrea, Mike, and all,
Mike: here's the split out page that describes the
userfaultfd ioctl() operations.
I'd like to get review input, especially from you and
Andrea, but also anyone else, for the current version
of this page, which includes quite a few FIXMEs to be
sorted.
I've shown
From: Andi Kleen
Output the metric expr in perf list when --debug is specified, so that the user
can check the formula.
Before:
% perf list
...
unc_m_power_channel_ppd
[Cycles where DRAM ranks are in power down (CKE) mode. Derived from
unc_m_power_channel_ppd.
Hello Andrea, Mike, and all,
Mike: here's the split out page that describes the
userfaultfd ioctl() operations.
I'd like to get review input, especially from you and
Andrea, but also anyone else, for the current version
of this page, which includes quite a few FIXMEs to be
sorted.
I've shown
From: Andi Kleen
Output the metric expr in perf list when --debug is specified, so that the user
can check the formula.
Before:
% perf list
...
unc_m_power_channel_ppd
[Cycles where DRAM ranks are in power down (CKE) mode. Derived from
unc_m_power_channel_ppd. Unit:
From: Andi Kleen
Add support for a new JSON event attribute to name MetricExpr for better output
in perf stat.
If the event has no MetricName it uses the normal event name instead to describe
the metric.
Before
% perf stat -a -I 1000 -e
From: Andi Kleen
Add support for a new JSON event attribute to name MetricExpr for better output
in perf stat.
If the event has no MetricName it uses the normal event name instead to describe
the metric.
Before
% perf stat -a -I 1000 -e '{unc_p_clockticks,unc_p_freq_max_os_cycles}'
From: Andi Kleen
When the user specifies a pmu directly, expand it automatically
with a prefix match for all available PMUs, similar as we do for
the normal aliases now.
This allows to specify attributes for duplicated boxes quickly.
For example uncore_cbox_{0,6}/.../ can
From: Andi Kleen
Add support for parsing the MetricExpr header in the JSON event lists and
storing them in the alias structure.
Used in the next patch.
v2: Change DividedBy to MetricExpr
v3: Really catch all uses of DividedBy
Signed-off-by: Andi Kleen
From: Andi Kleen
When the user specifies a pmu directly, expand it automatically
with a prefix match for all available PMUs, similar as we do for
the normal aliases now.
This allows to specify attributes for duplicated boxes quickly.
For example uncore_cbox_{0,6}/.../ can be now specified as
From: Andi Kleen
Add support for parsing the MetricExpr header in the JSON event lists and
storing them in the alias structure.
Used in the next patch.
v2: Change DividedBy to MetricExpr
v3: Really catch all uses of DividedBy
Signed-off-by: Andi Kleen
---
tools/perf/pmu-events/jevents.c|
From: Andi Kleen
- Add MetricName to describe Metric
- Remove redundant "derived from" in descriptions
- Rename UNC_M_CAS_COUNT to LLC_MISSES.READ
Signed-off-by: Andi Kleen
---
.../arch/x86/broadwellde/uncore-cache.json | 28 ++--
From: Andi Kleen
Factor out the PMU name matching in the event parser into a separate function,
to use the same code for other grammar rules later.
Signed-off-by: Andi Kleen
---
tools/perf/util/parse-events.c | 46
From: Andi Kleen
- Add MetricName to describe Metric
- Remove redundant "derived from" in descriptions
- Rename UNC_M_CAS_COUNT to LLC_MISSES.READ
Signed-off-by: Andi Kleen
---
.../arch/x86/broadwellde/uncore-cache.json | 28 ++--
.../arch/x86/broadwellde/uncore-memory.json
From: Andi Kleen
Factor out the PMU name matching in the event parser into a separate function,
to use the same code for other grammar rules later.
Signed-off-by: Andi Kleen
---
tools/perf/util/parse-events.c | 46 ++
tools/perf/util/parse-events.h | 5
From: Andi Kleen
When any result that is being merged is bad, mark them all
bad to give consistent output in interval mode.
No before/after, because the issue was only found in theoretical
review and it is hard to reproduce
Signed-off-by: Andi Kleen
This patch kit further improves support for Intel uncore events in
the Linux perf user tool. The basic support has been already
merged earlier, but this makes it nicer to use.
- Collapse counts from duplicated boxes to make the output
easier to read.
- Support specifying events for multiple
From: Andi Kleen
When any result that is being merged is bad, mark them all
bad to give consistent output in interval mode.
No before/after, because the issue was only found in theoretical
review and it is hard to reproduce
Signed-off-by: Andi Kleen
---
tools/perf/builtin-stat.c | 10
This patch kit further improves support for Intel uncore events in
the Linux perf user tool. The basic support has been already
merged earlier, but this makes it nicer to use.
- Collapse counts from duplicated boxes to make the output
easier to read.
- Support specifying events for multiple
Hello Andrea, Mike, and all,
Mike: thanks for the page that you sent. I've reworked it
a bit, and also added a lot of further information,
and an example program. In the process, I split the page
into two pieces, with one piece describing the userfaultfd()
system call and the other describing the
Hello Andrea, Mike, and all,
Mike: thanks for the page that you sent. I've reworked it
a bit, and also added a lot of further information,
and an example program. In the process, I split the page
into two pieces, with one piece describing the userfaultfd()
system call and the other describing the
Michael, first of all thanks for feedback.
On Mon, Mar 20, 2017 at 08:38:50PM +0100, Michael Kerrisk (man-pages) wrote:
> [CC += Michel Lespinasse ]
>
> Kirill,
>
> I need some help here.
>
> On 20 March 2017 at 16:59, Kirill Smelkov wrote:
> > On Sat, Mar
Michael, first of all thanks for feedback.
On Mon, Mar 20, 2017 at 08:38:50PM +0100, Michael Kerrisk (man-pages) wrote:
> [CC += Michel Lespinasse ]
>
> Kirill,
>
> I need some help here.
>
> On 20 March 2017 at 16:59, Kirill Smelkov wrote:
> > On Sat, Mar 18, 2017 at 10:40:10PM +0300, Kirill
Hi Kalle,
On Mon, Mar 20, 2017 at 05:08:35PM +, Kalle Valo wrote:
> Brian Norris wrote:
> > This code was duplicated as part of the PCIe FLR code added to this
> > driver. Let's de-duplicate it to:
> >
> > * make things easier to read (mwifiex_pcie_free_buffers()
Hi Kalle,
On Mon, Mar 20, 2017 at 05:08:35PM +, Kalle Valo wrote:
> Brian Norris wrote:
> > This code was duplicated as part of the PCIe FLR code added to this
> > driver. Let's de-duplicate it to:
> >
> > * make things easier to read (mwifiex_pcie_free_buffers() now has a
> >
On 03/20/2017 07:00 AM, Philipp Zabel wrote:
On Mon, 2017-03-20 at 12:08 +, Russell King - ARM Linux wrote:
On Mon, Mar 20, 2017 at 12:55:26PM +0100, Philipp Zabel wrote:
The above paragraph suggests we skip any rectangles that are not
supported. In our case that would be 3. and 4.,
On 03/15/2017 10:50 PM, Jonathan Cameron wrote:
> On 13/03/17 12:16, Andy Shevchenko wrote:
>> On Mon, Mar 13, 2017 at 1:11 PM, Eva Rachel Retuya
>> wrote:
>>> Provide an all-axes read for triggered buffering.
>>
>> Better description is needed.
>>
>>> -static int
On 03/20/2017 07:00 AM, Philipp Zabel wrote:
On Mon, 2017-03-20 at 12:08 +, Russell King - ARM Linux wrote:
On Mon, Mar 20, 2017 at 12:55:26PM +0100, Philipp Zabel wrote:
The above paragraph suggests we skip any rectangles that are not
supported. In our case that would be 3. and 4.,
On 03/15/2017 10:50 PM, Jonathan Cameron wrote:
> On 13/03/17 12:16, Andy Shevchenko wrote:
>> On Mon, Mar 13, 2017 at 1:11 PM, Eva Rachel Retuya
>> wrote:
>>> Provide an all-axes read for triggered buffering.
>>
>> Better description is needed.
>>
>>> -static int adxl345_get_triple(struct
Hi,
On 20-03-17 02:33, Chanwoo Choi wrote:
Hi,
On 2017년 03월 17일 18:55, Hans de Goede wrote:
Add a driver for charger detection / control on the Intel Cherrytrail
Whiskey Cove PMIC.
Signed-off-by: Hans de Goede
---
drivers/extcon/Kconfig | 7 +
Hi,
On 20-03-17 02:33, Chanwoo Choi wrote:
Hi,
On 2017년 03월 17일 18:55, Hans de Goede wrote:
Add a driver for charger detection / control on the Intel Cherrytrail
Whiskey Cove PMIC.
Signed-off-by: Hans de Goede
---
drivers/extcon/Kconfig | 7 +
drivers/extcon/Makefile| 1
Hello
Just pushed next-20170320 to my boards and stmmac stop working on both intree
dwmac-sunxi and my dev dwmac-sun8i.
It seems that interrupts never fire, and transmit queue timeout.
I will try to bisect this problem but perhaps other people could try to
reproduce it.
Regards
Corentin Labbe
Hello
Just pushed next-20170320 to my boards and stmmac stop working on both intree
dwmac-sunxi and my dev dwmac-sun8i.
It seems that interrupts never fire, and transmit queue timeout.
I will try to bisect this problem but perhaps other people could try to
reproduce it.
Regards
Corentin Labbe
1;4601;0c
On Mon, Mar 20, 2017 at 12:31:15AM +0800, Icenowy Zheng wrote:
> Allwinner H3/H5 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI
> or MUSB controller.
>
> Add device nodes for these controllers.
>
> Signed-off-by: Icenowy Zheng
> ---
> Changes in v4:
> -
1;4601;0c
On Mon, Mar 20, 2017 at 12:31:15AM +0800, Icenowy Zheng wrote:
> Allwinner H3/H5 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI
> or MUSB controller.
>
> Add device nodes for these controllers.
>
> Signed-off-by: Icenowy Zheng
> ---
> Changes in v4:
> - Add h5 to commit
The IIO subsystem is redefining iio_dev->mlock to be used by
the IIO core only for protecting device operating mode changes.
ie. Changes between INDIO_DIRECT_MODE, INDIO_BUFFER_* modes.
In this driver, mlock was being used to protect hardware state
changes. Replace it with a lock in the devices
The IIO subsystem is redefining iio_dev->mlock to be used by
the IIO core only for protecting device operating mode changes.
ie. Changes between INDIO_DIRECT_MODE, INDIO_BUFFER_* modes.
In this driver, mlock was being used to protect hardware state
changes. Replace it with a lock in the devices
Hello,
My name is Jane from UK, I came across you email address online, I will like to
know more about you , I have a very important reason of contacting you which,
I'll tell you in my next mail.
I wait for your reply
Hello,
My name is Jane from UK, I came across you email address online, I will like to
know more about you , I have a very important reason of contacting you which,
I'll tell you in my next mail.
I wait for your reply
This patch removes fixmap headers on non-x86 code introduced by the
adaptable MODULE_END change. It is also removed in the 32-bit pgtable
header. Instead, it is added by default in the pgtable generic header
for both architectures.
Signed-off-by: Thomas Garnier
---
This patch removes fixmap headers on non-x86 code introduced by the
adaptable MODULE_END change. It is also removed in the 32-bit pgtable
header. Instead, it is added by default in the pgtable generic header
for both architectures.
Signed-off-by: Thomas Garnier
---
Hi Quentin,
On Mon, Mar 20, 2017 at 12:34:03PM +0100, Quentin Schulz wrote:
> As there are still some discussion going on Liam's patch series on
> which my patch series depends, I propose to wait for it to be
> merged and then I'll rework these battery driver patches. Is there
> anything I can do
Hi Quentin,
On Mon, Mar 20, 2017 at 12:34:03PM +0100, Quentin Schulz wrote:
> As there are still some discussion going on Liam's patch series on
> which my patch series depends, I propose to wait for it to be
> merged and then I'll rework these battery driver patches. Is there
> anything I can do
[CC += Michel Lespinasse ]
Kirill,
I need some help here.
On 20 March 2017 at 16:59, Kirill Smelkov wrote:
> On Sat, Mar 18, 2017 at 10:40:10PM +0300, Kirill Smelkov wrote:
>> Signed-off-by: Kirill Smelkov
>> ---
>> man2/mmap.2 | 1 +
>> 1
[CC += Michel Lespinasse ]
Kirill,
I need some help here.
On 20 March 2017 at 16:59, Kirill Smelkov wrote:
> On Sat, Mar 18, 2017 at 10:40:10PM +0300, Kirill Smelkov wrote:
>> Signed-off-by: Kirill Smelkov
>> ---
>> man2/mmap.2 | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git
On 03/20/2017 07:56 PM, Arushi Singhal wrote:
[...]
> @@ -413,6 +413,7 @@ int ad7606_probe(struct device *dev, int irq, void
> __iomem *base_address,
> st = iio_priv(indio_dev);
>
> st->dev = dev;
> + mutex_init(>lock);
This is nitpicking, but putting this in the middle of the
On 03/20/2017 07:56 PM, Arushi Singhal wrote:
[...]
> @@ -413,6 +413,7 @@ int ad7606_probe(struct device *dev, int irq, void
> __iomem *base_address,
> st = iio_priv(indio_dev);
>
> st->dev = dev;
> + mutex_init(>lock);
This is nitpicking, but putting this in the middle of the
On Mon, Mar 13, 2017 at 07:11:34PM +0800, Eva Rachel Retuya wrote:
> Add interrupt-names property in order to specify interrupt pin in use.
>
> Signed-off-by: Eva Rachel Retuya
> ---
> Documentation/devicetree/bindings/iio/accel/adxl345.txt | 4
> 1 file changed, 4
On Mon, Mar 13, 2017 at 07:11:34PM +0800, Eva Rachel Retuya wrote:
> Add interrupt-names property in order to specify interrupt pin in use.
>
> Signed-off-by: Eva Rachel Retuya
> ---
> Documentation/devicetree/bindings/iio/accel/adxl345.txt | 4
> 1 file changed, 4 insertions(+)
Acked-by:
On 03/16/2017 12:32 PM, Jon Hunter wrote:
> It is common for SD/MMC host controllers to set the parent clock that
> drives the SD/MMC interface in order to support various operating
> speeds. Typically, this is performed by calling common clock framework
> APIs such as clk_set_rate(). The problem
On 03/16/2017 12:32 PM, Jon Hunter wrote:
> It is common for SD/MMC host controllers to set the parent clock that
> drives the SD/MMC interface in order to support various operating
> speeds. Typically, this is performed by calling common clock framework
> APIs such as clk_set_rate(). The problem
On Mon, Mar 20, 2017 at 11:08:41AM -0700, h...@zytor.com wrote:
> On March 19, 2017 1:26:58 AM PDT, "Kirill A. Shutemov"
> wrote:
> >On Mar 19, 2017 09:25, "Aneesh Kumar K.V"
> >wrote:
> > > What is the epectation when the hint addr is
On Mon, Mar 20, 2017 at 11:08:41AM -0700, h...@zytor.com wrote:
> On March 19, 2017 1:26:58 AM PDT, "Kirill A. Shutemov"
> wrote:
> >On Mar 19, 2017 09:25, "Aneesh Kumar K.V"
> >wrote:
> > > What is the epectation when the hint addr is below 128TB but addr + len
> > > 128TB ? Should such mmap
Hi Rafael,
we have been chasing the following BUG() triggering during the memory
hotremove (remove_memory):
ret = walk_memory_range(PFN_DOWN(start), PFN_UP(start + size - 1), NULL,
check_memblock_offlined_cb);
if (ret)
BUG();
and it
Hi Rafael,
we have been chasing the following BUG() triggering during the memory
hotremove (remove_memory):
ret = walk_memory_range(PFN_DOWN(start), PFN_UP(start + size - 1), NULL,
check_memblock_offlined_cb);
if (ret)
BUG();
and it
On Mon, Mar 20, 2017 at 08:11:28PM +0100, Thierry Reding wrote:
> From: Thierry Reding
>
> Currently, building code which uses the API guarded by the IOMMU_IOVA
> will fail to link if IOMMU_IOVA is not enabled. Often this code will be
> using the API provided by the IOMMU_API
On 20/03/17 13:25, William Breathitt Gray wrote:
> On Fri, Mar 17, 2017 at 03:36:05PM +0100, Benjamin Gaignard wrote:
>> 2017-03-14 19:53 GMT+01:00 William Breathitt Gray :
>>> On Sun, Mar 12, 2017 at 02:18:47PM +0100, Benjamin Gaignard wrote:
2017-03-05 13:04
On Mon, Mar 20, 2017 at 08:11:28PM +0100, Thierry Reding wrote:
> From: Thierry Reding
>
> Currently, building code which uses the API guarded by the IOMMU_IOVA
> will fail to link if IOMMU_IOVA is not enabled. Often this code will be
> using the API provided by the IOMMU_API Kconfig symbol, but
On 20/03/17 13:25, William Breathitt Gray wrote:
> On Fri, Mar 17, 2017 at 03:36:05PM +0100, Benjamin Gaignard wrote:
>> 2017-03-14 19:53 GMT+01:00 William Breathitt Gray :
>>> On Sun, Mar 12, 2017 at 02:18:47PM +0100, Benjamin Gaignard wrote:
2017-03-05 13:04 GMT+01:00 Jonathan Cameron :
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