Re: [PATCH 0/4] Topstar ACPI LED Workaround

On Tue, Oct 17, 2017 at 7:17 PM, Guillaume Douézan-Grard wrote: > Hi Darren, > > On Topstar U931 Notebooks, an issue prevents the WLAN toggle key from > being properly managed by the Embedded Controller and successfully > disconnect the adapter. A specific ACPI method

Re: [PATCH 0/4] Topstar ACPI LED Workaround

On Tue, Oct 17, 2017 at 7:17 PM, Guillaume Douézan-Grard wrote: > Hi Darren, > > On Topstar U931 Notebooks, an issue prevents the WLAN toggle key from > being properly managed by the Embedded Controller and successfully > disconnect the adapter. A specific ACPI method allows to toggle the WLAN >

Re: [PATCH] iommu: Limit the IOVA page range to the specified addresses

On 10/26/2017 03:32 AM, Alex Williamson wrote: On Tue, 17 Oct 2017 16:22:01 -0500 Gary R Hook wrote: From: amd The extent of pages specified when applying a reserved region should include up to the last page of the range, but not the page following

Re: [PATCH] iommu: Limit the IOVA page range to the specified addresses

On 10/26/2017 03:32 AM, Alex Williamson wrote: On Tue, 17 Oct 2017 16:22:01 -0500 Gary R Hook wrote: From: amd The extent of pages specified when applying a reserved region should include up to the last page of the range, but not the page following the range. Signed-off-by: Gary R Hook

Re: [PATCH] ARM: add a private asm/unaligned.h

Hi Arnd, On ven., oct. 20 2017, Arnd Bergmann wrote: > The asm-generic/unaligned.h header provides two different implementations > for accessing unaligned variables: the access_ok.h version used when > CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is set pretends that all pointers >

Re: [PATCH] ARM: add a private asm/unaligned.h

Hi Arnd, On ven., oct. 20 2017, Arnd Bergmann wrote: > The asm-generic/unaligned.h header provides two different implementations > for accessing unaligned variables: the access_ok.h version used when > CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is set pretends that all pointers > are in fact

[PATCH RFC 2/4] i2c: at91: split driver into core and master file

The single file i2c-at91.c has been split into core code (i2c-at91-core.c) and master mode specific code (i2c-at91-master.c). This should enhance maintainability and reduce ifdeffery for slave mode related code. The code itself hasn't been touched. Shared functions only had to be made non-static.

[PATCH RFC 2/4] i2c: at91: split driver into core and master file

The single file i2c-at91.c has been split into core code (i2c-at91-core.c) and master mode specific code (i2c-at91-master.c). This should enhance maintainability and reduce ifdeffery for slave mode related code. The code itself hasn't been touched. Shared functions only had to be made non-static.

[PATCH RFC 0/4] i2c: at91: slave mode support

Based on the discussion we had on the i2c-linux list [1], I wrote a patch for AT91 hardware and tried to fulfill the Linux I2C slave interface description [2] as good as possible. This enables aforementioned hardware to act as an I2C slave that can be accessed by a remote I2C master. I have

[PATCH RFC 0/4] i2c: at91: slave mode support

Based on the discussion we had on the i2c-linux list [1], I wrote a patch for AT91 hardware and tried to fulfill the Linux I2C slave interface description [2] as good as possible. This enables aforementioned hardware to act as an I2C slave that can be accessed by a remote I2C master. I have

Re: [PATCH] drm/bridge/synopsys: dsi: add optional pixel clock

Hi Philipp, On 10/27/2017 10:06 AM, Philipp Zabel wrote: > Hi Philippe, > > On Thu, 2017-10-26 at 18:09 +0200, Philippe Cornu wrote: >> The pixel clock is optional. When available, it offers a better >> preciseness for timing computations. >> >> Signed-off-by: Philippe Cornu

Re: [PATCH] drm/bridge/synopsys: dsi: add optional pixel clock

Hi Philipp, On 10/27/2017 10:06 AM, Philipp Zabel wrote: > Hi Philippe, > > On Thu, 2017-10-26 at 18:09 +0200, Philippe Cornu wrote: >> The pixel clock is optional. When available, it offers a better >> preciseness for timing computations. >> >> Signed-off-by: Philippe Cornu >> --- >>

[PATCH RFC 1/4] i2c: at91: segregate master mode specific code from probe and init func

In order to implement slave mode support for the at91 hardware we have to segregate all master mode specific function parts from the general parts. The upcoming slave mode patch will call its sepcific probe resp. init function instead of the master mode functions after the shared general code has

[PATCH RFC 1/4] i2c: at91: segregate master mode specific code from probe and init func

In order to implement slave mode support for the at91 hardware we have to segregate all master mode specific function parts from the general parts. The upcoming slave mode patch will call its sepcific probe resp. init function instead of the master mode functions after the shared general code has

Re: [PATCH 1/2] dt-bindings: add binding for A64 DE2 CCU with SRAM section

On Fri, Oct 27, 2017 at 10:33:29PM +0800, icen...@aosc.io wrote: > 在 2017-10-16 20:09，Maxime Ripard 写道： > > On Mon, Oct 16, 2017 at 05:41:10PM +0800, icen...@aosc.io wrote: > > > 在 2017-10-16 17:11，Maxime Ripard 写道： > > > > On Sat, Oct 14, 2017 at 08:29:24PM +0800, Icenowy Zheng wrote: > > > > >

Re: [PATCH 1/2] dt-bindings: add binding for A64 DE2 CCU with SRAM section

On Fri, Oct 27, 2017 at 10:33:29PM +0800, icen...@aosc.io wrote: > 在 2017-10-16 20:09，Maxime Ripard 写道： > > On Mon, Oct 16, 2017 at 05:41:10PM +0800, icen...@aosc.io wrote: > > > 在 2017-10-16 17:11，Maxime Ripard 写道： > > > > On Sat, Oct 14, 2017 at 08:29:24PM +0800, Icenowy Zheng wrote: > > > > >

Re: [PATCH v9 04/10] arm: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac

Hi, The prefix should be ARM, uppercase. On Tue, Oct 24, 2017 at 07:57:08PM +0200, Corentin Labbe wrote: > Since dwmac-sun8i could use either an integrated PHY or an external PHY > (which could be at same MDIO address), we need to represent this selection > by a MDIO switch. > > Signed-off-by:

Re: [PATCH v9 04/10] arm: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac

Hi, The prefix should be ARM, uppercase. On Tue, Oct 24, 2017 at 07:57:08PM +0200, Corentin Labbe wrote: > Since dwmac-sun8i could use either an integrated PHY or an external PHY > (which could be at same MDIO address), we need to represent this selection > by a MDIO switch. > > Signed-off-by:

Re: possible deadlock in perf_event_ctx_lock_nested

On Fri, Oct 27, 2017 at 01:30:30AM -0700, syzbot wrote: > == > WARNING: possible circular locking dependency detected > 4.13.0-next-20170911+ #19 Not tainted > -- > syz-executor2/12380 is

Re: possible deadlock in perf_event_ctx_lock_nested

On Fri, Oct 27, 2017 at 01:30:30AM -0700, syzbot wrote: > == > WARNING: possible circular locking dependency detected > 4.13.0-next-20170911+ #19 Not tainted > -- > syz-executor2/12380 is

Re: [PATCH v9 06/10] arm64: dts: allwinner: Restore EMAC changes

On Tue, Oct 24, 2017 at 07:57:10PM +0200, Corentin Labbe wrote: > The original dwmac-sun8i DT bindings have some issue on how to handle > integrated PHY and was reverted in last RC of 4.13. > But now we have a solution so we need to get back that was reverted. > > This patch restore arm64 DT

Re: [PATCH v9 06/10] arm64: dts: allwinner: Restore EMAC changes

On Tue, Oct 24, 2017 at 07:57:10PM +0200, Corentin Labbe wrote: > The original dwmac-sun8i DT bindings have some issue on how to handle > integrated PHY and was reverted in last RC of 4.13. > But now we have a solution so we need to get back that was reverted. > > This patch restore arm64 DT

[PATCH v2 10/10] arm64: allwinner: a64: add simplefb for A64 SoC

The A64 SoC features two display pipelines, one has a LCD output, the other has a HDMI output. Add support for simplefb for these pipelines on A64 SoC. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 31 +++ 1 file

[PATCH v2 10/10] arm64: allwinner: a64: add simplefb for A64 SoC

The A64 SoC features two display pipelines, one has a LCD output, the other has a HDMI output. Add support for simplefb for these pipelines on A64 SoC. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 31 +++ 1 file changed, 31

[PATCH v2 09/10] arm64: allwinner: a64: add DE2 CCU for A64 SoC

The A64 SoC features a DE2 CCU like the one in H5, but needs to claim a section of SRAM (SRAM C) to be accessed. Adds the device tree nodes for the SRAM controller and the DE2 CCU. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 34

[PATCH v2 09/10] arm64: allwinner: a64: add DE2 CCU for A64 SoC

The A64 SoC features a DE2 CCU like the one in H5, but needs to claim a section of SRAM (SRAM C) to be accessed. Adds the device tree nodes for the SRAM controller and the DE2 CCU. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 34 +++

[PATCH v2 08/10] dt-bindings: add binding for A64 DE2 CCU SRAM

A64's Display Engine 2.0 needs a section of SRAM (SRAM C) to be claimed, otherwise the whole DE2 memory zone cannot be accessed (kept to all 0). Add binding for this, in order to make the DE2 CCU able to claim the SRAM and enable access to the DE2 clock and reset registers. Signed-off-by:

[PATCH v2 08/10] dt-bindings: add binding for A64 DE2 CCU SRAM

A64's Display Engine 2.0 needs a section of SRAM (SRAM C) to be claimed, otherwise the whole DE2 memory zone cannot be accessed (kept to all 0). Add binding for this, in order to make the DE2 CCU able to claim the SRAM and enable access to the DE2 clock and reset registers. Signed-off-by:

[PATCH v2 07/10] ARM: sunxi: h3/h5: add simplefb nodes

The H3/H5 SoCs have a HDMI output and a TV Composite output. Add simplefb nodes for these outputs. Signed-off-by: Icenowy Zheng --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 29 + 1 file changed, 29 insertions(+) diff --git

[PATCH v2 07/10] ARM: sunxi: h3/h5: add simplefb nodes

The H3/H5 SoCs have a HDMI output and a TV Composite output. Add simplefb nodes for these outputs. Signed-off-by: Icenowy Zheng --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 29 + 1 file changed, 29 insertions(+) diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi

[PATCH v2 06/10] arm64: allwinner: h5: add compatible string for DE2 CCU

The DE2 CCU on Allwinner H5 SoC has a slightly different behavior than the one on H3, so the compatible string is not set in the common DTSI file. Add the compatible string of H5 DE2 CCU in H5 DTSI file. Signed-off-by: Icenowy Zheng ---

[PATCH v2 06/10] arm64: allwinner: h5: add compatible string for DE2 CCU

The DE2 CCU on Allwinner H5 SoC has a slightly different behavior than the one on H3, so the compatible string is not set in the common DTSI file. Add the compatible string of H5 DE2 CCU in H5 DTSI file. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 4 1

[PATCH v2 04/10] dt-bindings: simplefb-sunxi: add pipelines for DE2

As we're going to add simplefb support for Allwinner SoCs with DE2, add suitable pipeline strings in the device tree binding. Acked-by: Rob Herring Signed-off-by: Icenowy Zheng --- Changes in v2: - Adds Rob's ACK.

[PATCH v2 05/10] ARM: sun8i: h3/h5: add DE2 CCU device node for H3

The DE2 in H3/H5 has a clock control unit in it, and the behavior is slightly different between H3 and H5. Add the common parts in H3/H5 DTSI, and add the compatible string in H3 DTSI. The compatible string of H5 DE2 CCU will be added in a separated patch. Signed-off-by: Icenowy Zheng

[PATCH v2 04/10] dt-bindings: simplefb-sunxi: add pipelines for DE2

As we're going to add simplefb support for Allwinner SoCs with DE2, add suitable pipeline strings in the device tree binding. Acked-by: Rob Herring Signed-off-by: Icenowy Zheng --- Changes in v2: - Adds Rob's ACK. .../devicetree/bindings/display/simple-framebuffer-sunxi.txt | 4

[PATCH v2 05/10] ARM: sun8i: h3/h5: add DE2 CCU device node for H3

The DE2 in H3/H5 has a clock control unit in it, and the behavior is slightly different between H3 and H5. Add the common parts in H3/H5 DTSI, and add the compatible string in H3 DTSI. The compatible string of H5 DE2 CCU will be added in a separated patch. Signed-off-by: Icenowy Zheng ---

[PATCH v2 03/10] clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCU

The clocks of A64/H5 SoCs in the DE2 CCU is the same as the clocks in H3 DE2 CCU rather than the A83T DE2 CCU (the parent of them is the DE module clock). Fix this by change the clock descriptions to use the clocks of H3. Fixes: 763c5bd045b1 ("clk: sunxi-ng: add support for DE2 CCU")

[PATCH v2 03/10] clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCU

The clocks of A64/H5 SoCs in the DE2 CCU is the same as the clocks in H3 DE2 CCU rather than the A83T DE2 CCU (the parent of them is the DE module clock). Fix this by change the clock descriptions to use the clocks of H3. Fixes: 763c5bd045b1 ("clk: sunxi-ng: add support for DE2 CCU")

[PATCH v2 02/10] clk: sunxi-ng: add support for Allwinner H3 DE2 CCU

Allwinner H3 features a DE2 CCU like the one on A83T, however the parent of the clocks is the DE module clock, not the PLL_DE clock. Add support for it. Signed-off-by: Icenowy Zheng --- drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 47 1 file

[PATCH v2 02/10] clk: sunxi-ng: add support for Allwinner H3 DE2 CCU

Allwinner H3 features a DE2 CCU like the one on A83T, however the parent of the clocks is the DE module clock, not the PLL_DE clock. Add support for it. Signed-off-by: Icenowy Zheng --- drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 47 1 file changed, 47

[PATCH v2 01/10] dt-bindings: fix the binding of Allwinner DE2 CCU of A83T and H3

The DE2 CCU is different on A83T and H3 -- the parent of the clocks on A83T is PLL_DE but on H3 it's the DE module clock. This is not noticed when I develop the DE2 CCU driver. Fix the binding by using different compatibles for A83T and H3, adding notes for the PLL_DE usage on A83T, and change

[PATCH v2 01/10] dt-bindings: fix the binding of Allwinner DE2 CCU of A83T and H3

The DE2 CCU is different on A83T and H3 -- the parent of the clocks on A83T is PLL_DE but on H3 it's the DE module clock. This is not noticed when I develop the DE2 CCU driver. Fix the binding by using different compatibles for A83T and H3, adding notes for the PLL_DE usage on A83T, and change

[PATCH v2 00/10] Allwinner H3/H5/A64(DE2) SimpleFB support

This patchset adds support for the SimpleFB on Allwinner SoCs with "Display Engine 2.0". PATCH 1 to PATCH 3 are DE2 CCU fixes for H3/H5 SoCs. PATCH 4 adds the pipeline strings for DE2 SimpleFB. PATCH 5 to 7 adds necessary device tree nodes (DE2 CCU and SimpleFB) for H3/H5 SoCs. PATCH 8 to 10

[PATCH v2 00/10] Allwinner H3/H5/A64(DE2) SimpleFB support

This patchset adds support for the SimpleFB on Allwinner SoCs with "Display Engine 2.0". PATCH 1 to PATCH 3 are DE2 CCU fixes for H3/H5 SoCs. PATCH 4 adds the pipeline strings for DE2 SimpleFB. PATCH 5 to 7 adds necessary device tree nodes (DE2 CCU and SimpleFB) for H3/H5 SoCs. PATCH 8 to 10

Re: [PATCH v2 1/3] dt-bindings: mailbox: Introduce Hi3660 controller binding

On Fri, Oct 27, 2017 at 09:38:44AM -0500, Rob Herring wrote: > On Fri, Oct 27, 2017 at 02:15:02PM +0800, Kaihua Zhong wrote: > > From: Leo Yan > > > > Introduce a binding for the Hi3660 mailbox controller, the mailbox is > > used within application processor (AP),

Re: [PATCH v2 1/3] dt-bindings: mailbox: Introduce Hi3660 controller binding

On Fri, Oct 27, 2017 at 09:38:44AM -0500, Rob Herring wrote: > On Fri, Oct 27, 2017 at 02:15:02PM +0800, Kaihua Zhong wrote: > > From: Leo Yan > > > > Introduce a binding for the Hi3660 mailbox controller, the mailbox is > > used within application processor (AP), communication processor (CP), >

Re: [PATCH] drm/bridge/synopsys: dsi: add optional pixel clock

Hi Andrzej, On 10/27/2017 08:41 AM, Andrzej Hajda wrote: > On 26.10.2017 18:09, Philippe Cornu wrote: >> The pixel clock is optional. When available, it offers a better >> preciseness for timing computations. >> >> Signed-off-by: Philippe Cornu >> --- >>

Re: [PATCH] drm/bridge/synopsys: dsi: add optional pixel clock

Hi Andrzej, On 10/27/2017 08:41 AM, Andrzej Hajda wrote: > On 26.10.2017 18:09, Philippe Cornu wrote: >> The pixel clock is optional. When available, it offers a better >> preciseness for timing computations. >> >> Signed-off-by: Philippe Cornu >> --- >>

Re: [PATCH net-next 0/9] net: dsa: define port types

From: Vivien Didelot Date: Thu, 26 Oct 2017 11:22:50 -0400 > The DSA code currently has 3 bitmaps in the dsa_switch structure: > cpu_port_mask, dsa_port_mask and enabled_port_mask. > > They are used to store the type of each switch port. This dates back >

Re: [PATCH net-next 0/9] net: dsa: define port types

From: Vivien Didelot Date: Thu, 26 Oct 2017 11:22:50 -0400 > The DSA code currently has 3 bitmaps in the dsa_switch structure: > cpu_port_mask, dsa_port_mask and enabled_port_mask. > > They are used to store the type of each switch port. This dates back > from when DSA didn't have a dsa_port

Re: [patch-rt] drivers/zram: pass num_pages to zram_meta_init_table_locks()

On 2017-10-19 06:27:27 [+0200], Mike Galbraith wrote: > > zram cleanup forgot to adjust passed argument when changing > zram_meta_init_table_locks() to expect page count instead > of disk size. Doing so fixes ltp inspired explosions. Thank you. Since only v4.13-RT is affected, I merged this

Re: [patch-rt] drivers/zram: pass num_pages to zram_meta_init_table_locks()

On 2017-10-19 06:27:27 [+0200], Mike Galbraith wrote: > > zram cleanup forgot to adjust passed argument when changing > zram_meta_init_table_locks() to expect page count instead > of disk size. Doing so fixes ltp inspired explosions. Thank you. Since only v4.13-RT is affected, I merged this

Re: [PATCH] net: faraday: ftmac100: Use BUG_ON instead of if condition followed by BUG.

From: "Gustavo A. R. Silva" Date: Thu, 26 Oct 2017 07:27:45 -0500 > Notice that in this particular case unlikely() is already being called > inside BUG_ON macro. > > This issue was detected with the help of Coccinelle. > > Signed-off-by: Gustavo A. R. Silva

Re: [PATCH] net: faraday: ftmac100: Use BUG_ON instead of if condition followed by BUG.

From: "Gustavo A. R. Silva" Date: Thu, 26 Oct 2017 07:27:45 -0500 > Notice that in this particular case unlikely() is already being called > inside BUG_ON macro. > > This issue was detected with the help of Coccinelle. > > Signed-off-by: Gustavo A. R. Silva Applied.

Re: [PATCH v3] mtd: nand: omap2: Fix subpage write

On Fri, 20 Oct 2017 15:16:21 +0300 Roger Quadros wrote: > Since v4.12, NAND subpage writes were causing a NULL pointer > dereference on OMAP platforms (omap2-nand) using OMAP_ECC_BCH4_CODE_HW, > OMAP_ECC_BCH8_CODE_HW and OMAP_ECC_BCH16_CODE_HW. > > This is because for those ECC

Re: [PATCH v3] mtd: nand: omap2: Fix subpage write

On Fri, 20 Oct 2017 15:16:21 +0300 Roger Quadros wrote: > Since v4.12, NAND subpage writes were causing a NULL pointer > dereference on OMAP platforms (omap2-nand) using OMAP_ECC_BCH4_CODE_HW, > OMAP_ECC_BCH8_CODE_HW and OMAP_ECC_BCH16_CODE_HW. > > This is because for those ECC modes,

Re: [PATCH] net: bcmgenet: Use BUG_ON instead of if condition followed by BUG

From: "Gustavo A. R. Silva" Date: Thu, 26 Oct 2017 07:16:01 -0500 > Use BUG_ON instead of if condition followed by BUG. > > Something to notice in this particular case is that unlikely() > is already being called inside BUG_ON macro. > > This issue was detected with

Re: [PATCH] net: bcmgenet: Use BUG_ON instead of if condition followed by BUG

From: "Gustavo A. R. Silva" Date: Thu, 26 Oct 2017 07:16:01 -0500 > Use BUG_ON instead of if condition followed by BUG. > > Something to notice in this particular case is that unlikely() > is already being called inside BUG_ON macro. > > This issue was detected with the help of Coccinelle. >

Re: [PATCH v2] KVM: arm/arm64: Fix external abort type matching

On Thu, Oct 26 2017 at 6:07:01 pm BST, Dongjiu Geng wrote: > For this matching, current code using the {I,D}FSC > range to match kvm_vcpu_trap_get_fault_type() return > value, but kvm_vcpu_trap_get_fault_type() only return > the part {I,D}FSC instead of whole, so fix

Re: [PATCH v2] KVM: arm/arm64: Fix external abort type matching

On Thu, Oct 26 2017 at 6:07:01 pm BST, Dongjiu Geng wrote: > For this matching, current code using the {I,D}FSC > range to match kvm_vcpu_trap_get_fault_type() return > value, but kvm_vcpu_trap_get_fault_type() only return > the part {I,D}FSC instead of whole, so fix this issue > > Value

Re: [PATCH] dt-bindings: display: stm32: add pixel clock mandatory property

Hi Rob, On 10/27/2017 04:38 PM, Rob Herring wrote: > On Thu, Oct 26, 2017 at 06:12:36PM +0200, Philippe Cornu wrote: >> Add the DPI/RGB input pixel clock in mandatory properties >> because it really offers a better preciseness for timing >> computations. >> Note: Fix also the DSI panel example

Re: [PATCH] dt-bindings: display: stm32: add pixel clock mandatory property

Hi Rob, On 10/27/2017 04:38 PM, Rob Herring wrote: > On Thu, Oct 26, 2017 at 06:12:36PM +0200, Philippe Cornu wrote: >> Add the DPI/RGB input pixel clock in mandatory properties >> because it really offers a better preciseness for timing >> computations. >> Note: Fix also the DSI panel example

Re: mptsas driver cannot detect hotplugging disk with the LSI SCSI SAS1068 controller in Ubuntu guest on VMware

On 10/27/2017 04:02 PM, Gavin Guo wrote: > Hi Hannes, > > Thank you for looking into the issue. If there is anything I can help > to test the patch? I appreciate your help. Thank you. > If you had checked linux-scsi you would have found this patch: '[PATCH] mptsas: Fixup device hotplug for

Re: mptsas driver cannot detect hotplugging disk with the LSI SCSI SAS1068 controller in Ubuntu guest on VMware

On 10/27/2017 04:02 PM, Gavin Guo wrote: > Hi Hannes, > > Thank you for looking into the issue. If there is anything I can help > to test the patch? I appreciate your help. Thank you. > If you had checked linux-scsi you would have found this patch: '[PATCH] mptsas: Fixup device hotplug for

[PATCH v2] staging: ccree: Fix indentation in ssi_buffer_mgr.c

In particular, fixes some over-indented if statement bodies as well as a couple lines indented with spaces. checkpatch.pl now reports no warnings on this file other than 80 character warnings. Signed-off-by: Stephen Brennan --- V2 also fixes an overlooked indentation error

[PATCH v2] staging: ccree: Fix indentation in ssi_buffer_mgr.c

In particular, fixes some over-indented if statement bodies as well as a couple lines indented with spaces. checkpatch.pl now reports no warnings on this file other than 80 character warnings. Signed-off-by: Stephen Brennan --- V2 also fixes an overlooked indentation error that checkpatch didn't

RE: [PATCH 4/5] staging: fsl-dpaa2/eth: Change RX buffer alignment

> -Original Message- > From: Dan Carpenter [mailto:dan.carpen...@oracle.com] > Sent: Friday, October 27, 2017 5:30 PM > To: Bogdan Purcareata > Cc: Ruxandra Ioana Radulescu ; > gre...@linuxfoundation.org; linux-kernel@vger.kernel.org;

RE: [PATCH 4/5] staging: fsl-dpaa2/eth: Change RX buffer alignment

> -Original Message- > From: Dan Carpenter [mailto:dan.carpen...@oracle.com] > Sent: Friday, October 27, 2017 5:30 PM > To: Bogdan Purcareata > Cc: Ruxandra Ioana Radulescu ; > gre...@linuxfoundation.org; linux-kernel@vger.kernel.org; > de...@driverdev.osuosl.org > Subject: Re: [PATCH

Re: [PATCH v2 30/37] can/bcm: Replace hrtimer_tasklet with softirq based hrtimer

On 10/22/2017 11:40 PM, Anna-Maria Gleixner wrote: From: Thomas Gleixner Switch the timer to HRTIMER_MODE_SOFT, which executed the timer callback in softirq context and remove the hrtimer_tasklet. Signed-off-by: Thomas Gleixner Signed-off-by:

Re: [PATCH v2 30/37] can/bcm: Replace hrtimer_tasklet with softirq based hrtimer

On 10/22/2017 11:40 PM, Anna-Maria Gleixner wrote: From: Thomas Gleixner Switch the timer to HRTIMER_MODE_SOFT, which executed the timer callback in softirq context and remove the hrtimer_tasklet. Signed-off-by: Thomas Gleixner Signed-off-by: Anna-Maria Gleixner Cc: Oliver Hartkopp

RE: [PATCH 3/5] staging: fsl-dpaa2/eth: Don't account SWA in tx_data_offset

> -Original Message- > From: Dan Carpenter [mailto:dan.carpen...@oracle.com] > Sent: Friday, October 27, 2017 5:34 PM > To: Bogdan Purcareata > Cc: Ruxandra Ioana Radulescu ; > gre...@linuxfoundation.org; linux-kernel@vger.kernel.org;

RE: [PATCH 3/5] staging: fsl-dpaa2/eth: Don't account SWA in tx_data_offset

> -Original Message- > From: Dan Carpenter [mailto:dan.carpen...@oracle.com] > Sent: Friday, October 27, 2017 5:34 PM > To: Bogdan Purcareata > Cc: Ruxandra Ioana Radulescu ; > gre...@linuxfoundation.org; linux-kernel@vger.kernel.org; > de...@driverdev.osuosl.org > Subject: Re: [PATCH

[PATCH v5 02/26] KVM: arm/arm64: register irq bypass consumer on ARM/ARM64

From: Eric Auger This patch selects IRQ_BYPASS_MANAGER and HAVE_KVM_IRQ_BYPASS configs for ARM/ARM64. kvm_arch_has_irq_bypass() now is implemented and returns true. As a consequence the irq bypass consumer will be registered for ARM/ARM64 with the forwarding callbacks: -

[PATCH v5 02/26] KVM: arm/arm64: register irq bypass consumer on ARM/ARM64

From: Eric Auger This patch selects IRQ_BYPASS_MANAGER and HAVE_KVM_IRQ_BYPASS configs for ARM/ARM64. kvm_arch_has_irq_bypass() now is implemented and returns true. As a consequence the irq bypass consumer will be registered for ARM/ARM64 with the forwarding callbacks: - stop/start:

[PATCH v5 03/26] KVM: arm/arm64: vgic: restructure kvm_vgic_(un)map_phys_irq

From: Eric Auger We want to reuse the core of the map/unmap functions for IRQ forwarding. Let's move the computation of the hwirq in kvm_vgic_map_phys_irq and pass the linux IRQ as parameter. the host_irq is added to struct vgic_irq. We introduce kvm_vgic_map/unmap_irq

[PATCH v5 03/26] KVM: arm/arm64: vgic: restructure kvm_vgic_(un)map_phys_irq

From: Eric Auger We want to reuse the core of the map/unmap functions for IRQ forwarding. Let's move the computation of the hwirq in kvm_vgic_map_phys_irq and pass the linux IRQ as parameter. the host_irq is added to struct vgic_irq. We introduce kvm_vgic_map/unmap_irq which take a struct

Re: [PATCH] staging: ccree: Fix indentation in ssi_buffer_mgr.c

On Fri, Oct 27, 2017 at 07:23:58AM -0700, Joe Perches wrote: > On Fri, 2017-10-27 at 11:32 +0300, Dan Carpenter wrote: > > But then ssi_buffer_mgr_copy_scatterlist_portion() is still not indented > > correctly. Yeah, I don't know how I missed it. I'll send a new version of the patch out

Re: [PATCH] staging: ccree: Fix indentation in ssi_buffer_mgr.c

On Fri, Oct 27, 2017 at 07:23:58AM -0700, Joe Perches wrote: > On Fri, 2017-10-27 at 11:32 +0300, Dan Carpenter wrote: > > But then ssi_buffer_mgr_copy_scatterlist_portion() is still not indented > > correctly. Yeah, I don't know how I missed it. I'll send a new version of the patch out

Re: [PATCH v9 02/10] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY

On Tue, Oct 24, 2017 at 07:57:06PM +0200, Corentin Labbe wrote: > This patch add documentation about the MDIO switch used on sun8i-h3-emac > for integrated PHY. > > Signed-off-by: Corentin Labbe > --- > .../devicetree/bindings/net/dwmac-sun8i.txt| 145 >

Re: [PATCH v9 02/10] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY

On Tue, Oct 24, 2017 at 07:57:06PM +0200, Corentin Labbe wrote: > This patch add documentation about the MDIO switch used on sun8i-h3-emac > for integrated PHY. > > Signed-off-by: Corentin Labbe > --- > .../devicetree/bindings/net/dwmac-sun8i.txt| 145 > +++-- > 1 file

Re: [PATCH 2/8] PCI: host: brcmstb: add DT docs for Brcmstb PCIe device

On Tue, Oct 24, 2017 at 02:15:43PM -0400, Jim Quinlan wrote: > The DT bindings description of the Brcmstb PCIe device is described. This > node can be used by almost all Broadcom settop box chips, using > ARM, ARM64, or MIPS CPU architectures. "dt-bindings: pci: ..." for the subject please. >

Re: [PATCH 2/8] PCI: host: brcmstb: add DT docs for Brcmstb PCIe device

On Tue, Oct 24, 2017 at 02:15:43PM -0400, Jim Quinlan wrote: > The DT bindings description of the Brcmstb PCIe device is described. This > node can be used by almost all Broadcom settop box chips, using > ARM, ARM64, or MIPS CPU architectures. "dt-bindings: pci: ..." for the subject please. >

Re: [PATCH net-next v3 1/2] dt-bindings: net: add DT bindings for Socionext UniPhier AVE

On Wed, Oct 25, 2017 at 10:07:58AM +0900, Kunihiko Hayashi wrote: > DT bindings for the AVE ethernet controller found on Socionext's > UniPhier platforms. > > Signed-off-by: Kunihiko Hayashi > Signed-off-by: Jassi Brar > --- >

Re: [PATCH net-next v3 1/2] dt-bindings: net: add DT bindings for Socionext UniPhier AVE

On Wed, Oct 25, 2017 at 10:07:58AM +0900, Kunihiko Hayashi wrote: > DT bindings for the AVE ethernet controller found on Socionext's > UniPhier platforms. > > Signed-off-by: Kunihiko Hayashi > Signed-off-by: Jassi Brar > --- > .../bindings/net/socionext,uniphier-ave4.txt | 48 >

Re: [tip:sched/core] sched/isolation: Document the isolcpus= flags

On Fri, 2017-10-27 at 15:58 +0200, Peter Zijlstra wrote: > On Fri, Oct 27, 2017 at 05:06:25AM -0700, tip-bot for Frederic Weisbecker > wrote: > > + isolcpus= [KNL,SMP] Isolate a given set of CPUs from disturbance. > > + Format: [flag-list,] > > + > > +

Re: [tip:sched/core] sched/isolation: Document the isolcpus= flags

On Fri, 2017-10-27 at 15:58 +0200, Peter Zijlstra wrote: > On Fri, Oct 27, 2017 at 05:06:25AM -0700, tip-bot for Frederic Weisbecker > wrote: > > + isolcpus= [KNL,SMP] Isolate a given set of CPUs from disturbance. > > + Format: [flag-list,] > > + > > +

Re: [PATCH v9 5/5] dt-bindings: watchdog: Add bindings for RAVE SP watchdog driver

On Wed, Oct 25, 2017 at 12:04:21PM -0700, Andrey Smirnov wrote: > Add Device Tree bindings for RAVE SP watchdog drvier - an MFD cell of > parent RAVE SP driver (documented in > Documentation/devicetree/bindings/mfd/zii,rave-sp.txt). > > Cc: linux-kernel@vger.kernel.org > Cc:

Re: [PATCH v9 5/5] dt-bindings: watchdog: Add bindings for RAVE SP watchdog driver

On Wed, Oct 25, 2017 at 12:04:21PM -0700, Andrey Smirnov wrote: > Add Device Tree bindings for RAVE SP watchdog drvier - an MFD cell of > parent RAVE SP driver (documented in > Documentation/devicetree/bindings/mfd/zii,rave-sp.txt). > > Cc: linux-kernel@vger.kernel.org > Cc:

Re: [PATCH] dt-bindings: display: stm32: add pixel clock mandatory property

On Thu, Oct 26, 2017 at 06:12:36PM +0200, Philippe Cornu wrote: > Add the DPI/RGB input pixel clock in mandatory properties > because it really offers a better preciseness for timing > computations. > Note: Fix also the DSI panel example where "ref" & "pclk" > clocks were swapped. > >

Re: [PATCH] dt-bindings: display: stm32: add pixel clock mandatory property

On Thu, Oct 26, 2017 at 06:12:36PM +0200, Philippe Cornu wrote: > Add the DPI/RGB input pixel clock in mandatory properties > because it really offers a better preciseness for timing > computations. > Note: Fix also the DSI panel example where "ref" & "pclk" > clocks were swapped. > >

Re: [PATCH v1 1/2] dt-bindings: display: stm32: add a 2nd endpoint

On Thu, Oct 26, 2017 at 01:48:08PM +0200, Philippe Cornu wrote: > ltdc can have up to 2 endpoints: > - dpi external gpios: for rgb panels or external bridge ICs. > - dpi internal ios: connected internally to dsi. > > Note: Refer to the reference manual to know if the dsi is > present on your

Re: [PATCH v1 1/2] dt-bindings: display: stm32: add a 2nd endpoint

On Thu, Oct 26, 2017 at 01:48:08PM +0200, Philippe Cornu wrote: > ltdc can have up to 2 endpoints: > - dpi external gpios: for rgb panels or external bridge ICs. > - dpi internal ios: connected internally to dsi. > > Note: Refer to the reference manual to know if the dsi is > present on your

Re: [PATCH v2 1/3] dt-bindings: mailbox: Introduce Hi3660 controller binding

On Fri, Oct 27, 2017 at 02:15:02PM +0800, Kaihua Zhong wrote: > From: Leo Yan > > Introduce a binding for the Hi3660 mailbox controller, the mailbox is > used within application processor (AP), communication processor (CP), > HIFI and MCU, etc. > > Cc: John Stultz

Re: [PATCH v2 1/3] dt-bindings: mailbox: Introduce Hi3660 controller binding

On Fri, Oct 27, 2017 at 02:15:02PM +0800, Kaihua Zhong wrote: > From: Leo Yan > > Introduce a binding for the Hi3660 mailbox controller, the mailbox is > used within application processor (AP), communication processor (CP), > HIFI and MCU, etc. > > Cc: John Stultz > Cc: Guodong Xu > Cc:

Re: [RFC PATCH v8 4/7] of/irq: Adjust of pci irq parsing for multiple interrupts

On Thu, Oct 26, 2017 at 09:28:37PM +0800, Jeffy Chen wrote: > Currently we are considering the first irq as the PCI interrupt pin, > but a pci device may have multiple interrupts(e.g. PCIe WAKE# pin). > > Only parse the PCI interrupt pin when the irq is unnamed or named as > "pci". > >

Re: [PATCH v2 1/3] dt-bindings: soc: qcom: Support GLINK intents

On Thu, Oct 26, 2017 at 03:28:54PM -0700, Chris Lew wrote: > Virtual GLINK channels may know what throughput to expect from a > remoteproc. An intent advertises to the remoteproc this channel is > ready to receive data. Allow a channel to define the size and amount of > intents to be prequeued. >

Re: [RFC PATCH v8 4/7] of/irq: Adjust of pci irq parsing for multiple interrupts

On Thu, Oct 26, 2017 at 09:28:37PM +0800, Jeffy Chen wrote: > Currently we are considering the first irq as the PCI interrupt pin, > but a pci device may have multiple interrupts(e.g. PCIe WAKE# pin). > > Only parse the PCI interrupt pin when the irq is unnamed or named as > "pci". > >

Re: [PATCH v2 1/3] dt-bindings: soc: qcom: Support GLINK intents

On Thu, Oct 26, 2017 at 03:28:54PM -0700, Chris Lew wrote: > Virtual GLINK channels may know what throughput to expect from a > remoteproc. An intent advertises to the remoteproc this channel is > ready to receive data. Allow a channel to define the size and amount of > intents to be prequeued. >

Re: [PATCH 2/2] backlight: pwm_bl: add configurable delay between re-enabling PWM and switching backlight power on

On Thu, Oct 26, 2017 at 02:49:46PM +0200, Lothar Waßmann wrote: > When switching the backlight on, the LCD may need some time to adjust > to the configured PWM duty cycle. Add a configurable delay between > configuring the PWM and enabling the backlight regulator to account > for this. > >

Re: [PATCH 2/2] backlight: pwm_bl: add configurable delay between re-enabling PWM and switching backlight power on

On Thu, Oct 26, 2017 at 02:49:46PM +0200, Lothar Waßmann wrote: > When switching the backlight on, the LCD may need some time to adjust > to the configured PWM duty cycle. Add a configurable delay between > configuring the PWM and enabling the backlight regulator to account > for this. > >

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