On Tue 2018-12-11 19:26:48, Tetsuo Handa wrote:
> >From bdb80508390694456f3f864f9651d047ded109bf Mon Sep 17 00:00:00 2001
> From: Tetsuo Handa
> Date: Tue, 11 Dec 2018 19:23:30 +0900
> Subject: [PATCH v4] printk: Add caller information to printk() output.
>
> Sometimes we want to print a series o
On Wed, Dec 12, 2018 at 05:50:16PM +0100, Vitaly Kuznetsov wrote:
> Turns out we over-engineered Direct Mode for stimers a bit: unlike
> traditional stimers where we may want to try to re-inject the message upon
> EOI, Direct Mode stimers just set the irq in APIC and kvm_apic_set_irq()
> fails only
On Wed, Dec 12, 2018 at 05:50:17PM +0100, Vitaly Kuznetsov wrote:
> APIC vectors used for direct mode stimers should be valid for lAPIC and
> just like genuine Hyper-V we should #GP when an illegal one is specified.
>
> Add the appropriate check to stimer_set_config()
>
> Suggested-by: Roman Kaga
[Cc'ing linux-integrity]
On Thu, 2018-12-13 at 12:26 +0100, Florian Weimer wrote:
> * Mimi Zohar:
>
> > The indication needs to be set during file open, before the open
> > returns to the caller. This is the point where ima_file_check()
> > verifies the file's signature. On failure, access to t
Hi,
On 12/03/2018 09:55 PM, Jonathan Neuschäfer wrote:
Hi,
On Thu, Nov 29, 2018 at 07:00:16PM +, Christophe Leroy wrote:
This patch reworks mmu_mapin_ram() to be more generic and map as much
blocks as possible. It now supports blocks not starting at address 0.
It scans DBATs array to find
* David Hildenbrand (da...@redhat.com) wrote:
> On 13.12.18 11:00, Dr. David Alan Gilbert wrote:
> > * David Hildenbrand (da...@redhat.com) wrote:
> >> On 13.12.18 10:13, Dr. David Alan Gilbert wrote:
> >>> * David Hildenbrand (da...@redhat.com) wrote:
> On 10.12.18 18:12, Vivek Goyal wrote:
>
On Thu, Dec 13, 2018 at 06:04:20AM -0500, Mimi Zohar wrote:
> > I don't have a problem with the concept, but we're running low on O_ bits.
> > Does this have to be done before the process gets a file descriptor,
> > or could we have a new syscall? Since we're going to be changing the
> > interpret
On Thu, Dec 13, 2018 at 10:05:14AM +0100, Richard Weinberger wrote:
> On Thu, Dec 13, 2018 at 6:03 AM Kevin Easton wrote:
> >
> > On Tue, Dec 11, 2018 at 11:29:14AM +0100, John Paul Adrian Glaubitz wrote:
> > ...
> > > I can't say anything about the syscall interface. However, what I do know
> > >
This patch allows reading and writing the input voltage and current
limit through the POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT and
POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT sysfs properties. This allows
userspace to see current values and to re-configure these values at
runtime based on system-level knowl
This is part of the Pixel C's thermal management strategy to effectively
limit the input power to 5V 3A when the screen is on. When the screen is
on, the display, the CPU, and the GPU all contribute more heat to the
system than while the screen is off, and we made a tradeoff to throttle
the charger
The patch
regulator: add documentation for regulator modes and suspend states
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in
The patch
regulator: act8945a-regulator: add shutdown function
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 ho
In order to comply with SMBus specification, the Axxia I²C module will
abort the multi message transfer if the delay between finishing sending
one message and starting another is longer than 25ms. Unfortunately it
isn't that hard to trigger this situation on a busy system. In order to
fix this prob
The patch
ASoC: meson: axg-toddr: add support for spdifin backend
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) a
The patch
regulator: act8945a-regulator: unlock expert registers
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24
The patch
doc: lpspi: Document DT bindings for LPSPI slave mode
has been applied to the spi tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and se
The patch
ASoC: meson: add axg spdif input DT binding documentation
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours)
The patch
regulator: act8945a-regulator: Implement PM functionalities
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the nex
The patch
ASoC: meson: add axg spdif input
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
The patch
regulator: arizona-ldo1: Rely on core to handle GPIO descriptor
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the
The patch
regulator: wm8994: Rely on core to handle GPIO descriptor
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next
The patch
regulator: act8945a-regulator: fix line over 80 chars warning
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the n
The patch
MAINTAINERS: Add Amlogic sound drivers entry
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to
On Thu, Dec 06, 2018 at 05:44:02PM -0600, Jeremy Linton wrote:
> Part of this series was originally by Mian Yousaf Kaukab.
>
> Arm64 machines should be displaying a human readable
> vulnerability status to speculative execution attacks in
> /sys/devices/system/cpu/vulnerabilities
Is there any ag
Hi Chunyan,
On 11/12/18 2:42 PM, Chunyan Zhang wrote:
> Some standard SD host controllers can support both external dma
> controllers as well as ADMA/SDMA in which the SD host controller
> acts as DMA master. TI's omap controller is the case as an example.
>
> Currently the generic SDHCI code sup
On 13/12/2018 11:35, Ard Biesheuvel wrote:
> On Thu, 13 Dec 2018 at 09:54, Julien Thierry wrote:
>>
>>
>>
>> On 12/12/2018 18:10, Ard Biesheuvel wrote:
>>> On Wed, 12 Dec 2018 at 18:59, Julien Thierry wrote:
On 12/12/2018 17:27, Ard Biesheuvel wrote:
> On Wed, 12 Dec 20
Il 13/12/2018 04:08, Jonathan Liu ha scritto:
Hi Giulio,
On Wed, 12 Dec 2018 at 04:20, Giulio Benetti
wrote:
Hi Jonathan,
Il 11/12/2018 11:49, Jonathan Liu ha scritto:
Hi Giulio,
On Thu, 6 Dec 2018 at 22:00, Giulio Benetti
wrote:
Hi Jonathan,
Il 06/12/2018 08:29, Jonathan Liu ha scr
Tudor,
On Thu, Dec 13, 2018 at 10:26:53AM +, tudor.amba...@microchip.com wrote:
>
> On 12/11/2018 06:59 PM, Vitaly Chikunov wrote:
> > Current akcipher .verify() just decrypts signature to uncover message
> > hash, which is then verified in upper level public_key_verify_signature
> > by memcm
On Mon, Dec 10, 2018 at 08:42:12PM +0200, Priit Laes wrote:
> Signed-off-by: Olliver Schinagl
> Signed-off-by: Priit Laes
> Acked-for-MFD-by: Lee Jones
What's going on with this patch? Will you be applying it or is this an
ack for it to be applied with the rest of the series?
signature.asc
On Wed, Dec 12, 2018 at 05:37:35PM +0100, Christian Borntraeger wrote:
>
>
> On 10.12.2018 18:12, Vivek Goyal wrote:
> > From: Stefan Hajnoczi
>
> > +static int virtio_fs_setup_dax(struct virtio_device *vdev, struct
> > virtio_fs *fs)
> > +{
> > + struct virtio_fs_memremap_info *mi;
> > +
Hi Neil,
On 2018/12/13 16:49, Neil Armstrong wrote:
Hi Sunny,
On 13/12/2018 09:39, Sunny Luo wrote:
The SPICC controller in Meson-AXG is capable of running at 80M clock.
The ASIC IP is improved and the clock is actually running higher than
previous old SoCs.
Signed-off-by: Sunny Luo
Signed-o
On 13/12/2018 10:59, Shameer Kolothum wrote:
> From: Shanker Donthineni
>
> The NUMA node information is visible to ITS driver but not being used
> other than handling hardware errata. ITS/GICR hardware accesses to the
> local NUMA node is usually quicker than the remote NUMA node. How slow
> the
On Thu 2018-12-13 01:51:22, Liu, Chuansheng wrote:
> Based on patch commit 401c636a0eeb ("kernel/hung_task.c:
> show all hung tasks before panic"), we could get the
> call stack of hung task.
>
> However, if the console loglevel is not high, we still
> can not see the useful panic information in p
On Thu, Dec 13, 2018 at 10:04:56AM +0100, Jerome Brunet wrote:
> On Thu, 2018-12-13 at 16:39 +0800, Sunny Luo wrote:
> >
> > writel_bits_relaxed(BIT(24), BIT(24), spicc->base + SPICC_TESTREG);
> >
> > + meson_spicc_oen_enable(spicc);
> > +
> Any specific reason for doing this in prepare
On Tue, Nov 27, 2018 at 09:23:49AM +0100, Pablo Neira Ayuso wrote:
> On Tue, Nov 27, 2018 at 03:20:45AM +0100, Christian Brauner wrote:
> > On Tue, Nov 27, 2018 at 01:20:47AM +0100, Pablo Neira Ayuso wrote:
> > > Hi,
> > >
> > > On Wed, Nov 07, 2018 at 02:48:58PM +0100, Christian Brauner wrote:
>
Hi Jonathan,
Il 13/12/2018 03:55, Jonathan Liu ha scritto:
Can you precisely point me the sources of:
- u-boot
- kernel
- dts
you're using?
Thanks
U-Boot - git tag v2017.03
Linux - git tag v4.19.6
DTS - see device tree changes in
https://github.com/net147/linux/tree/sun7i-drm-wip but change
On Tue, 2018-12-11 at 15:12 -0800, Sean Wang wrote:
> Sorry for that I didn't have a full review at one time in the earlier version
>
>On Mon, Dec 10, 2018 at 9:37 PM Long Cheng
> wrote:
> >
> > In DMA engine framework, add 8250 mtk dma to support it.
>
> It looks like there are still ma
On Thu, 13 Dec 2018 at 09:54, Julien Thierry wrote:
>
>
>
> On 12/12/2018 18:10, Ard Biesheuvel wrote:
> > On Wed, 12 Dec 2018 at 18:59, Julien Thierry wrote:
> >>
> >>
> >>
> >> On 12/12/2018 17:27, Ard Biesheuvel wrote:
> >>> On Wed, 12 Dec 2018 at 17:48, Julien Thierry
> >>> wrote:
>
>
On Thu, Dec 13, 2018 at 11:01:49AM +0100, Peter Zijlstra wrote:
> On Wed, Dec 12, 2018 at 08:26:39PM -0500, Steven Rostedt wrote:
> > On Thu, 13 Dec 2018 03:39:38 +0300
> > "Dmitry V. Levin" wrote:
> >
> > > btw, I didn't ask for the implementation to be ugly.
> > > You don't have to introduce po
On Wed, Dec 12, 2018 at 10:20:42PM -0800, Eric Dumazet wrote:
> On 12/12/2018 06:28 PM, Michal Kubecek wrote:
> > Since commit 7969e5c40dfd ("ip: discard IPv4 datagrams with overlapping
> > segments.") IPv4 reassembly code drops the whole queue whenever an
> > overlapping fragment is received. Howe
* Mimi Zohar:
> The indication needs to be set during file open, before the open
> returns to the caller. This is the point where ima_file_check()
> verifies the file's signature. On failure, access to the file is
> denied.
Does this verification happen for open with O_PATH?
Thanks,
Florian
On 13.12.18 11:00, Dr. David Alan Gilbert wrote:
> * David Hildenbrand (da...@redhat.com) wrote:
>> On 13.12.18 10:13, Dr. David Alan Gilbert wrote:
>>> * David Hildenbrand (da...@redhat.com) wrote:
On 10.12.18 18:12, Vivek Goyal wrote:
> Instead of assuming we had the fixed bar for the ca
On Thu, Dec 13, 2018 at 12:19:26PM +0100, Christian Zigotzky wrote:
> I tried it again but I get the following error message:
>
> MODPOST vmlinux.o
> arch/powerpc/kernel/dma-iommu.o: In function `.dma_iommu_get_required_mask':
> (.text+0x274): undefined reference to `.dma_direct_get_required_mask'
On Wed, Dec 12, 2018 at 03:15:01PM +0200, Andy Shevchenko wrote:
> On Wed, Dec 12, 2018 at 11:25:37AM +0100, Jiri Olsa wrote:
> > So user could specify outside CFLAGS values.
>
> For all three where I'm in Cc list
> Reviewed-by: Andy Shevchenko
thanks, I should have cc-ed you on all of them ;-)
The HiSilicon ZIP accelerator implements the zlib and gzip algorithm. It
uses Hisilicon QM as the interface to the CPU.
This patch provides PCIe driver to the accelerator and register it to
the crypto subsystem.
Signed-off-by: Zhou Wang
Signed-off-by: Shiju Jose
Signed-off-by: Kenneth Lee
Sign
QM is a general IP used by HiSilicon accelerators. It provides a general
PCIe interface for the CPU and the accelerator to share a group of queues.
A QM integrated in an accelerator provides queue management service. Queues
can be assigned to PF and VFs, and queues can be controlled by unified
mai
Add Zhou Wang as a maintainer for HiSilicon QM and ZIP controller driver.
Signed-off-by: Zhou Wang
reviewed-by: John Garry
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0767f1d..5be84e2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -
Hi Michael,
On 12/12/2018 05:00, Michael Kelley wrote:
> From: Marc Zyngier Sent: Friday, December 7, 2018
> 6:43 AM
>
>>> Add ARM64-specific code to enable Hyper-V. This code includes:
>>> * Detecting Hyper-V and initializing the guest/Hyper-V interface
>>> * Setting up Hyper-V's synthetic cl
This series adds HiSilicon QM and ZIP controller driver in crypto subsystem.
A simple QM/ZIP driver which helps to provide an example for a general
accelerator framework is under review in community[1]. Based on this simple
driver, this series adds HW v2 support, PCI passthrough, reset, PCI/misc e
On Wed, Dec 12, 2018 at 06:50:25PM +, Jonathan Cameron wrote:
> On Wed, 12 Dec 2018 11:25:36 +0100
> Jiri Olsa wrote:
>
> > So user could specify outside CFLAGS values.
> >
> > Cc: Andy Shevchenko
> > Cc: Jonathan Cameron
> > Cc: Hartmut Knaack
> > Cc: Lars-Peter Clausen
> > Signed-off-b
Attn:The Beneficiary
Under the United Nations scam victims rehabilitation scheme You are
listed and approved to receive payment of of US$750.000.00 as one of
the scammed victims.
Be guided therefore to get in touch with the country supervising
payment officer in Nigeria ASAP via his given informa
Add debugfs descriptions for HiSilicon ZIP and QM driver.
Signed-off-by: Zhou Wang
reviewed-by: Jonathan Cameron
---
Documentation/ABI/testing/debugfs-hisi-zip | 50 ++
1 file changed, 50 insertions(+)
create mode 100644 Documentation/ABI/testing/debugfs-hisi-zip
d
On Thu, Dec 13, 2018 at 11:13:58AM +0100, Roman Penyaev wrote:
> On 2018-12-12 18:13, Andrea Parri wrote:
> > On Wed, Dec 12, 2018 at 12:03:57PM +0100, Roman Penyaev wrote:
>
> [...]
>
> > > +static inline void list_add_tail_lockless(struct list_head *new,
> > > +
On 13 December 2018 at 10:47AM, Christian Zigotzky wrote:
On 13 December 2018 at 10:10AM, Christoph Hellwig wrote:
On Thu, Dec 13, 2018 at 09:41:50AM +0100, Christian Zigotzky wrote:
Today I tried the first patch (0001-get_required_mask.patch) with
the last
good commit (977706f9755d2d697aa6f45b
On Thu, Dec 13, 2018 at 5:49 AM Sinan Kaya wrote:
>
> Getting ready to allow CONFIG_PCI to be disabled with ACPI enabled. Stub
> out acpi_os_read_pci_configuration function that depend on PCI.
Why don't you merge this with the next patch? Is there any particular
reason why they should be separat
=y, SAMPLES=y, SAMPLE_LIVEPATCH=y
(with a number of unrelated sparse warnings on symbols not being static)
Patch is against 4.20-rc6 (localversion-next is next-20181213)
samples/livepatch/livepatch-shadow-mod.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/samples/livepatch/livepatch
tested with: x86_64_defconfig + FTRACE=y
FUNCTION_TRACER=y, EXPERT=y, LATENCYTOP=y, SAMPLES=y, SAMPLE_LIVEPATCH=y
(with some unrelated sparse warnings on symbols not being static)
Patch is against 4.20-rc6 (localversion-next is next-20181213)
samples/livepatch/livepatch-shadow-fix1.c | 3 +++
1
On Thu, Dec 13, 2018 at 05:01:07PM +1100, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the akpm-current tree got a conflict in:
>
> arch/arm64/mm/mmu.c
>
> between commit:
>
> 4ab215061554 ("arm64: Add memory hotplug support")
>
> from the arm64 tree and commit:
>
>
On 06/12/2018 23:44, Jeremy Linton wrote:
> Add code to track whether all the cores in the machine are
> vulnerable, and whether all the vulnerable cores have been
> mitigated.
>
> Once we have that information we can add the sysfs stub and
> provide an accurate view of what is known about the
In gmane.comp.file-systems.ext4 Pavel Machek wrote:
> [-- text/plain, кодировка quoted-printable, кодировка: us-ascii, 32 строк --]
> Hi!
> > > >> OK, - and now we are looking forward to *your* ideas how to solve this.
> > > >
> > > > After four days playing games around git bisect - real winner
On Thu, Dec 13, 2018 at 11:23 AM Rafael J. Wysocki wrote:
>
> On Thu, Dec 13, 2018 at 10:58 AM Daniel Vetter wrote:
[cut]
> >
> > - Most of these issues are never visible in normal usage, since normally
> > driver bind/unbind is done from a kthread or model_load/unload, neither
> > of which
On Wed, Dec 12, 2018 at 6:15 PM Adam Thomson
wrote:
>
> On 12 December 2018 02:47, Kyle Tso wrote:
>
> > On Mon, Dec 10, 2018 at 7:36 PM Adam Thomson
> > wrote:
> > >
> > > On 10 December 2018 09:01, Adam Thomson wrote:
> > >
> > > > On 06 December 2018 03:02, Kyle Tso wrote:
> > > >
> > > > > Cu
On Wed, 2018-12-12 at 19:02 -0800, Matthew Wilcox wrote:
> On Wed, Dec 12, 2018 at 09:17:07AM +0100, Mickaël Salaün wrote:
> > The goal of this patch series is to control script interpretation. A
> > new O_MAYEXEC flag used by sys_open() is added to enable userland script
> > interpreter to delega
On Thu, 13 Dec 2018 at 11:44, Peter Zijlstra wrote:
>
> On Mon, Sep 10, 2018 at 04:43:09PM +0200, Vincent Guittot wrote:
> > When CPUs have different capacity because of RT/DL tasks or
> > micro-architecture or max frequency differences, there are situation where
> > the imbalance is not correctly
On Thu, Dec 13, 2018 at 02:24:03PM +0800, Ryder Lee wrote:
> The MediaTek BTIF controller doesn't need to set termios so add
> a new capability 'UART_CAP_NMOD' for the unsupported case.
>
>
> Signed-off-by: Sean Wang
> Signed-off-by: Ryder Lee
> ---
> drivers/tty/serial/8250/8250.h | 1 +
From: Shanker Donthineni
The NUMA node information is visible to ITS driver but not being used
other than handling hardware errata. ITS/GICR hardware accesses to the
local NUMA node is usually quicker than the remote NUMA node. How slow
the remote NUMA accesses are depends on the implementation d
On 13/12/2018 10:55:29+0100, Enric Balletbo i Serra wrote:
>
>
> On 13/12/18 10:50, Alexandre Belloni wrote:
> > On 13/12/2018 10:30:16+0100, Enric Balletbo i Serra wrote:
> >>> However, you should probably indicate which tree do you expect that to
> >>> go through ;)
> >>>
> >>
> >> Well, these
Hi Linus,
Here's a PR with a couple of MMC fixes intended for v4.20-rc7. Details about the
highlights are as usual found in the signed tag.
Please pull this in!
Kind regards
Ulf Hansson
The following changes since commit 2595646791c319cadfdbf271563aac97d0843dc7:
Linux 4.20-rc5 (2018-12-02 1
On Thu, Dec 13, 2018 at 01:00:26AM -0800, Stephen Boyd wrote:
> Quoting Lorenzo Pieralisi (2018-12-11 06:16:27)
> > On Tue, Dec 04, 2018 at 10:42:19PM +0100, Rafael J. Wysocki wrote:
> > > On Tuesday, December 4, 2018 10:45:58 AM CET Lorenzo Pieralisi wrote:
> > > > On Mon, Dec 03, 2018 at 11:00:20
Hi Gustavo,
On 12/12/2018 20:11, Gustavo A. R. Silva wrote:
> When using the nospec API, it should be taken into account that:
>
> "...if the CPU speculates past the bounds check then
> * array_index_nospec() will clamp the index within the range of [0,
> * size)."
>
> The above is part of the
On Thu, Dec 13, 2018 at 06:17:41PM +0900, Masahiro Yamada wrote:
> Revert the following commits:
>
> - 5bdcd510c2ac9efaf55c4cbd8d46421d8e2320cd
> ("x86/jump-labels: Macrofy inline assembly code to work around GCC inlining
> bugs")
>
> - d5a581d84ae6b8a4a740464b80d8d9cf1e7947b2
> ("x86/cpufea
Am Donnerstag, den 13.12.2018, 10:43 + schrieb Richard Zhu:
> MSI_EN of iMX PCIe RC would be asserted when
> PCIEPORTBUS driver is selected.
> Thus, the MSI works fine on iMX PCIe before.
> Assert it unconditionally when MSI is enabled.
> Otherwise, the MSI wouldn't be triggered although
> the
On 2018-12-13 16:02, Srinath Mannam wrote:
Few SOCs have limitation that their PCIe host can't allow few inbound
address ranges.
Allowed inbound address ranges are listed in dma-ranges DT property and
this address ranges are required to do IOVA mapping.
Remaining address ranges have to be reserve
On Fri, Dec 7, 2018 at 5:53 PM Christophe Kerello
wrote:
> On 12/7/18 10:06 AM, Linus Walleij wrote:
> Based on FMC2 datasheet,
> The FMC2 controller includes 2 memory controllers:
> - the NOR/PSRAM memory controller
> - the NAND memory controller
>
> The NOR/PSRAM controller mapping is start
On 13/12/2018 09:23, Julien Thierry wrote:
> Hi Jeremy,
>
> On 06/12/2018 23:44, Jeremy Linton wrote:
>> Add a simple state machine which will track whether
>> all the online cores in a machine are vulnerable.
>>
>> Once that is done we have a fairly authoritative view
>> of the machine vulnera
On Mon, Sep 10, 2018 at 04:43:09PM +0200, Vincent Guittot wrote:
> When CPUs have different capacity because of RT/DL tasks or
> micro-architecture or max frequency differences, there are situation where
> the imbalance is not correctly set to migrate waiting task on the idle CPU.
>
> The UC uses
On Thu, Dec 13, 2018 at 02:35:07PM +0530, Vivek Gautam wrote:
> Qcom's implementation of arm,mmu-500 works well with current
> arm-smmu driver implementation. Adding a soc specific compatible
> along with arm,mmu-500 makes the bindings future safe.
>
> Signed-off-by: Vivek Gautam
> Reviewed-by: R
Hi Qian,
On 13/12/2018 05:22, Qian Cai wrote:
> On this HPE Apollo 70 arm64 server with 256 CPUs, triggering a crash
> dump just hung. It has 4 threads on each core. Each 2-core share a same
> L1 and L2 caches, so that is 8 CPUs shares those. All CPUs share a same
> L3 cache.
>
> It turned out th
MSI_EN of iMX PCIe RC would be asserted when
PCIEPORTBUS driver is selected.
Thus, the MSI works fine on iMX PCIe before.
Assert it unconditionally when MSI is enabled.
Otherwise, the MSI wouldn't be triggered although
the EP is present and the MSIs are assigned.
Signed-off-by: Richard Zhu
---
Ch
On 13-12-18, 18:36, Nick Fan wrote:
> This new API is suitable for the users that required to access for
> multiple regulators. And I am one of users who uses this API, but I am
> not able to upstream the GPU kernel driver which uses the new API.
Look at it from mainline's perspective..
- We don'
On Thu, Dec 13, 2018 at 10:22:21AM +0100, Michal Hocko wrote:
> From: Michal Hocko
>
> Liu Bo has experienced a deadlock between memcg (legacy) reclaim and the
> ext4 writeback
> task1:
> [] wait_on_page_bit+0x82/0xa0
> [] shrink_page_list+0x907/0x960
> [] shrink_inactive_list+0x2c7/0x680
> [] sh
Hello Morimoto-san, Mark,
I found that your commit b6f3fc005a2c ("ASoC: simple-card-utils:
fixup asoc_simple_card_get_dai_id() counting") replaced with
of_graph_parse_endpoint(), that needs 'reg' property in each port
that has an endpoint.
Currently devicetrees for UniPhier SoCs have also audio g
On Thu, Dec 13, 2018 at 10:54 AM Paul Menzel wrote:
>
> Dear Doug,
>
>
> Thank you for your reply.
>
> On 12/13/18 00:06, Doug Smythies wrote:
> > On 2018.12.12 13:40 Paul Menzel wrote:
> >
> >> Using *powersave* as P-state selection algorithm, on an idle system
> >
> > Define "idle system".
> > I
On Thu, 2018-12-13 at 12:08 +0530, Viresh Kumar wrote:
> On 10-12-18, 20:36, Nick Fan wrote:
> > For the users who only use one supply, they can use
> > dev_pm_opp_get_voltage to get the voltage data from an opp.
> > But if the users who use more than one supply, they will need this API
> > to get
On 13-12-18, 02:32, Stephen Boyd wrote:
> I have one policy for four CPUs. So take down all four of those CPUs by
> writing a 0 to the online file for each CPU, and then bring them back
> online. That should make cpufreq_driver->init() be called twice, once
> during boot when the CPUs are bound to
Currently, tpm_pcr_extend() accepts as an input only a SHA1 digest.
This patch modifies the definition of tpm_pcr_extend() to allow other
kernel subsystems to pass a digest for each algorithm supported by the TPM.
All digests are processed by the TPM in one operation.
If a tpm_pcr_extend() caller
Currently, the TPM driver retrieves the digest size from a table mapping
TPM algorithms identifiers to identifiers defined by the crypto subsystem.
If the algorithm is not defined by the latter, the digest size can be
retrieved from the output of the PCR read command.
The patch modifies the defini
Rename tpm2_* to tpm_* and move the definitions to include/linux/tpm.h so
that these can be used by other kernel subsystems (e.g. IMA).
Signed-off-by: Roberto Sassu
Reviewed-by: Jarkko Sakkinen
Acked-by: Mimi Zohar
---
drivers/char/tpm/tpm-interface.c | 2 +-
drivers/char/tpm/tpm.h
On 2018/12/13 9:51, Gao Xiang wrote:
> Hi Sungkyung,
>
> On 2018/12/12 23:50, Sungkyung Kim wrote:
>> Fix a warning from checkpathch.pl: 'Missing a blank line after
>> declarations'
>>
>> Signed-off-by: Sungkyung Kim
>> ---
>> drivers/staging/erofs/inode.c | 1 +
>> 1 file changed, 1 insertion(+
IPROC host has the limitation that it can use only those address ranges
given by dma-ranges property as inbound address.
So that the memory address holes in dma-ranges should be reserved to
allocate as DMA address.
Inbound address of host accessed by pcie devices will not be translated
before it c
TCG defines two structures, TCG_EfiSpecIDEventStruct and TCG_PCR_EVENT2,
which contain variable-sized arrays in the middle of the definition.
Since these structures are not suitable for type casting, this patch
removes structure members after the variable-sized arrays and adds the
_head suffix to
Add a dma_resv parameter in pci host bridge structure to hold resource
entries list of memory regions for which IOVAs have to reserve.
PCIe host driver will add resource entries to this list based on its
requirements.
Few inbound address ranges can't be allowed by few PCIe host, so those
address r
PCI host bridge has list of resource entries contain address ranges for
which IOVA address mapping has to be reserve.
These address ranges are the address holes in dma-ranges DT property.
It is similar to PCI IO resources address ranges reserving in IOMMU for
each EP connected to host bridge.
Sig
This patch renames active_banks (member of tpm_chip) to allocated_banks,
stores the number of allocated PCR banks in nr_allocated_banks (new member
of tpm_chip), and replaces the static array with a pointer to a dynamically
allocated array.
tpm2_get_pcr_allocation() determines if a PCR bank is all
Few SOCs have limitation that their PCIe host can't allow few inbound
address ranges.
Allowed inbound address ranges are listed in dma-ranges DT property and
this address ranges are required to do IOVA mapping.
Remaining address ranges have to be reserved in IOVA mapping.
PCIe Host driver of those
Eric Biggers wrote:
> Hello,
>
> This series optimizes the Adiantum encryption mode for x86_64 by adding
> SSE2 and AVX2 accelerated implementations of NHPoly1305, specifically
> the NH part; and by modifying the existing x86_64 SSSE3/AVX2/AVX-512VL
> implementation of ChaCha20 to support XChaCha
Update
This version of the patch set includes an additional patch (7/7) which
modifies the definition of tpm_pcr_extend() and tpm2_pcr_extend(). The new
patch has been included to facilitate the review of the changes to support
TPM 2.0 crypto agility for reading/extending PCRs.
Original patch se
Quoting Viresh Kumar (2018-12-13 02:14:17)
> On 13-12-18, 02:12, Stephen Boyd wrote:
> > It's on a v4.19 kernel with this cpufreq hw driver backported to it. I
> > think all it takes is to return an error the second time the policy is
> > initialized when cpufreq_online() calls into the cpufreq dri
Eric Biggers wrote:
> Hello,
>
> This series optimizes the Adiantum encryption mode for ARM64 by adding
> an ARM64 NEON accelerated implementation of NHPoly1305, specifically the
> NH part; and by modifying the existing ARM64 NEON implementation of
> ChaCha20 to support XChaCha20 and XChaCha12.
>
On 2018/12/13 17:43, Yunlong Song wrote:
> Commit 089842de ("f2fs: remove codes of unused wio_mutex") removes codes
> of unused wio_mutex, but missing the comment, so delete it.
>
> Signed-off-by: Yunlong Song
Reviewed-by: Chao Yu
Thanks,
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