Remove duplicate headers which are included more than once
Signed-off-by: Brajeswar Ghosh
---
include/linux/perf_event.h | 1 -
include/linux/ptr_ring.h | 1 -
include/linux/qed/qed_if.h | 1 -
include/linux/security.h | 1 -
4 files changed, 4 deletions(-)
diff --git
On Thu, Jan 10, 2019 at 02:57:40PM +0100, Paul Menzel wrote:
> Thank you very much. Indeed, the machine does not crash. I used Linus’
> master branch for testing, and applied your patch on top. Please find
> the full log attached.
> 80.649: [3.197107] Spectre V2 :
On 1/10/19 7:57 AM, Paul Menzel wrote:
> Dear Borislav,
>
>
> On 01/09/19 22:11, Borislav Petkov wrote:
>> On Wed, Jan 09, 2019 at 05:34:11PM +0100, Paul Menzel wrote:
>>> Is there a way to trace the value of `boot_cpu_data` from
>>> `arch/x86/include/asm/cpufeature.h` with some Linux Kernel
On Mon, Dec 17, 2018 at 01:29:58PM -0800, Bart Van Assche wrote:
> + /* Check whether all classes occur in a lock list. */
> + for (i = 0; i < ARRAY_SIZE(lock_classes); i++) {
> + class = _classes[i];
> + if (!in_list(>lock_entry, _lock_classes) &&
> +
My HP 9000 A500 (pa-risc architecture) paniced in 5.0-rc1. It happened after
printing dmesg lines about ttyS and before moving on to scsi printk-s.
I bisected it and the panic symptoms changed during that (some had backtrace,
some had just panic).
This is one of the crashes I got:
Serial:
On Tue, Jan 08, 2019 at 03:52:56PM +0100, Michal Hocko wrote:
> On Wed 02-01-19 12:21:10, Jonathan Cameron wrote:
> [...]
> > So ideally I'd love this set to head in a direction that helps me tick off
> > at least some of the above usecases and hopefully have some visibility on
> > how to address
On Mon, Dec 17, 2018 at 01:29:58PM -0800, Bart Van Assche wrote:
> Debugging lockdep data structure inconsistencies is challenging. Add
> disabled code that verifies data structure consistency at runtime.
>
> Cc: Peter Zijlstra
> Cc: Waiman Long
> Cc: Johannes Berg
> Signed-off-by: Bart Van
On Wed, Dec 12, 2018 at 12:37:09PM +0100, Greg Kroah-Hartman wrote:
> On Fri, Dec 07, 2018 at 08:47:21PM -0500, Kyle Williams wrote:
> > From: Kyle Williams
> >
> > Description: enable the ability to disable LPM for all devices matched
> > by interface information
>
> Why have "Description:" in
There are new types and helpers that are supposed to be used in new code.
As a preparation to get rid of legacy types and API functions do
the conversion here.
Signed-off-by: Andy Shevchenko
---
drivers/hid/intel-ish-hid/ishtp-hid-client.c | 3 +--
drivers/hid/intel-ish-hid/ishtp-hid.h
On Wed, 9 Jan 2019, Paul E. McKenney wrote:
> Hello!
>
> This series contains updates for the Linux-kernel memory model:
>
> 1-3. Add SRCU support, courtesy of Alan Stern.
>
> 4.Update README for adding of SRCU support.
>
> 5.Update memory-barriers.txt on enforcing heavy ordering for
On Thu, Jan 10, 2019 at 04:20:35PM +0100, Peter Zijlstra wrote:
> On Mon, Dec 17, 2018 at 01:29:54PM -0800, Bart Van Assche wrote:
> > + /*
> > +* Leak *chain because it is not safe to reinsert it before an RCU
> > +* grace period has expired.
> > +*/
> > + new_chain = lock_chains
On Wed, Jan 9, 2019 at 6:47 PM Keith Busch wrote:
>
> Systems may provide different memory types and export this information
> in the ACPI Heterogeneous Memory Attribute Table (HMAT). Parse these
> tables provided by the platform and report the memory access and caching
> attributes.
>
>
>
> On Thu, 10 Jan 2019 at 12:09, gengdongjiu wrote:
> > Peter, I summarize James's main idea, James think QEMU does not
> > needs to check *something* if Qemu support firmware-first.
> > What do we do for your comments?
>
> Unless I'm missing something, the code in your most recent patchset
On Thu, 10 Jan 2019, Paul E. McKenney wrote:
> On Thu, Jan 10, 2019 at 09:40:24AM +0100, Andrea Parri wrote:
> > > > > > It seems that
> > > > > >
> > > > > > 1b52d0186177 ("tools/memory-model: Model
> > > > > > smp_mb__after_unlock_lock()")
> > > > > >
> > > > > > from linux-rcu/dev got
On Thu, Jan 10, 2019 at 04:15:40PM +0100, Christoph Biedl wrote:
> Christoph Biedl wrote...
>
> > Sorry for not getting back to you earlier. Building yesterday's
> > release (v4.19.14) *failed*, bisect led to
> >
> > | commit a9935a12768851762089fda8e5a9daaf0231808e (HEAD)
> > | Author: Breno
Commit 89a5e15bcba8 ("gpio/mmc/of: Respect polarity in the device tree")
changed the behavior of "cd-inverted" to follow the device tree bindings
specification.
Lines specifying "cd-inverted" are now "active high".
Fix the SD card for meson by setting the cd-gpios as "active low" according
to the
gengdongjiu 将撤回邮件“[RFC RESEND PATCH] kvm: arm64: export memory error recovery
capability to user space”。
There are new types and helpers that are supposed to be used in new code.
As a preparation to get rid of legacy types and API functions do
the conversion here.
Signed-off-by: Andy Shevchenko
---
drivers/acpi/apei/erst.c | 27 ---
1 file changed, 12 insertions(+), 15
There are new types and helpers that are supposed to be used in new code.
As a preparation to get rid of legacy types and API functions do
the conversion here.
Signed-off-by: Andy Shevchenko
---
arch/x86/kernel/cpu/mce/apei.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
On Wed, Jan 9, 2019 at 6:47 PM Keith Busch wrote:
>
> The Heterogeneous Memory Attribute Table (HMAT) header has different
> field lengths than the existing parsing uses. Add the HMAT type to the
> parsing rules so it may be generically parsed.
>
> Cc: Dan Williams
> Signed-off-by: Keith Busch
On 1/10/19 5:07 AM, Juergen Gross wrote:
>
> +void xen_clocksource_suspend(void)
> +{
> + xen_clock_value_saved = xen_clocksource_read() - xen_sched_clock_offset;
xen_clock_value_saved = xen_sched_clock() maybe?
-boris
On 29-Nov 17:19, Vincent Guittot wrote:
> On Thu, 29 Nov 2018 at 16:00, Patrick Bellasi wrote:
> > On 29-Nov 11:43, Vincent Guittot wrote:
[...]
> > Seems we agree that, when there is no idle time:
> > - the two 15% tasks will be overestimated
> > - their utilization will reach 50% after a
>
> On Thu, 10 Jan 2019 at 12:09, gengdongjiu wrote:
> > Peter, I summarize James's main idea, James think QEMU does not needs
> > to check *something* if Qemu support firmware-first.
> > What do we do for your comments?
>
> Unless I'm missing something, the code in your most recent patchset
On Thu, 10 Jan 2019, Ran Wang wrote:
> Hi Alan,
>
> > -Original Message-
> > From: Alan Stern
> > Sent: Wednesday, January 09, 2019 23:14
> > To: Ran Wang
> > Cc: Greg Kroah-Hartman ; linux-
> > u...@vger.kernel.org; linux-kernel@vger.kernel.org
> > Subject: RE: [PATCH 2/3] usb: ehci:
On Thu, Jan 10, 2019 at 04:26:33PM +0800, Chen-Yu Tsai wrote:
> The new per-pin-bank regulator handling code in the sunxi pinctrl driver
> has mismatched conditions for enabling and disabling the regulator: it
> is enabled each time a pin is requested, but only disabled when the
> pin-bank's
On Mon, Dec 17, 2018 at 01:29:54PM -0800, Bart Van Assche wrote:
> +static bool inside_selftest(void)
> +{
> + return current == lockdep_selftest_task_struct;
> +}
> +void lockdep_free_key_range(void *start, unsigned long size)
> +{
> + init_data_structures_once();
> +
> + if
* Vignesh R [190110 13:24]:
>
> On 10-Jan-19 5:37 PM, Sebastian Reichel wrote:
> > Hi,
> >
> > On Wed, Jan 09, 2019 at 01:44:03PM -0800, Tony Lindgren wrote:
> >> * Vignesh R [190109 09:11]:
> >>> 8250_omap is DT only driver so dev->of_node always exists. Drop check
> >>> for existence of
On Jan 10 2019, Anup Patel wrote:
> Instead of doing '\n' handling here, we should do it in BBL or
> OpenSBI (i.e. SBI runtime firmware) otherwise all users of
> SBI_CONSOLE_PUTCHAR (namely, Linux, FreeBSD,
> FreeRTOS, U-Boot S-mode, etc) will endup having '\n'
> handling.
I don't think the
Hi,
On Thu, Jan 10, 2019 at 04:26:32PM +0800, Chen-Yu Tsai wrote:
> On the A80, the pin banks go up to PN, which translates to the 14th
> entry in the regulator array. The array is only 12 entries long, which
> causes the sunxi_pmx_{request,free} functions to access beyond the
> array on the A80
Remove linux/dax.h which is included more than once.
Signed-off-by: Sabyasachi Gupta
---
fs/block_dev.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/fs/block_dev.c b/fs/block_dev.c
index cdda48f..8abcdb6 100644
--- a/fs/block_dev.c
+++ b/fs/block_dev.c
@@ -29,7 +29,6 @@
#include
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA512
The following changes since commit bfeffd155283772bbe78c6a05dec7c0128ee500c:
Linux 5.0-rc1 (2019-01-06 17:08:20 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux.git
On Mon, Dec 17, 2018 at 01:29:54PM -0800, Bart Van Assche wrote:
> +static struct pending_free {
> + struct list_head zapped_classes;
> + struct rcu_head rcu_head;
> + bool scheduled;
> +} pending_free[2];
> +static DECLARE_WAIT_QUEUE_HEAD(rcu_cb);
> +/*
> + * Find an
On Thu, Jan 10, 2019 at 08:43:23AM +0100, Greg KH wrote:
On Thu, Jan 10, 2019 at 02:05:46AM -0500, Sasha Levin wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA512
Hi Greg,
Three bug fixes for different parts of the hyper-v code:
- Fix for a lockup when changing NIC's MTU from Dexuan.
-
On Thu, Jan 03, 2019 at 04:23:38PM -0800, Sowjanya Komatineni wrote:
> Bus Clear feature of tegra i2c controller helps to recover from
> bus hang when i2c master loses the bus arbitration due to the
> slave device holding SDA LOW continuously for some unknown reasons.
>
> Signed-off-by: Sowjanya
Hi Bart,
Sorry for the delay; real-life and holidays got in the way :/
On Mon, Dec 17, 2018 at 01:29:54PM -0800, Bart Van Assche wrote:
> +/* Remove a class from a lock chain. Must be called with the graph lock
> held. */
> +static void remove_class_from_lock_chain(struct lock_chain *chain,
> +
On Thu, Jan 10, 2019 at 04:54:53AM -0800, Linus Torvalds wrote:
> On Thu, Jan 10, 2019 at 2:12 AM Oleksij Rempel
> wrote:
> >
> > sched_priority = 1 is enough to dramatically reduce latency
> > on have system load produced by tasks with default user space prio.
>
> .. and is this perhaps a way
On Thu, Jan 10, 2019 at 7:37 PM Andreas Schwab wrote:
>
> Signed-off-by: Andreas Schwab
> ---
> drivers/tty/serial/earlycon-riscv-sbi.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c
>
Christoph Biedl wrote...
> Sorry for not getting back to you earlier. Building yesterday's
> release (v4.19.14) *failed*, bisect led to
>
> | commit a9935a12768851762089fda8e5a9daaf0231808e (HEAD)
> | Author: Breno Leitao
> | Date: Mon Nov 26 18:12:00 2018 -0200
> |
> | powerpc/tm: Unset
On Wed, Jan 09, 2019 at 10:47:42AM -0800, Andy Lutomirski wrote:
> On Wed, Jan 9, 2019 at 8:40 AM joeyli wrote:
> >
> > Hi Andy,
> >
> > Thanks for your review!
> >
> > On Tue, Jan 08, 2019 at 01:41:48PM -0800, Andy Lutomirski wrote:
> > > > On Jan 7, 2019, at 9:37 AM, joeyli wrote:
> > > >
> >
This patch reworks mmu_mapin_ram() to be more generic and map as much
blocks as possible. It now supports blocks not starting at address 0.
It scans DBATs array to find free ones instead of forcing the use of
BAT2 and BAT3.
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/ppc_mmu_32.c | 61
When CONFIG_BDI_SWITCH is set, the page tables have to be populated
allthough large TLBs are used, because the BDI switch knows nothing
about those large TLBs which are handled directly in TLB miss logic.
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/pgtable_32.c | 5 -
1 file
wii_mmu_mapin_mem2() is not used anymore, remove it.
Signed-off-by: Christophe Leroy
---
arch/powerpc/platforms/embedded6xx/wii.c | 24
1 file changed, 24 deletions(-)
diff --git a/arch/powerpc/platforms/embedded6xx/wii.c
b/arch/powerpc/platforms/embedded6xx/wii.c
Depending on the number of available BATs for mapping the different
kernel areas, it might be needed to increase the alignment of _etext
and/or of data areas.
This patchs allows the user to do it via Kconfig.
Signed-off-by: Christophe Leroy
---
arch/powerpc/Kconfig | 32
Add a helper to know whether STRICT_KERNEL_RWX is enabled.
This is based on rodata_enabled flag which is defined only
when CONFIG_STRICT_KERNEL_RWX is selected.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/mmu.h | 11 +++
arch/powerpc/mm/init_32.c | 4 +---
2
Do not set IBAT when setbat() is called without _PAGE_EXEC
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/ppc_mmu_32.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index b8a8d55f51a6..42320688e415
This patch defined CONFIG_PPC_PAGE_SHIFT in order
to be able to use PAGE_SHIFT value inside Kconfig.
Signed-off-by: Christophe Leroy
---
arch/powerpc/Kconfig| 7 +++
arch/powerpc/include/asm/page.h | 13 ++---
2 files changed, 9 insertions(+), 11 deletions(-)
diff
This patch add an helper which wraps 'mtsrin' instruction
to write into segment registers.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/reg.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index
On Wed, Jan 02, 2019 at 11:36:48AM -0800, Sowjanya Komatineni wrote:
> This patch adds HW Command Queue for supported Tegra SDMMC
> controllers.
>
> As per SD Host 4.20 Spec for Host Control 1 Register, DMA Select
> options supported are
>
> With Host Version 4 Enable = 0,
> b'00:SDMA,
On 8xx, large pages (512kb or 8M) are used to map kernel linear
memory. Aligning to 8M reduces TLB misses as only 8M pages are used
in that case.
This patchs allows the user to do it via Kconfig.
Signed-off-by: Christophe Leroy
---
arch/powerpc/Kconfig | 16 ++--
Today, STRICT_KERNEL_RWX is based on the use of regular pages
to map kernel pages.
On Book3s 32, it has three consequences:
- Using pages instead of BAT for mapping kernel linear memory severely
impacts performance.
- Exec protection is not effective because no-execute cannot be set at
page level
CONFIG_STRICT_KERNEL_RWX requires a special alignment
for DATA for some subarches. Today it is just defined
as an #ifdef in vmlinux.lds.S
In order to get more flexibility, this patch moves the
definition of this alignment in Kconfig
On some subarches, CONFIG_STRICT_KERNEL_RWX will
require a
This patch implements handling of STRICT_KERNEL_RWX with
large TLBs directly in the TLB miss handlers.
To do so, etext and sinittext are aligned on 512kB boundaries
and the miss handlers use 512kB pages instead of 8Mb pages for
addresses close to the boundaries.
It sets RO PP flags for addresses
setibat() and clearibat() allows to manipulate IBATs independently
of DBATs.
update_bats() allows to update bats after init. This is done
with MMU off.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/book3s/32/mmu-hash.h | 2 ++
arch/powerpc/kernel/head_32.S | 35
The purpose of this serie is to:
- use BATs with STRICT_KERNEL_RWX on book3s (See patch 12 for details.)
- use LTLBs with STRICT_KERNEL_RWX on 8xx (See patch 14 for a few details.)
v2:
- Fix patch 2 (was patch 3 in v1) based on feedback from Jonathan.
- Added support for 8xx with LTLBs.
- Added
Now that mmu_mapin_ram() is able to handle other blocks
than the one starting at 0, the WII can use it for all
its blocks.
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/pgtable_32.c | 25 +++--
1 file changed, 7 insertions(+), 18 deletions(-)
diff --git
At the time being, mmu_mapin_ram() always maps RAM from the beginning.
But some platforms like the WII have to map a second block of RAM.
This patch adds to mmu_mapin_ram() the base address of the block.
At the moment, only base address 0 is supported.
Signed-off-by: Christophe Leroy
---
The A2Q and UPDATE bits have no effect in the channel disable registers.
However, since they are present, assume that the intention is to disable
planes, not immediately as indicated by the RST bit, but on the next
frame shift since that is what A2Q and UPDATE means in the channel enable
The destination crtc rectangle is independent of source plane rotation.
Signed-off-by: Peter Rosin
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
Ouch, the driver rotates planes clockwise, which is simply not correct.
Signed-off-by: Peter Rosin
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 30 -
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
With the help from drm_atomic_helper_check_plane_state function, clipping
now handles planes to be partially or totally off-screen. The plane is
disabled if it is not visible.
Signed-off-by: Peter Rosin
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 162 +---
1 file
On 01/09/2019 12:41 AM, Kees Cook wrote:
> On Sat, Jan 5, 2019 at 11:51 PM Vlad Tsyrklevich wrote:
>>
>> Using [1] for static analysis I found that the OMAPFB_QUERY_PLANE,
>> OMAPFB_GET_COLOR_KEY, OMAPFB_GET_DISPLAY_INFO, and OMAPFB_GET_VRAM_INFO
>> cases could all leak uninitialized stack
Hi!
I found an unfortunate issue while recoding plane handling to use
drm_atomic_helper_check_plane_state(). The driver rotates clockwise,
which is not correct. I simply fixed it (patch 1/4), but maybe that
will cause regressions for unsuspecting users who simply assumed
that the clockwise
It seems that timeout.nsec doesn't need to be patched.
But before going further, I'm just curious why such timeout variables
in the kernel
are defined as signed type variable in the first place?
Thanks,
Kyungtae Kim
On Wed, Jan 9, 2019 at 4:20 AM Rodolfo Giometti wrote:
>
> On 08/01/2019 21:24,
Thankyou for reviewing v4 patchset, here is v5 addressing comments from v4.
Major change is moving the driver out of MFD as there are no immediate plans
to add support to other drivers on this codec.
Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC.
It is integrated in multiple
This patch adds basic controls found in wcd9335 codec.
Signed-off-by: Srinivas Kandagatla
Reviewed-by: Vinod Koul
---
sound/soc/codecs/wcd9335.c | 359 +
1 file changed, 359 insertions(+)
diff --git a/sound/soc/codecs/wcd9335.c b/sound/soc/codecs/wcd9335.c
Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC,
It supports both I2S/I2C and SLIMbus audio interfaces.
On slimbus interface it supports two data lanes; 16 Tx ports
and 8 Rx ports. It has Seven DACs and nine dedicated interpolators,
Seven (six audio ADCs, and one VBAT ADC), Multibutton
Signed-off-by: Srinivas Kandagatla
---
sound/soc/qcom/apq8096.c | 71 +++-
1 file changed, 70 insertions(+), 1 deletion(-)
diff --git a/sound/soc/qcom/apq8096.c b/sound/soc/qcom/apq8096.c
index fb45f396ab4a..94363fd6846a 100644
--- a/sound/soc/qcom/apq8096.c
This patch adds required dapm widgets for capture path.
Signed-off-by: Srinivas Kandagatla
Reviewed-by: Vinod Koul
---
sound/soc/codecs/wcd9335.c | 1448 +++-
1 file changed, 1447 insertions(+), 1 deletion(-)
diff --git a/sound/soc/codecs/wcd9335.c
CLASS-H controller/Amplifier is common accorss Qualcomm WCD codec series.
This patchset adds basic CLASS-H controller apis for WCD codecs after
wcd9335 to use.
Signed-off-by: Srinivas Kandagatla
Reviewed-by: Vinod Koul
---
sound/soc/codecs/Makefile | 2 +-
sound/soc/codecs/wcd-clsh-v2.c
This patch adds required dapm widgets for playback.
Signed-off-by: Srinivas Kandagatla
Reviewed-by: Vinod Koul
---
sound/soc/codecs/wcd9335.c | 1795
1 file changed, 1795 insertions(+)
diff --git a/sound/soc/codecs/wcd9335.c b/sound/soc/codecs/wcd9335.c
This patch adds audio routing for both playback and capture.
Signed-off-by: Srinivas Kandagatla
Reviewed-by: Vinod Koul
---
sound/soc/codecs/wcd9335.c | 189 +
1 file changed, 189 insertions(+)
diff --git a/sound/soc/codecs/wcd9335.c
This patch updates wcd9335 bindings with recommended properties.
Signed-off-by: Srinivas Kandagatla
Reviewed-by: Rob Herring
---
.../devicetree/bindings/sound/qcom,wcd9335.txt | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git
On Wed, Jan 02, 2019 at 12:57:54PM -0800, Sowjanya Komatineni wrote:
> Programs initial drive code offsets which will be used by auto
> calibration process.
>
> Programs fixed drive strengths for SDMMC pads when auto cal
> timeouts. Fixed settings are based on Pre-SI analysis of the
> pad design.
The AM654 SoC contains a DWC3 controller with TI specific
wrapper. Add support for that.
Unlike the Keystone 2 case, for AM654 We don't need to
process any IRQs for basic USB operation.
Signed-off-by: Roger Quadros
---
drivers/usb/dwc3/Kconfig | 6 +++---
On v3.10a in dual-role mode, if port is in device mode
and gadget driver isn't loaded, the OTG event interrupts don't
come through.
It seems that if the core is configured to be OTG2.0 only,
then we can't leave the DCFG.DEVSPD at Super-speed (default)
if we expect OTG to work properly. It must be
The AM654 SoC from TI contains a DWC3 controller. Add
support for it.
Signed-off-by: Roger Quadros
---
Documentation/devicetree/bindings/usb/keystone-usb.txt | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/keystone-usb.txt
Hi Felipe,
TI's AM654 USB SoC has 2 instances of the DWC3 controller.
This series adds AM654 USB wrapper support to the keystone-usb driver.
Changelog:
v2:
- Moved compatible to separate lines in DT binding.
cheers,
-roger
Roger Quadros (3):
usb: dwc3: gadget: Fix OTG events when gadget
On Thu, Jan 10, 2019 at 08:29:00PM +0530, Souptick Joarder wrote:
> convert to use vm_fault_t type as return type for
> fault handler.
>
> kbuild reported warning during testing of
> *mm-create-the-new-vm_fault_t-type.patch* available in below link -
> https://patchwork.kernel.org/patch/10752741/
On Thu, Jan 10, 2019 at 03:55:59PM +0100, Dominik Brodowski wrote:
> On Thu, Jan 10, 2019 at 03:50:05PM +0100, Christian Brauner wrote:
> > On Tue, Jan 08, 2019 at 08:01:10AM +0100, Dominik Brodowski wrote:
> > > On Mon, Jan 07, 2019 at 11:27:00PM +0100, Christian Brauner wrote:
> > > > @@ -2833,6
Hi Matthias,
On 2019-01-03 03:45, Matthias Kaehlcke wrote:
On Mon, Dec 31, 2018 at 11:34:46AM +0530, Balakrishna Godavarthi wrote:
Hi Marcel,
On 2018-12-30 13:40, Marcel Holtmann wrote:
> Hi Balakrishna,
>
> > > > Latest qualcomm chips are not sending an command complete event for
> > > >
On 01/08/2019 10:22 AM, Anders Roxell wrote:
> Fixes: 8c4905b995c6 ("libbpf: make sure bpf headers are c++ include-able")
> Signed-off-by: Anders Roxell
Fixed in (including libbpf):
https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf.git/commit/?id=e3ca63de8ade75757a067f6a5bd111d30cdcadb5
On 01/08/2019 10:23 AM, Anders Roxell wrote:
> When test_tcpbpf_user runs it complains that it can't find files
> tcp_server.py and tcp_client.py.
>
> Rework so that tcp_server.py and tcp_client.py gets installed, added them
> to the variable TEST_PROGS_EXTENDED.
>
> Fixes: d6d4f60c3a09 ("bpf:
On Thu, 10 Jan 2019 07:07:20 +0100
Greg KH wrote:
> On Thu, Jan 10, 2019 at 11:54:30AM +0900, Masami Hiramatsu wrote:
> > Prohibit probing on optprobe template code, since it is not
> > a code but a template instruction sequence. If we modify
> > this template, copied template must be broken.
>
This patch replaces most #ifdef mess by IS_ENABLED() in 8xx_mmu.c
This has the advantage of allowing syntax verification at compile
time regardless of selected options.
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/8xx_mmu.c | 65 +--
1 file
On Wed, Jan 9, 2019 at 3:55 PM Brian Norris wrote:
>
> On Tue, Jan 08, 2019 at 09:22:30AM -0600, Rob Herring wrote:
> > On Fri, Jan 4, 2019 at 7:54 PM Brian Norris
> > wrote:
> > > To add to my thoughts, since I think maybe Sibi was a little unclear of
> > > my thoughts:
> > >
> > > One of my
On Thu, Jan 10, 2019 at 03:50:05PM +0100, Christian Brauner wrote:
> On Tue, Jan 08, 2019 at 08:01:10AM +0100, Dominik Brodowski wrote:
> > On Mon, Jan 07, 2019 at 11:27:00PM +0100, Christian Brauner wrote:
> > > @@ -2833,6 +2836,10 @@ static int __do_proc_doulongvec_minmax(void *data,
> > >
I, Mikhail Fridman have selected you specifically as one of my
beneficiaries for my Charitable Donation of $5 Million Dollars,
Check the link below for confirmation:
https://www.rt.com/business/343781-mikhail-fridman-will-charity/
I await your earliest response for further directives.
Best
convert to use vm_fault_t type as return type for
fault handler.
kbuild reported warning during testing of
*mm-create-the-new-vm_fault_t-type.patch* available in below link -
https://patchwork.kernel.org/patch/10752741/
[auto build test WARNING on linus/master]
[also build test WARNING on
On Thu, Jan 10, 2019 at 01:41:23PM +0100, Peter Zijlstra wrote:
> On Tue, Jan 08, 2019 at 11:37:46PM +0100, Florian Westphal wrote:
> > Anatol Pomozov wrote:
> > > Or maybe xt_replace_table() can be enhanced? When I hear that
> > > something waits until an event happens on all CPUs I think about
Hello,
syzbot has tested the proposed patch but the reproducer still triggered
crash:
general protection fault in fuse_dev_do_write
8021q: adding VLAN 0 to HW filter on device team0
8021q: adding VLAN 0 to HW filter on device team0
8021q: adding VLAN 0 to HW filter on device team0
kasan:
Hi Johan,
On 2019-01-10 20:09, Johan Hovold wrote:
On Thu, Jan 10, 2019 at 08:04:12PM +0530, Balakrishna Godavarthi wrote:
Hi Johan,
On 2019-01-09 20:22, Johan Hovold wrote:
> On Thu, Dec 20, 2018 at 08:16:36PM +0530, Balakrishna Godavarthi wrote:
>> This patch will help to stop frame
On Wed, Jan 09, 2019 at 05:54:59PM -0800, Yao HongBo wrote:
> On 1/10/2019 2:39 AM, Christoph Hellwig wrote:
> > On Mon, Jan 07, 2019 at 10:22:07AM +0800, Hongbo Yao wrote:
> >> There is an out of bounds array access in nvme_cqe_peding().
> >>
> >> When enable irq_thread for nvme interrupt, there
On Thu, Jan 10, 2019 at 01:38:11PM +0100, Dmitry Vyukov wrote:
> On Thu, Jan 10, 2019 at 1:30 PM Andrea Parri
> wrote:
> >
> > > For seqcounts we currently simply ignore all accesses within the read
> > > section (thus the requirement to dynamically track read sections).
> > > What does LKMM say
On Mon, Dec 31, 2018 at 12:23:25AM +0900, Masahiro Yamada wrote:
> ---
>
> Changes in v2:
> - Rebase
>
> arch/x86/include/asm/trace/exceptions.h | 2 +-
> arch/x86/include/asm/trace/irq_vectors.h | 2 +-
> arch/x86/kernel/Makefile | 2 --
> arch/x86/mm/Makefile
On Thu, Jan 10, 2019 at 11:44:24AM +1100, Dave Chinner wrote:
> And, really, this would be just another band-aid over a symptom of
> the information leak - it doesn't prevent users from being able to
> control page cache invalidation. It just removes one method, just
> like hacking mincore only
On Tue, Jan 08, 2019 at 08:01:10AM +0100, Dominik Brodowski wrote:
> On Mon, Jan 07, 2019 at 11:27:00PM +0100, Christian Brauner wrote:
> > @@ -2833,6 +2836,10 @@ static int __do_proc_doulongvec_minmax(void *data,
> > struct ctl_table *table, int
> > break;
> >
Greg Kroah-Hartman wrote...
> I dropped e1c3743e1a20 ("powerpc/tm: Set MSR[TS] just prior to recheckpoint")
> from the stable trees, which is what I was told was the commit that was
> causing the problems by Christoph and Breno (on to: now).
>
> Was that not the offending commit? If so, what one
On Wed, Jan 02, 2019 at 12:57:52PM -0800, Sowjanya Komatineni wrote:
> Add pinctrl for 3V3 and 1V8 pad drive strength configuration for
> Tegra210 sdmmc which has pad configuration registers in the pinmux
> reigster domain.
> Pad drive strengths for Tegra186 and Later are
> part of SDMMC device
Hi Johan,
On 2019-01-09 20:08, Johan Hovold wrote:
On Fri, Dec 21, 2018 at 05:59:47PM -0800, Matthias Kaehlcke wrote:
On Thu, Dec 20, 2018 at 08:16:35PM +0530, Balakrishna Godavarthi
wrote:
> wcn3990 requires a power pulse to turn ON/OFF along with
> regulators. Sometimes we are observing the
Peter Zijlstra wrote:
> /*
>* Ensure contents of newinfo are visible before assigning to
>* private.
>*/
> smp_wmb();
> table->private = newinfo;
>
> we have:
>
> smp_store_release(>private, newinfo);
>
> But what store does that second smp_wmb()
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