In order to avoid wasting user address space by using bottom-up mmap
allocation scheme, prefer top-down scheme when possible.
Before:
root@qemuriscv64:~# cat /proc/self/maps
0001-00016000 r-xp fe:00 6389 /bin/cat.coreutils
00016000-00017000 r--p 5000 fe:00 6389
mips uses a top-down layout by default that fits the generic functions.
At the same time, this commit allows to fix problem uncovered
and not fixed for mips here:
https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1429066.html
Signed-off-by: Alexandre Ghiti
---
arch/mips/Kconfig
arm uses a top-down layout by default that fits the generic functions.
At the same time, this commit allows to fix the following problems:
- one uncovered and not fixed for arm here:
https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1429066.html
- the use of TASK_SIZE instead of
On Thu, Apr 04, 2019 at 07:09:22AM +0200, Niklas Cassel wrote:
> From: Jorge Ramirez-Ortiz
>
> Signed-off-by: Jorge Ramirez-Ortiz
> ---
> drivers/regulator/qcom_spmi-regulator.c | 7 +++
> 1 file changed, 7 insertions(+)
This doesn't build:
CC
arm64 handles top-down mmap layout in a way that can be easily reused
by other architectures, so make it available in mm.
This commit also takes the opportunity to:
- make use of is_compat_task instead of specific arm64 test
test_thread_flag(TIF_32BIT), which allows more genericity and is
This preparatory commit moves this function so that further introduction
of generic topdown mmap layout is contained only in mm/util.c.
Signed-off-by: Alexandre Ghiti
---
fs/binfmt_elf.c| 20
include/linux/mm.h | 2 ++
mm/util.c | 22 ++
3
This series introduces generic functions to make top-down mmap layout
easily accessible to architectures, in particular riscv which was
the initial goal of this series.
The generic implementation was taken from arm64 and used successively
by arm, mips and finally riscv.
Note that in addition the
On Wed, Apr 03, 2019 at 03:23:35PM +0200, Olivier Moysan wrote:
> Use SND_SOC_DAPM_SUPPLY for mic bias DAPM
> instead of deprecated SND_SOC_DAPM_MICBIAS.
There are existing users in mainline, have they all been updated to be
compatible with this, or verified that they don't need updates?
My name is Ms Ella Golan, I'm the Chief Executive Officer (C.P.A) of the First
International Bank of Israel (FIBI).
I'm getting in touch with you in regards to a very important and urgent matter.
Kindly respond back at your earliest convenience so
I can provide you the details.
Faithfully,
Ms
Hi Lorenzo,
I am sorry, I took your long time. In my commit log I gave details
about purpose of feature instead of implementation.
Thanks a lot for all inputs and knowledge. I will remember and follow
these notes while writing commit log.
commit log re-written by you is very much impressive and
On 04/03/2019 06:07 PM, Robin Murphy wrote:
> [ +Steve ]
>
> Hi Anshuman,
>
> On 03/04/2019 05:30, Anshuman Khandual wrote:
>> Memory removal from an arch perspective involves tearing down two different
>> kernel based mappings i.e vmemmap and linear while releasing related page
>> table
On Wed, Apr 03, 2019 at 03:32:04PM -0600, Fletcher Woodruff wrote:
> On Mon, Apr 1, 2019 at 11:02 PM Mark Brown wrote:
> > This looks unrelated to the polarity of the interupt?
> Yes this is separate. If a plug/unplug happens after regmap_read and
> before regmap_write, it will not be
On Wed, Apr 03, 2019 at 08:46:08PM -0400, Sasha Levin wrote:
> On Wed, Mar 27, 2019 at 07:32:11PM +, Mark Brown wrote:
> > > Fix below build error:
> > > drivers/regulator/mcp16502.c: In function ‘mcp16502_gpio_set_mode’:
> > > drivers/regulator/mcp16502.c:135:3: error: implicit declaration
Hi all,
Changes since 20190403:
The sound-asoc tree lost its build failure.
The mfd tree lost its build failure.
The selinux tree lost its build failure.
The ipmi tree lost its build failure.
The staging tree gained conflicts against the spi and v4l-dvb trees.
Non-merge commits (relative
On 04/03/2019 01:50 PM, David Hildenbrand wrote:
> On 03.04.19 06:30, Anshuman Khandual wrote:
>> Sysfs memory probe interface (/sys/devices/system/memory/probe) can accept
>> starting physical address of an entire memory block to be hot added into
>> the kernel. This is in addition to the
On 04/03/2019 06:42 PM, Robin Murphy wrote:
> On 03/04/2019 09:20, David Hildenbrand wrote:
>> On 03.04.19 06:30, Anshuman Khandual wrote:
>>> Sysfs memory probe interface (/sys/devices/system/memory/probe) can accept
>>> starting physical address of an entire memory block to be hot added into
On Wed, Mar 20, 2019 at 9:15 PM Yue Haibing wrote:
> From: YueHaibing
>
> Fix sparse warning:
>
> drivers/pinctrl/freescale/pinctrl-scu.c:38:19: warning:
> symbol 'pinctrl_ipc_handle' was not declared. Should it be static?
>
> Signed-off-by: YueHaibing
Patch applied.
Yours,
Linus Walleij
CPR (Core Power Reduction) is a technology that reduces core power on a
CPU or other device. It reads voltage settings in efuse from product
test process as initial settings.
Each OPP corresponds to a "corner" that has a range of valid voltages
for a particular frequency. While the device is
Co-developed-by: Jorge Ramirez-Ortiz
Signed-off-by: Jorge Ramirez-Ortiz
Signed-off-by: Niklas Cassel
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 152 ++-
1 file changed, 148 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi
Add qcom-opp bindings with properties needed for Core Power Reduction (CPR).
CPR is included in a great variety of Qualcomm SoC, e.g. msm8916 and msm8996,
and was first introduced in msm8974.
Co-developed-by: Jorge Ramirez-Ortiz
Signed-off-by: Jorge Ramirez-Ortiz
Signed-off-by: Niklas Cassel
From: Jorge Ramirez-Ortiz
Signed-off-by: Jorge Ramirez-Ortiz
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
---
drivers/cpufreq/qcom-cpufreq-nvmem.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c
From: Jorge Ramirez-Ortiz
Signed-off-by: Jorge Ramirez-Ortiz
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
---
drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c
b/drivers/cpufreq/cpufreq-dt-platdev.c
Add DT bindings to describe the CPR HW found on certain Qualcomm SoCs.
Co-developed-by: Jorge Ramirez-Ortiz
Signed-off-by: Jorge Ramirez-Ortiz
Signed-off-by: Niklas Cassel
---
.../bindings/power/avs/qcom,cpr.txt | 119 ++
1 file changed, 119 insertions(+)
create
create a driver struct to make it easier to free up all common
resources, and only call dev_pm_opp_set_supported_hw() if the
implementation has dynamically allocated versions.
Co-developed-by: Jorge Ramirez-Ortiz
Signed-off-by: Jorge Ramirez-Ortiz
Signed-off-by: Niklas Cassel
---
From: Sricharan R
The kryo cpufreq driver reads the nvmem cell and uses that data to
populate the opps. There are other qcom cpufreq socs like krait which
does similar thing. Except for the interpretation of the read data,
rest of the driver is same for both the cases. So pull the common things
This is a first RFC for Core Power Reduction (CPR), a form of
Adaptive Voltage Scaling (AVS), found on certain Qualcomm SoCs.
Since this is simply an RFC, things like MAINTAINERS hasn't
been updated yet.
CPR is a technology that reduces core power on a CPU or on other device.
It reads voltage
From: Jorge Ramirez-Ortiz
Signed-off-by: Jorge Ramirez-Ortiz
---
drivers/regulator/qcom_spmi-regulator.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/regulator/qcom_spmi-regulator.c
b/drivers/regulator/qcom_spmi-regulator.c
index 3193506eac6f..f2edf510b0df 100644
---
On 03/04/2019 18:01, Peter Zijlstra wrote:
> On Wed, Apr 03, 2019 at 11:39:09AM -0400, Alex Kogan wrote:
>
The patch that I am looking for is to have a separate
numa_queued_spinlock_slowpath() that coexists with
native_queued_spinlock_slowpath() and
On Wed, Apr 3, 2019 at 9:42 PM Anshuman Khandual
wrote:
>
>
>
> On 04/03/2019 07:28 PM, Robin Murphy wrote:
> > [ +Dan, Jerome ]
> >
> > On 03/04/2019 05:30, Anshuman Khandual wrote:
> >> Arch implementation for functions which create or destroy vmemmap mapping
> >> (vmemmap_populate,
Hi Peter,
I observed this test case you wrote in Commit: e9149858974606
("locking/lockdep/selftests: Add mixed read-write ABBA").
static void rwsem_ABBA2(void)
{
RSL(X1);
ML(Y1);
MU(Y1);
RSU(X1);
ML(Y1);
RSL(X1);
RSU(X1);
MU(Y1); // should
On 04/03/2019 09:37 PM, Jerome Glisse wrote:
> On Wed, Apr 03, 2019 at 02:58:28PM +0100, Robin Murphy wrote:
>> [ +Dan, Jerome ]
>>
>> On 03/04/2019 05:30, Anshuman Khandual wrote:
>>> Arch implementation for functions which create or destroy vmemmap mapping
>>> (vmemmap_populate, vmemmap_free)
Hi,
On Thu, 4 Apr 2019 at 04:36, Mathieu Poirier wrote:
>
> Configure timestamps to be emitted at regular intervals in the trace
> stream to temporally correlate instructions executed on different CPUs.
>
> Signed-off-by: Mathieu Poirier
> ---
> drivers/hwtracing/coresight/coresight-etm4x.c |
On 04/03/2019 07:28 PM, Robin Murphy wrote:
> [ +Dan, Jerome ]
>
> On 03/04/2019 05:30, Anshuman Khandual wrote:
>> Arch implementation for functions which create or destroy vmemmap mapping
>> (vmemmap_populate, vmemmap_free) can comprehend and allocate from inside
>> device memory range
On Wed, Apr 03, 2019 at 03:54:17PM +1100, Tobin C. Harding wrote:
> On Wed, Apr 03, 2019 at 10:00:38AM +0800, kernel test robot wrote:
> > Greetings,
> >
> > 0day kernel testing robot got the below dmesg and the first bad commit is
> >
> >
Beautiful day,
My name is Mr. Jucai Li, Chief Executive Officer of the Bank of China
I am looking for a business partner who will work with me in a joint venture.
Contact me in my private email for more details.
Email (jucailil...@gmail.com)
I am waiting to hear from you.
Many thanks,
Mr. Jucai
hi Krzysztof,
On Tue, 26 Mar 2019 at 16:28, Krzysztof Kozlowski wrote:
>
> On Tue, 26 Mar 2019 at 11:35, Anand Moon wrote:
>
> (...)
>
> > > This is third or fourth submission but you marked it as v1. This makes
> > > it very difficult to discuss and reference previous versions.
> > >
> > > The
Hi,
>> Root Cause
>> - Block layer timeout happens after power off UAS USB device which is
>> accessed as reproduce step. During timeout error handler process, scsi host
>> state becomes SHOST_CANCEL_RECOVERY that causes IO hangs up and lock cannot
>> be released. And in final, usb subsystem
This patch fix the wrong reg value for rk322x/rk322xh,
cuz there is no STORE JUSTIFIED MODE on it.
on rk322x/rk322xh, the same bit means PDM_MODE/RESERVED,
if the bit is set to RESERVED, the controller will not work.
Signed-off-by: Sugar Zhang
---
sound/soc/rockchip/rockchip_pdm.c | 7 +--
This patch marks RXFIFO_DATA as precious to avoid being read
outside a call from the driver, such as regmap debugfs
Signed-off-by: Sugar Zhang
---
sound/soc/rockchip/rockchip_pdm.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/sound/soc/rockchip/rockchip_pdm.c
This patch make the waterlevel more reasonable, because the pdm
controller share the single FIFO(128 entries) with each channel.
adjust waterlevel in frame to meet the vad or dma frames request.
Signed-off-by: Sugar Zhang
---
sound/soc/rockchip/rockchip_pdm.c | 3 ++-
1 file changed, 2
This patch adds bindings for rk1808 soc.
Signed-off-by: Sugar Zhang
---
Documentation/devicetree/bindings/sound/rockchip,pdm.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/sound/rockchip,pdm.txt
This patch adds support for rk1808, the pdm controller
is the same as rk3308.
Signed-off-by: Sugar Zhang
---
sound/soc/rockchip/rockchip_pdm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/sound/soc/rockchip/rockchip_pdm.c
b/sound/soc/rockchip/rockchip_pdm.c
index 4f93a74..3e1c5fd
This patch adds bindings for rk3308/px30.
Signed-off-by: Sugar Zhang
---
Documentation/devicetree/bindings/sound/rockchip,pdm.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/rockchip,pdm.txt
This patch adds support fractional div for rk3308.
Signed-off-by: Sugar Zhang
---
sound/soc/rockchip/rockchip_pdm.c | 172 --
sound/soc/rockchip/rockchip_pdm.h | 9 ++
2 files changed, 139 insertions(+), 42 deletions(-)
diff --git
INVESTMENT FOR PARTNERSHIP. Can I Trust You
My Dear Friend Can I Trust You.docx
Description: MS-Word 2007 document
My Dear Friend Can I Trust You.docx
Description: MS-Word 2007 document
This patch decreases the transfer bursts to avoid the fifo overrun.
Signed-off-by: Sugar Zhang
---
sound/soc/rockchip/rockchip_pdm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/rockchip/rockchip_pdm.c
b/sound/soc/rockchip/rockchip_pdm.c
index abbb6d7..c50494b
On Tue, Mar 19, 2019 at 12:42 AM Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> Add basic support for the battery charger for max77650 PMIC.
>
> Signed-off-by: Bartosz Golaszewski
This looks like a clean and good driver to me.
Reviewed-by: Linus Walleij
Yours,
Linus Walleij
On Sun, Mar 31, 2019 at 2:04 PM Jerome Brunet wrote:
> On Sun, 2019-03-31 at 01:40 -0500, Rob Herring wrote:
> > On Thu, Mar 14, 2019 at 05:37:24PM +0100, Jerome Brunet wrote:
> > > From: Guillaume La Roque
> > > +Optional properties :
> > > + - drive-strength: Drive strength for the specified
On Mon, Apr 1, 2019 at 10:22 PM Andrew Morton <
a...@linux-foundation.org> wrote:
> On Sat, 30 Mar 2019 13:58:55 -0700 Trent Piepho
> wrote:
> > In some cases the previous algorithm would not return the closest
> > approximation. This would happen when a semi-convergent was the
> > closest, as
On Thu, Mar 14, 2019 at 11:37 PM Jerome Brunet wrote:
> Now the slightly annoying part :(
> The value achievable by the SoC are 0.5mA, 2.5mA, 3mA and 4mA and the DT
> property
> 'drive-strength' is expressed in mA.
>
> 1) Rounding down the value, we could be requesting a 0mA drive strength.
>
In preparation to support CPU-wide trace scenarios, introduce the notion
of process ID to ETR devices. That way events monitoring the same process
can use the same etr_buf, allowing multiple CPUs to use the same sink.
Signed-off-by: Mathieu Poirier
---
This patch adds support for CPU-wide trace scenarios by making sure that
only the sources monitoring the same process have access to a common sink.
Because the sink is shared between sources, the first source to use the
sink switches it on while the last one does the cleanup. Any attempt to
When operating in CPU-wide trace scenarios and working with an N:1
source/sink HW topology, update() functions need to be made atomic
in order to avoid racing with start and stop operations.
Signed-off-by: Mathieu Poirier
Reviewed-by: Suzuki K Poulose
---
This patch adds support for CPU-wide trace scenarios by making sure that
only the sources monitoring the same process have access to a common sink.
Because the sink is shared between sources, the first source to use the
sink switches it on while the last one does the cleanup. Any attempt to
This patch adds support for CPU-wide trace scenarios by making sure that
only the sources monitoring the same process have access to a common sink.
Because the sink is shared between sources, the first source to use the
sink switches it on while the last one does the cleanup. Any attempt to
This patch uses the PID of the process being traced to allocate and free
ETR memory buffers for CPU-wide scenarios. The implementation is tailored
to handle both N:1 and 1:1 source/sink HW topologies.
Signed-off-by: Mathieu Poirier
---
.../hwtracing/coresight/coresight-tmc-etr.c | 107
Buffer allocation is different when dealing with per-thread and
CPU-wide sessions. In preparation to support CPU-wide trace scenarios
simplify things by keeping allocation functions for both type separate.
Signed-off-by: Mathieu Poirier
---
.../hwtracing/coresight/coresight-tmc-etr.c | 29
When operating in CPU-wide mode with an N:1 source/sink HW topology,
multiple CPUs can access a sink concurrently. As such reference counting
needs to happen when the device's spinlock is held to avoid racing with
other operations (start(), update(), stop()), such as:
session A
This patch adds reference counting to struct etr_buf so that, in CPU-wide
trace scenarios, shared buffers can be disposed of when no longer used.
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/coresight-tmc-etr.c | 5 +
drivers/hwtracing/coresight/coresight-tmc.h | 3 +++
There is no point in allocating sink memory for a trace session if
there is not a way to free it once it is no longer needed. As such make
sure the sink API function to allocate and free memory have been
implemented before moving ahead with the establishment of a trace
session.
Signed-off-by:
In CPU-wide scenarios with an N:1 source/sink topology, sources share
the same sink. In order to reuse the same sink for all sources an
IDR is needed to archive events that have already been accounted for.
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/coresight-tmc.c | 4
Refactoring function tmc_etr_setup_perf_buf() so that it only deals
with the high level etr_perf_buffer, leaving the allocation of the
backend buffer (i.e etr_buf) to another function.
That way the backend buffer allocation function can decide if it wants
to reuse an existing buffer (CPU-wide
In preparation to handle device reference counting inside of the sink
drivers, add a return code to the sink::disable() operation so that
proper action can be taken if a sink has not been disabled.
Signed-off-by: Mathieu Poirier
Reviewed-by: Suzuki K Poulose
---
Set the proper bit in the configuration register when contextID tracing
has been requested by user space. That way PE_CONTEXT elements are
generated by the tracers when a process is installed on a CPU.
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/Kconfig | 1 +
When disabling a sink the reference counter ensures the operation goes
through if nobody else is using it. As such if drvdata::mode is already
set do CS_MODE_DISABLED, it is an error and should be reported as such.
Signed-off-by: Mathieu Poirier
Reviewed-by: Suzuki K Poulose
---
Add to the capabilities the ITRACE property so that ITRACE START events
are generated when the PMU is switched on by the core.
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/coresight-etm-perf.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
Resource selector pair 0 is always implemented and reserved. As such
it should not be explicitly programmed.
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/coresight-etm4x.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git
Make struct perf_event available to sink buffer allocation functions in
order to use the pid they carry to allocate and free buffer memory along
with regimenting access to what source a sink can collect data for.
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/coresight-etb10.c
Configure timestamps to be emitted at regular intervals in the trace
stream to temporally correlate instructions executed on different CPUs.
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/coresight-etm4x.c | 101 +-
1 file changed, 100 insertions(+), 1
Function free_event_data() is already busy and is bound to become
worse with the addition of CPU-wide trace scenarios. As such spin
off a new function to strickly take care of the sink buffers.
Signed-off-by: Mathieu Poirier
Reviewed-by: Suzuki K Poulose
---
This is the third revision of a patchset that adds support for CPU-wide
trace scenarios and as such, it is now possible to issue the following
commands:
# perf record -e cs_etm/@2007.etr/ -C 2,3 $COMMAND
# perf record -e cs_etm/@2007.etr/ -a $COMMAND
The solution is
From: Zhaoyang Huang
In previous implementation, the number of refault pages is used
for judging the refault period of each page, which is not precised as
eviction of other files will be affect a lot on current cache.
We introduce the timestamp into the workingset's entry and refault ratio
to
On 01/04/2019 06:14, Andrey Smirnov wrote:
> Add local struct qoriq_sensor pointer in qoriq_tmu_register_tmu_zone()
> for brevity.
>
> Signed-off-by: Andrey Smirnov
> Cc: Chris Healy
> Cc: Lucas Stach
> Cc: Zhang Rui
> Cc: Eduardo Valentin
> Cc: Daniel Lezcano
> Cc: Angus Ainslie (Purism)
On 01/04/2019 06:14, Andrey Smirnov wrote:
> Struct thermal_zone_device reference stored as sensor's private data
> isn't really used anywhere in the code. Drop it.
>
> Signed-off-by: Andrey Smirnov
> Cc: Chris Healy
> Cc: Lucas Stach
> Cc: Zhang Rui
> Cc: Eduardo Valentin
> Cc: Daniel
On 01/04/2019 06:14, Andrey Smirnov wrote:
> This driver is meant to be used with Device Tree and there's no
> use-case where device's DT node is going to be NULL. Remove code
> protecting against that.
May be elaborate why is never going to be NULL?
> Signed-off-by: Andrey Smirnov
> Cc: Chris
Hi, Hanjun.
> On Apr 3, 2019, at 10:02 PM, Hanjun Guo wrote:
>
> Hi Alex,
>
> On 2019/3/29 23:20, Alex Kogan wrote:
>> +
>> +static __always_inline void cna_init_node(struct mcs_spinlock *node, int
>> cpuid,
>> + u32 tail)
>> +{
>> +if
On 01/04/2019 06:14, Andrey Smirnov wrote:
> Use a local "struct device *dev" for brevity. No functional change
> intended.
>
> Signed-off-by: Andrey Smirnov
> Cc: Chris Healy
> Cc: Lucas Stach
> Cc: Zhang Rui
> Cc: Eduardo Valentin
> Cc: Daniel Lezcano
> Cc: Angus Ainslie (Purism)
> Cc:
Hi Prarit,
On Wed, Apr 03, 2019 at 07:42:45AM -0400, Prarit Bhargava wrote:
>
>
> On 4/3/19 3:02 AM, Naoya Horiguchi wrote:
> > turbostat could be terminated by general protection fault on some latest
> > hardwares which (for example) support 9 levels of C-states and show 18
> > "tADDED" lines.
On 01/04/2019 08:43, Elaine Zhang wrote:
> PX30 SOC has two Temperature Sensors for CPU and GPU.
>
> Signed-off-by: Elaine Zhang
> ---
> drivers/thermal/rockchip_thermal.c | 39
> ++
> 1 file changed, 39 insertions(+)
>
> diff --git
On 01/04/2019 08:43, Elaine Zhang wrote:
> Add a new compatible for thermal founding on PX30 SoCs.
>
> Signed-off-by: Elaine Zhang
> ---
> Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
On 01/04/2019 08:43, Elaine Zhang wrote:
> Based on the TSADC Tshut mode to select pinctrl,
> instead of setting pinctrl based on architecture
> (Not depends on pinctrl setting by "init" or "default").
> And it requires setting the tshut polarity before select pinctrl.
I'm not sure to fully read
On Wed, 03 Apr 2019, Vaittinen, Matti wrote:
> On Wed, 2019-04-03 at 12:25 +0100, Lee Jones wrote:
> > On Wed, 03 Apr 2019, Matti Vaittinen wrote:
> >
> > > On Wed, Apr 03, 2019 at 10:30:15AM +0100, Lee Jones wrote:
> > > > On Wed, 03 Apr 2019, Matti Vaittinen wrote:
> > > >
> > > > > Hello
Hi all,
Today's linux-next merge of the staging tree got conflicts in:
drivers/staging/mt7621-spi/Kconfig
drivers/staging/mt7621-spi/Makefile
between commit:
cbd66c626e16 ("spi: mt7621: Move SPI driver out of staging")
from the spi tree and commits:
99b75a4e3275 ("staging: add
On Wed, 03 Apr 2019, Jacek Anaszewski wrote:
> On 4/3/19 9:57 AM, Lee Jones wrote:
> > On Mon, 25 Mar 2019, Jacek Anaszewski wrote:
> >
> > > On 3/25/19 8:53 AM, Lee Jones wrote:
> > > > On Sat, 23 Mar 2019, Jacek Anaszewski wrote:
> > > >
> > > > > Hi Lee,
> > > > >
> > > > > Can we have your
Hi all,
Today's linux-next merge of the staging tree got conflicts in:
drivers/staging/media/mt9t031/Kconfig
drivers/staging/media/mt9t031/Makefile
between commit:
dfe571ca8daa ("media: soc_camera: Remove leftover files, add TODO")
from the v4l-dvb tree and commits:
99b75a4e3275
On 01/04/2019 05:29, Yuantian Tang wrote:
> Ls1088a has 2 thermal sensors, core cluster and SoC platform. Core cluster
> sensor is used to monitor the temperature of core and SoC platform is for
> platform. The current dts only support the first sensor.
> This patch adds the second sensor node to
Hi all,
Today's linux-next merge of the staging tree got a conflict in:
drivers/spi/spi-mt7621.c
between commit:
cbd66c626e16 ("spi: mt7621: Move SPI driver out of staging")
from the spi tree and commit:
18f0e249da67 ("staging: mt7621-spi: Remove parentheses")
from the staging tree.
The return from of_overlay_fdt_apply() just indicates success or fail.
The cookie is returned via reference.
Signed-off-by: Chris Packham
---
Documentation/devicetree/overlay-notes.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
PING
Any comment for this patch, Or consider to merge?
On 03/12/19 at 06:30pm, Baoquan He wrote:
> This is v3 post.
>
> The original v1 post can be found here:
> http://lkml.kernel.org/r/20180829141624.13985-1-...@redhat.com
>
> Later a v1 RESEND version:
>
PING
Is there any comment for this patchset, or could we consider to merge
them?
On 03/08/19 at 10:56am, Baoquan He wrote:
> This is v3 post, v2 post is here:
> http://lkml.kernel.org/r/20190228003522.9957-1-...@redhat.com
> v1 can be found here:
>
From: Zi Yan
Signed-off-by: Zi Yan
---
kernel/sysctl.c | 9 +
mm/copy_page.c | 2 +-
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/kernel/sysctl.c b/kernel/sysctl.c
index 3d8490e..0eae0b8 100644
--- a/kernel/sysctl.c
+++ b/kernel/sysctl.c
@@ -102,6 +102,7 @@
#if
From: Zi Yan
This prepare the support for migrate_page_concur(), which migrates
multiple pages at the same time.
Signed-off-by: Zi Yan
---
mm/copy_page.c | 123 +
mm/internal.h | 2 +
2 files changed, 125 insertions(+)
diff --git
From: Zi Yan
Users are expected to set memcg max size to reflect their memory
resource allocation policy. The syscall simply migrates pages belong
to the application's memcg between from_node to to_node, where
from_node is considered fast memory and to_node is considered slow
memory. In common
From: Zi Yan
Fallback to copy_highpage when it fails.
Signed-off-by: Zi Yan
---
include/linux/migrate_mode.h | 1 +
include/uapi/linux/mempolicy.h | 1 +
mm/migrate.c | 31 +--
3 files changed, 23 insertions(+), 10 deletions(-)
diff --git
From: Zi Yan
Make migration batch size adjustable to avoid excessive migration
overheads when a lot of pages are under migration.
Signed-off-by: Zi Yan
---
kernel/sysctl.c| 8
mm/memory_manage.c | 60 --
2 files changed, 48
From: Zi Yan
Since base page migration did not gain any speedup from
multi-threaded methods, we only accelerate the huge page case.
Signed-off-by: Zi Yan
---
kernel/sysctl.c | 11 +++
mm/migrate.c| 6 ++
2 files changed, 17 insertions(+)
diff --git a/kernel/sysctl.c
From: Zi Yan
It exchanges two pages by unmapping both first, then exchanging the
data of the pages using a u64 register, and finally remapping both
pages.
It saves the overheads of allocating two new pages in two
back-to-back migrate_pages().
Signed-off-by: Zi Yan
---
From: Zi Yan
Concurrent page migration unmaps all pages in a list, copy all pages
in one function (copy_page_list*), finally remaps all new pages.
This is different from existing page migration process which migrate
one page at a time.
Only anonymous pages are supported. All file-backed pages
From: Zi Yan
No functionality is changed. Prepare for the following patches,
which add parallel, concurrent page migration modes in conjunction
to the existing modes.
Signed-off-by: Zi Yan
---
fs/aio.c | 10 +-
fs/f2fs/data.c | 4 ++--
From: Zi Yan
vm.use_all_dma_chans will grab all usable DMA channels
vm.limit_dma_chans will limit how many DMA channels in use
Signed-off-by: Zi Yan
---
include/linux/highmem.h | 1 +
include/linux/sched/sysctl.h | 3 +
kernel/sysctl.c | 19 +++
mm/copy_page.c
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