This patch allows to create separate irq_set_wake and irq_set_type
implementations for different tegra designs PMC that has different
wake models which require difference wake registers and different
programming sequence.
AOWAKE model support is available for Tegra186 and Tegra194 only
and it resi
This patch adds support for Tegra pinctrl driver suspend and resume.
During suspend, context of all pinctrl registers are stored and
on resume they are all restored to have all the pinmux and pad
configuration for normal operation.
Acked-by: Thierry Reding
Reviewed-by: Dmitry Osipenko
Signed-of
This patch adds support for clk: tegra210: suspend-resume.
All the CAR controller settings are lost on suspend when core
power goes off.
This patch has implementation for saving and restoring all PLLs
and clocks context during system suspend and resume to have the
clocks back to same state for no
This patch implements save and restore of PLL context.
During system suspend, core power goes off and looses the settings
of the Tegra CAR controller registers.
So during suspend entry pll context is stored and on resume it is
restored back along with its state.
Acked-by: Thierry Reding
Signed-
This patch implements save and restore context for peripheral fixed
clock ops, peripheral gate clock ops, sdmmc mux clock ops, and
peripheral clock ops.
During system suspend, core power goes off and looses the settings
of the Tegra CAR controller registers.
So during suspend entry clock and rese
This patch implements save and restore context for clk_super_mux
and clk_super.
During system supend, core power goes off the and context of Tegra
CAR registers is lost.
So during suspend entry, context of super clock registers are saved
through save_context clk_ops and are restored through resto
This patch updates device tree for RTC and PMC to allow system wake
from deep sleep on RTC alarm.
Signed-off-by: Sowjanya Komatineni
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
b/ar
This patch adds suspend and resume pm ops for cpufreq driver.
PLLP is the safe clock source for CPU during system suspend and
resume as PLLP rate is below the CPU Fmax at Vmin.
CPUFreq driver suspend switches the CPU clock source to PLLP and
disables the DFLL clock.
During system resume, warmboo
This patch implements PMC wakeup sequence for Tegra210 and defines
common used RTC alarm wake event.
Signed-off-by: Sowjanya Komatineni
---
drivers/soc/tegra/pmc.c | 98 +
1 file changed, 98 insertions(+)
diff --git a/drivers/soc/tegra/pmc.c b/dri
This patch implements DFLL suspend and resume operation.
During system suspend entry, CPU clock will switch CPU to safe
clock source of PLLP and disables DFLL clock output.
DFLL driver suspend confirms DFLL disable state and errors out on
being active.
DFLL is re-initialized during the DFLL driv
This patch has Jetson TX1 platform specific SC7 timing configuration
in device tree.
Signed-off-by: Sowjanya Komatineni
---
arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
b/arch/arm64/boot/
Tegra210 and prior Tegra chips have deep sleep entry and wakeup related
timings which are platform specific that should be configured before
entering into deep sleep.
Below are the timing specific configurations for deep sleep entry and
wakeup.
- Core rail power-on stabilization timer
- OSC clock
On 7/31/19 4:08 AM, Vlastimil Babka wrote:
>
> I agree this is an improvement overall, but perhaps the patch does too
> many things at once. The reshuffle is one thing and makes sense. The
> change of the last return condition could perhaps be separate. Also
> AFAICS the ultimate result is that wh
This patch adds Jetson Nano platform specific SC7 timing configuration
in the device tree.
Signed-off-by: Sowjanya Komatineni
---
arch/arm64/boot/dts/nvidia/tegra210-p3450-.dts | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-.dts
b/ar
This patch configures polarity of the core power request signal
in PMC control register based on the device tree property.
PMC asserts and de-asserts power request signal based on it polarity
when it need to power-up and power-down the core rail during SC7.
Signed-off-by: Sowjanya Komatineni
---
This patch adds support for saving OSC clock frequency and the
drive-strength during OSC clock init and creates an API to restore
OSC control register value from the saved context.
This API is invoked by Tegra210 clock driver during system resume
to restore the OSC clock settings.
Acked-by: Thie
This patch uses fence_udelay rather than udelay during PLLU
initialization to ensure writes to clock registers happens before
waiting for specified delay.
Acked-by: Thierry Reding
Signed-off-by: Sowjanya Komatineni
---
drivers/clk/tegra/clk-tegra210.c | 8
1 file changed, 4 insertions(
This patch implements save and restore of pllout context.
During system suspend, core power goes off and looses the settings
of the Tegra CAR controller registers.
So during suspend entry the state of pllout is saved and on resume
it is restored back to have pllout in same state as before suspend
This patch adds suspend and resume functionality to Tegra210 pinctrl.
Signed-off-by: Sowjanya Komatineni
---
drivers/pinctrl/tegra/pinctrl-tegra210.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra210.c
b/drivers/pinctrl/tegra/pinctrl-tegra210.c
index 39a
On 7/31/19 4:04 AM, Dmitry Osipenko wrote:
31.07.2019 3:20, Sowjanya Komatineni пишет:
This patch updates device tree for RTC and PMC to allow system wake
from deep sleep on RTC alarm.
Signed-off-by: Sowjanya Komatineni
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 5 -
1 file change
On 7/31/19 4:14 AM, Dmitry Osipenko wrote:
31.07.2019 13:23, Dmitry Osipenko пишет:
31.07.2019 3:20, Sowjanya Komatineni пишет:
This patch adds suspend and resume pm ops for cpufreq driver.
PLLP is the safe clock source for CPU during system suspend and
resume as PLLP rate is below the CPU F
On 7/31/19 4:11 AM, Dmitry Osipenko wrote:
31.07.2019 3:20, Sowjanya Komatineni пишет:
This patch adds support for saving OSC clock frequency and the
drive-strength during OSC clock init and creates an API to restore
OSC control register value from the saved context.
This API is invoked by Te
From: "Matthew Wilcox (Oracle)"
Transparent Huge Pages are currently stored in i_pages as pointers to
consecutive subpages. This patch changes that to storing consecutive
pointers to the head page in preparation for storing huge pages more
efficiently in i_pages.
Large parts of this are "inspir
On Mon, Jul 29, 2019 at 06:49:09PM -0700, Deepa Dinamani wrote:
> POSIX is ambiguous on the behavior of timestamps for
> futimens, utimensat and utimes. Whether to return an
> error or silently clamp a timestamp beyond the range
> supported by the underlying filesystems is not clear.
>
> POSIX.1 s
On July 31, 2019 11:48:32 AM PDT, Peter Zijlstra wrote:
>On Wed, Jul 31, 2019 at 11:24:36AM -0700, h...@zytor.com wrote:
>> >> > +/*
>> >> > + * Add the pseudo keyword 'fallthrough' so case statement
>blocks
>> >> > + * must end with any of these keywords:
>> >> > + * break;
>> >> > + * fallth
On Wed, Jul 31, 2019 at 10:02 PM Kees Cook wrote:
>
> On Wed, Jul 31, 2019 at 08:48:32PM +0200, Peter Zijlstra wrote:
> > On Wed, Jul 31, 2019 at 11:24:36AM -0700, h...@zytor.com wrote:
> > > >> > +/*
> > > >> > + * Add the pseudo keyword 'fallthrough' so case statement blocks
> > > >> > + * must
On Wed, Jul 31, 2019 at 09:35:31AM -0700, Joe Perches wrote:
> On Wed, 2019-07-31 at 08:16 -0400, Neil Horman wrote:
> > On Wed, Jul 31, 2019 at 04:32:43AM -0700, Joe Perches wrote:
> > > On Wed, 2019-07-31 at 07:19 -0400, Neil Horman wrote:
> > > > On Tue, Jul 30, 2019 at 10:04:37PM -0700, Joe Per
On Wed, 31 Jul 2019 14:22:13 +0200 David Hildenbrand wrote:
> Each memory block spans the same amount of sections/pages/bytes. The size
> is determined before the first memory block is created. No need to store
> what we can easily calculate - and the calculations even look simpler now.
>
> Whil
Tx doorbell is handled by txdb_tasklet and doesn't
have an associated IRQ.
Anyhow, imx_mu_shutdown ignores this and tries to
free an IRQ that wasn't requested for Tx DB resulting
in the following warning:
[1.967644] Trying to free already-free IRQ 26
[1.972108] WARNING: CPU: 2 PID: 157 at
On Fri, Jul 26, 2019 at 10:57 PM Hou Tao wrote:
>
> It's just code clean-up.
>
> Signed-off-by: Hou Tao
Applied to my local branch. Thanks for the clean up.
Song
Dan,
On 7/31/19 9:06 PM, Dan Murphy wrote:
> Jacek
>
> On 7/29/19 3:50 PM, Jacek Anaszewski wrote:
>> Dan,
>>
>> On 7/25/19 8:28 PM, Dan Murphy wrote:
>>> Introduce a multicolor class that groups colored LEDs
>>> within a LED node.
>>>
>>> The framework allows for dynamically setting individual L
When CONFIG_KASAN_SW_TAGS=n, set_tag() is compiled away. GCC throws a
warning,
mm/kasan/common.c: In function '__kasan_kmalloc':
mm/kasan/common.c:464:5: warning: variable 'tag' set but not used
[-Wunused-but-set-variable]
u8 tag = 0xff;
^~~
Fix it by making __tag_set() a static inline fun
> Actual working physical floppy hardware is getting hard to find, and
> while Willy was able to test this, I think the driver can be considered
> pretty much dead from an actual hardware standpoint.
Just for the record: I have an Ubuntu machine, still in daily use,
that has a floppy disk connecto
The pull request you sent on Wed, 31 Jul 2019 19:53:27 +0100:
> git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs.git fixes
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/5c6207539aea8b22490f9569db5aa72ddfd0d486
Thank you!
--
Deet-doot-dot, I am a bot.
https://
The pull request you sent on Wed, 31 Jul 2019 11:05:17 -0400:
> git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace.git
> trace-v5.3-rc2
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/d2eee9fca172d0d010ef3060cdc971e0b079b87f
Thank you!
--
Deet-doot-do
Hi Zhou,
On Wed, Jul 31, 2019 at 12:39:03PM +0800, Zhou Yanjie wrote:
> 1.fix bugs when detecting L2 cache sets value.
> 2.fix bugs when detecting L2 cache ways value.
> 3.fix bugs when calculate bogoMips and loops_per_jiffy.
This should be split into 2 patches - one that fixes the L2 cache
detec
On 7/31/19 21:05, Pavel Machek wrote:
> Hi!
hi Pavel,
>
>> [ Upstream commit ba3684f99f1b25d2a30b6956d02d339d7acb9799 ]
>>
>> The function msm_wait_for_xmitr can be taken with interrupts
>> disabled. In order to avoid a potential system lockup - demonstrated
>> under stress testing conditions on
On 19:49 31/07, Shiyang Ruan wrote:
> This patchset aims to take care of this issue to make reflink and dedupe
> work correctly in XFS.
>
> It is based on Goldwyn's patchsets: "v4 Btrfs dax support" and "Btrfs
> iomap". I picked up some patches related and made a few fix to make it
> basically wo
On 7/31/19 5:06 AM, Vlastimil Babka wrote:
> On 7/24/19 7:50 PM, Mike Kravetz wrote:
>> For PAGE_ALLOC_COSTLY_ORDER allocations, MIN_COMPACT_COSTLY_PRIORITY is
>> minimum (highest priority). Other places in the compaction code key off
>> of MIN_COMPACT_PRIORITY. Costly order allocations will neve
The following patchset enables CPU frequency scaling support on the
QCS404 (with dynamic voltage scaling).
It is important to notice that this functionality will be superseded
by Core Power Reduction (CPR), a more accurate form of AVS found on
certain Qualcomm SoCs.
Some of the changes required t
There is clock controller functionality in the APCS hardware block of
qcs404 devices similar to msm8916.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
---
drivers/mailbox/qcom-apcs-ipc-mailbox.c | 8 +---
1 file
Use the correct macro when registering the platform device.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
---
drivers/mailbox/qcom-apcs-ipc-mailbox.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --g
Make the output of the high frequency pll a clock provider.
On the QCS404 this PLL controls cpu frequency scaling.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
Acked-by: Stephen Boyd
---
drivers/clk/qcom/hfpll.c |
When the APCS clock is registered (platform dependent), it retrieves
its parent names from hardcoded values in the driver.
The following commit allows the DT node to provide such clock names to
the platform data based clock driver therefore avoiding having to
explicitly embed those names in the cl
The high frequency pll functionality is required to enable CPU
frequency scaling operation.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 9 +
1 file changed, 9 ins
Specify the clocks that feed the APCS mux/divider instead of using
default hardcoded values in the source code.
The driver still supports the previous bindings; however with this
update it we allow the msm8916 to access the parent clock names
required by the driver operation using the device tree
The high frequency pll is required on compatible Qualcomm SoCs to
support the CPU frequency scaling feature.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 in
Support dynamic voltage and frequency scaling on qcs404.
CPUFreq will soon be superseeded by Core Power Reduction (CPR, a form
of Adaptive Voltage Scaling found on some Qualcomm SoCs like the
qcs404).
Due to the CPR upstreaming already being in progress - and some
commits already merged - the f
Specify the clocks that feed the APCS mux/divider instead of using
default hardcoded values in the source code.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 3 +++
1 file
Allow accessing the parent clock name required for the driver
operation using the device tree node.
This permits extending the driver to other platforms without having to
modify its source code.
For backwards compatibility leave the previous value as default.
Co-developed-by: Niklas Cassel
Sign
Allow accessing the parent clock names required for the driver
operation by using the device tree node.
This permits extending the driver to other platforms without having to
modify its source code.
For backwards compatibility leave previous values as default.
Co-developed-by: Niklas Cassel
Sig
When COMMON_CLK_DISABLED_UNUSED is set, in an effort to save power and
to keep the software model of the clock in line with reality, the
framework transverses the clock tree and disables those clocks that
were enabled by the firmware but have not been enabled by any device
driver.
If CPUFREQ is en
Limit the GPLL0_AO_OUT_MAIN operating frequency as per its hardware
specifications.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
Acked-by: Stephen Boyd
---
drivers/clk/qcom/clk-alpha-pll.c | 8
drivers/cl
On Wed, Jul 31, 2019 at 9:37 AM Paolo Bonzini wrote:
>
> On 31/07/19 15:50, Vitaly Kuznetsov wrote:
> > Jim Mattson writes:
> >
> >> On Thu, Jun 20, 2019 at 4:02 AM Vitaly Kuznetsov
> >> wrote:
> >>>
> >>> Regardless of the way how we skip instruction, interrupt shadow needs to
> >>> be
> >>>
Hello Andrew,
Thanks so much for your help.
> From: Andrew Jeffery
> Sent: Tuesday, July 30, 2019 8:19 PM
> To: Hongwei Zhang; Linus Walleij; linux-g...@vger.kernel.org
> Cc: Joel Stanley; linux-asp...@lists.ozlabs.org; Bartosz Golaszewski;
> linux-kernel@vger.kernel.org;
> linux-arm-ker...
On Tue, Jul 30, 2019 at 10:54:13AM -0700, Isaac J. Manjarres wrote:
> Currently, when checking to see if accessing n bytes starting at
> address "ptr" will cause a wraparound in the memory addresses,
> the check in check_bogus_address() adds an extra byte, which is
> incorrect, as the range of addr
Hi Andrey,
On Wed, Jul 31, 2019 at 3:01 PM Andrey Smirnov wrote:
>
> With commit b5bbe2235361 ("usb: phy: mxs: Disable external charger
> detect in mxs_phy_hw_init()") in tree all of the necessary charger
> setup is done by the USB PHY driver which covers all of the affected
> i.MX6 SoCs.
>
> NOT
On Wed, 31 Jul 2019 18:32:47 +0100
Dietmar Eggemann wrote:
[...]
> static void dequeue_dl_entity(struct sched_dl_entity *dl_se)
> {
> +if (!on_dl_rq(dl_se))
> +return;
> >>>
> >>> Why allow double dequeue instead of WARN?
> >>
> >> As I was saying
GCC throws a warning,
arch/arm64/mm/mmu.c: In function 'pud_free_pmd_page':
arch/arm64/mm/mmu.c:1033:8: warning: variable 'pud' set but not used
[-Wunused-but-set-variable]
pud_t pud;
^~~
because pud_table() is a macro and compiled away. Fix it by making it a
static inline function and
On Wed, Jul 31, 2019 at 12:35:09PM -0700, Matthew Wilcox wrote:
> On Wed, Jul 31, 2019 at 03:32:40PM -0400, Laura Abbott wrote:
> > Fix this by ensuring the value we set with set_freepointer is either NULL
> > or another value in the chain.
> >
> > Reported-by: kernel test robot
> > Signed-off-by
The lpc32xx_loopback_set() function in hte lpc32xx_hs driver is the
one thing that relies on platform header files. Move that into the
core platform code so we only need a variable declaration for it,
and enable COMPILE_TEST building.
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-lpc32xx/serial
Hi,
Both the Ext2 filesystem handler and the Ext4 filesystem handler will
return the ERANGE error code. Ext2 will return it if the name or value
is
too long to be able to be stored, Ext4 will return it if the name is too
long. For reference, the relevant files/lines (with excerpts) are:
fs/ext
Add SGPIO driver support for Aspeed AST2500 SoC.
Signed-off-by: Hongwei Zhang
Reviewed-by: Andrew Jeffery
---
drivers/gpio/sgpio-aspeed.c | 530
1 file changed, 530 insertions(+)
create mode 100644 drivers/gpio/sgpio-aspeed.c
diff --git a/drivers
The lpc-enet driver can now be built on all platforms, so
allow compile testing as well.
Signed-off-by: Arnd Bergmann
---
drivers/net/ethernet/nxp/Kconfig | 2 +-
drivers/net/ethernet/nxp/lpc_eth.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/nxp/Kc
Add bindings to support SGPIO on AST2400 or AST2500.
Signed-off-by: Hongwei Zhang
Reviewed-by: Andrew Jeffery
---
.../devicetree/bindings/gpio/sgpio-aspeed.txt | 55 ++
1 file changed, 55 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/sgpio-a
Hello,
This short series introduce dt-binding document and a driver for the
Aspeed AST2500 SGPIO controller. Please review.
[v7]: Changes between v6 and v7:
- fix missing variable 'reg' assign issue in aspeed_sgpio_set()
- v6 feedback updates
[v6]: Changes between v5 and v6:
On Wed, Jul 31, 2019 at 08:48:32PM +0200, Peter Zijlstra wrote:
> On Wed, Jul 31, 2019 at 11:24:36AM -0700, h...@zytor.com wrote:
> > >> > +/*
> > >> > + * Add the pseudo keyword 'fallthrough' so case statement blocks
> > >> > + * must end with any of these keywords:
> > >> > + * break;
> > >> >
On Thu, Aug 01, 2019 at 03:01:49AM +0900, Joonwon Kang wrote:
> Recursive declaration for struct which has member of the same struct
> type, for example,
>
> struct foo {
> struct foo f;
> ...
> };
>
> is not allowed. So, it is unnecessary to check if a struct has this
> kind of member.
--
Accept my greetings to you
Assist Request From You
I am 28 years old single an orphan my parents died when I am five
years old nobody to help me,I send you my business proposal with tears
and sorrow,Please let this not be a surprised message to you because I
decided to contact you on this ma
The only thing that prevents building this driver on other
platforms is the mach/hardware.h include, which is not actually
used here at all, so remove the line and allow CONFIG_COMPILE_TEST.
Signed-off-by: Arnd Bergmann
---
drivers/usb/gadget/udc/Kconfig | 3 ++-
drivers/usb/gadget/udc/lpc
On Thu, Aug 01, 2019 at 03:01:10AM +0900, Joonwon Kang wrote:
> Before this, there were false negatives in the case where a struct
> contains other structs which contain only function pointers because
> of unreachable code in is_pure_ops_struct().
>
> Signed-off-by: Joonwon Kang
I've applied thi
On Wed, Jul 10, 2019 at 10:51:49PM +0100, Kieran Bingham wrote:
> The I2C core framework provides a simplified probe framework from commit
> b8a1a4cd5a98 ("i2c: Provide a temporary .probe_new() call-back type").
>
> These drivers do not utilise the i2c_device_id table in the probe, so we
> can eas
Hi Stephen,
Le 31/07/2019 à 21:35, Stephen Boyd a écrit :
> A future patch is going to change semantics of clk_register() so that
> clk_hw::init is guaranteed to be NULL after a clk is registered. Avoid
> referencing this member here so that we don't run into NULL pointer
> exceptions.
>
> Cc: Ne
On Wed, Jul 10, 2019 at 10:51:48PM +0100, Kieran Bingham wrote:
> The I2C core framework provides a simplified probe framework from commit
> b8a1a4cd5a98 ("i2c: Provide a temporary .probe_new() call-back type").
>
> This driver does not utilise the i2c_device_id table in the probe, so we can
> eas
On Wed, Jul 10, 2019 at 10:51:47PM +0100, Kieran Bingham wrote:
> The I2C core framework provides a simplified probe framework from commit
> b8a1a4cd5a98 ("i2c: Provide a temporary .probe_new() call-back type").
>
> This driver does not utilise the i2c_device_id table in the probe, so we can
> eas
On Wed, Jul 10, 2019 at 10:51:45PM +0100, Kieran Bingham wrote:
> The I2C core framework provides a simplified probe framework from commit
> b8a1a4cd5a98 ("i2c: Provide a temporary .probe_new() call-back type").
>
> This driver does not utilise the i2c_device_id table in the probe, so we can
> eas
On Wed, Jul 10, 2019 at 10:51:46PM +0100, Kieran Bingham wrote:
> The I2C core framework provides a simplified probe framework from commit
> b8a1a4cd5a98 ("i2c: Provide a temporary .probe_new() call-back type").
>
> This driver does not utilise the i2c_device_id table in the probe, so we can
> eas
On Wed, Jul 10, 2019 at 10:51:44PM +0100, Kieran Bingham wrote:
> The I2C core framework provides a simplified probe framework from commit
> b8a1a4cd5a98 ("i2c: Provide a temporary .probe_new() call-back type").
>
> This driver does not utilise the i2c_device_id table in the probe, so we can
> eas
Jacek
On 7/31/19 2:45 PM, Jacek Anaszewski wrote:
Dan,
On 7/31/19 8:55 PM, Dan Murphy wrote:
Jacek
Thanks for looking
You're welcome.
[...}
I don't see any parsing for color here but I suppose that I can add that
now
I thought about that occurrence in lp5xx_parse_channel_child().
No tha
On Mon, Jul 29, 2019 at 05:38:31PM +0530, Ravulapati Vishnu vardhan rao wrote:
> Reduced period size and offsets.
Why?
> #define PLAYBACK_MAX_NUM_PERIODS8
> -#define PLAYBACK_MAX_PERIOD_SIZE16384
> -#define PLAYBACK_MIN_PERIOD_SIZE4096
> +#define PLAYBACK_MAX_PERIOD_SIZE8192
> +#
Dan,
On 7/31/19 8:55 PM, Dan Murphy wrote:
> Jacek
>
> Thanks for looking
You're welcome.
> On 7/31/19 1:45 PM, Jacek Anaszewski wrote:
>> Hi Dan,
>>
>> Thank you for the patch. My comments are below.
>>
>> On 7/25/19 8:28 PM, Dan Murphy wrote:
>>> Update the lp5523 to use the multi color frame
Hi Javier,
thank you for providing the extra information.
(And Kieran, thanks for the patch!)
> The other option is to remove i2c_of_match_device() and don't make OF match
> to fallback to i2c_of_match_device_sysfs(). This is what happens in the ACPI
> case, since i2c_device_match() just calls a
On Wed, 31 Jul 2019, Jan Kara wrote:
> On Tue 30-07-19 13:24:56, Thomas Gleixner wrote:
> > Bit spinlocks are problematic if PREEMPT_RT is enabled. They disable
> > preemption, which is undesired for latency reasons and breaks when regular
> > spinlocks are taken within the bit_spinlock locked regi
On Wed, Jul 31, 2019 at 04:32:52PM -0300, Jason Gunthorpe wrote:
> On Wed, Jul 31, 2019 at 09:29:28PM +0800, Jason Wang wrote:
> >
> > On 2019/7/31 下午8:41, Jason Gunthorpe wrote:
> > > On Wed, Jul 31, 2019 at 04:46:50AM -0400, Jason Wang wrote:
> > > > The vhost_set_vring_num_addr() could be calle
On Sun, 28 Jul 2019, Bin Meng wrote:
> The spec does not mention 40-bit physical addresses, but 56-bit.
Thanks, agreed. Updated patch below
- Paul
From: Paul Walmsley
Date: Fri, 26 Jul 2019 10:21:11 -0700
Subject: [PATCH v2] riscv: kbuild: add virtual memory system selection
The RISC-V spec
We don't want clk provider drivers to use the init structure after clk
registration time, but we leave a dangling reference to it by means of
clk_hw::init. Let's overwrite the member with NULL during clk_register()
so that this can't be used anymore after registration time.
Cc: Bjorn Andersson
Cc
A future patch is going to change semantics of clk_register() so that
clk_hw::init is guaranteed to be NULL after a clk is registered. Avoid
referencing this member here so that we don't run into NULL pointer
exceptions.
Cc: Taniya Das
Cc: Andy Gross
Signed-off-by: Stephen Boyd
---
Please ack
A future patch is going to change semantics of clk_register() so that
clk_hw::init is guaranteed to be NULL after a clk is registered. Avoid
referencing this member here so that we don't run into NULL pointer
exceptions.
Cc: Manivannan Sadhasivam
Signed-off-by: Stephen Boyd
---
Please ack so I
A future patch is going to change semantics of clk_register() so that
clk_hw::init is guaranteed to be NULL after a clk is registered. Avoid
referencing this member here so that we don't run into NULL pointer
exceptions.
Cc: Roger Quadros
Cc: Kishon Vijay Abraham I
Signed-off-by: Stephen Boyd
-
A future patch is going to change semantics of clk_register() so that
clk_hw::init is guaranteed to be NULL after a clk is registered. Avoid
referencing this member here so that we don't run into NULL pointer
exceptions.
Cc: Chunyan Zhang
Cc: Baolin Wang
Signed-off-by: Stephen Boyd
---
Please
On Wed, Jul 31, 2019 at 03:32:40PM -0400, Laura Abbott wrote:
> Fix this by ensuring the value we set with set_freepointer is either NULL
> or another value in the chain.
>
> Reported-by: kernel test robot
> Signed-off-by: Laura Abbott
Fixes: 6471384af2a6 ("mm: security: introduce init_on_alloc
We don't want clk provider drivers using the init member of struct
clk_hw after the clk is registered. It isn't guaranteed to be a valid
pointer and all the necessary information inside the structure is copied
over into struct clk_core anyway. This patch series fixes up the handful
of users that do
A future patch is going to change semantics of clk_register() so that
clk_hw::init is guaranteed to be NULL after a clk is registered. Avoid
referencing this member here so that we don't run into NULL pointer
exceptions.
Cc: Neil Armstrong
Cc: Jerome Brunet
Signed-off-by: Stephen Boyd
---
Plea
A future patch is going to change semantics of clk_register() so that
clk_hw::init is guaranteed to be NULL after a clk is registered. Avoid
referencing this member here so that we don't run into NULL pointer
exceptions.
Cc: Dinh Nguyen
Signed-off-by: Stephen Boyd
---
Please ack so I can take t
A future patch is going to change semantics of clk_register() so that
clk_hw::init is guaranteed to be NULL after a clk is registered. Avoid
referencing this member here so that we don't run into NULL pointer
exceptions.
Cc: Guo Zeng
Cc: Barry Song
Signed-off-by: Stephen Boyd
---
Please ack so
A future patch is going to change semantics of clk_register() so that
clk_hw::init is guaranteed to be NULL after a clk is registered. Avoid
referencing this member here so that we don't run into NULL pointer
exceptions.
Cc: Charles Keepax
Cc: Richard Fitzgerald
Signed-off-by: Stephen Boyd
---
To properly clear the slab on free with slab_want_init_on_free,
we walk the list of free objects using get_freepointer/set_freepointer.
The value we get from get_freepointer may not be valid. This
isn't an issue since an actual value will get written later
but this means there's a chance of trigger
On Wed, Jul 31, 2019 at 09:29:28PM +0800, Jason Wang wrote:
>
> On 2019/7/31 下午8:41, Jason Gunthorpe wrote:
> > On Wed, Jul 31, 2019 at 04:46:50AM -0400, Jason Wang wrote:
> > > The vhost_set_vring_num_addr() could be called in the middle of
> > > invalidate_range_start() and invalidate_range_end(
On Wed, Jul 31, 2019 at 11:15 AM Pavel Machek wrote:
>
> On Mon 2019-07-29 21:23:19, Greg Kroah-Hartman wrote:
> > From: Dan Williams
> >
> > commit b70d31d054ee3a6fc1034b9d7fc0ae1e481aa018 upstream.
> >
> > In preparation for fixing a deadlock between wait_for_bus_probe_idle()
> > and the nvdimm
On Wed, Jul 31, 2019 at 09:28:20PM +0800, Jason Wang wrote:
>
> On 2019/7/31 下午8:39, Jason Gunthorpe wrote:
> > On Wed, Jul 31, 2019 at 04:46:53AM -0400, Jason Wang wrote:
> > > We used to use RCU to synchronize MMU notifier with worker. This leads
> > > calling synchronize_rcu() in invalidate_ran
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