The chip has a 'start conversion' and a 'end of conversion' pair of
pins. They can be used but this is absolutely not mandatory as regular
polling of the value is totally fine with the current internal
clocking setup. Turn the interrupts optional and do not error out if
they are not inquired in
Maxim's max12xx series is very similar to the max10xx series, with the
difference of the measurements depth which is upgraded from 10 to 12
bits per channel. Everything else looks the same.
Signed-off-by: Miquel Raynal
---
drivers/iio/adc/Kconfig | 4 ++--
drivers/iio/adc/max1027.c | 41
The chips have a 'start conversion' and a 'end of conversion' pair of
pins. They can be used but this is absolutely not mandatory as regular
polling is supported by the chip depending on its internal clocking
setup.
There is no physical reason to force the use of interrupts so turn
them optional.
All the registers are configured by the driver, let's reset the chip
at probe time, avoiding any conflict with a possible earlier
configuration.
Signed-off-by: Miquel Raynal
---
drivers/iio/adc/max1027.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/iio/adc/max1027.c
Until now, only write operations were supported. Force two bytes read
operation when reading from this register (might be wrong when reading
the temperature, but will work with any other value).
Signed-off-by: Miquel Raynal
---
drivers/iio/adc/max1027.c | 7 +--
1 file changed, 5
Update the bindings documentation with new Maxim ADCs compatibles.
Signed-off-by: Miquel Raynal
---
.../devicetree/bindings/iio/adc/max1027-adc.txt| 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/iio/adc/max1027-adc.txt
Hello, here is a patchset updating the existing max1027.c driver (for
10-bit max1027/29/31 ADCs) with a few corrections/improvements and
then introducing their 12-bit cousins named max1227/29/31.
As on my hardware setup the "start conversion" and "end of conversion"
pin are not wired (which is
Maxim's max1027/29/31 series returns the measured voltages with a
resolution of 10 bits. There is a very similar series, max1227/29/31
which works very similarly but uses a resolution of 12 bits. Prepare
the support for these chips by turning the 'depth' into a macro
parameter instead of
On Tue, 2019-10-01 at 11:17 -0700, Ira Weiny wrote:
> On Mon, Sep 23, 2019 at 04:17:59PM -0400, Jeff Layton wrote:
> > On Mon, 2019-09-23 at 12:08 -0700, Ira Weiny wrote:
> > > Since the last RFC patch set[1] much of the discussion of supporting RDMA
> > > with
> > > FS DAX has been around the
From: Thierry Reding
The gpiod_set_debounce() function takes the debounce time in
microseconds. Adjust the switch/case values in the MAX77620 GPIO to use
the correct unit.
Signed-off-by: Thierry Reding
---
drivers/gpio/gpio-max77620.c | 6 +++---
1 file changed, 3 insertions(+), 3
From: Timo Alho
The interrupt-related register fields on the MAX77620 GPIO controller
share registers with GPIO related fields. If the IRQ chip is implemented
with regmap-irq, this causes the IRQ controller code to overwrite fields
previously configured by the GPIO controller code.
Two examples
From: Thierry Reding
regmap_add_irq_chip() will try to allocate all of the IRQ descriptors
upfront if passed a non-zero irq_base parameter. However, the intention
is to allocate IRQ descriptors on an as-needed basis if possible. Pass 0
instead of -1 to fix that use-case.
Signed-off-by: Thierry
On Tue, Oct 01, 2019 at 03:23:33PM +0200, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> Use the new regulator helper instead of a for loop.
>
> Signed-off-by: Bartosz Golaszewski
> ---
> drivers/usb/host/xhci-tegra.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
On Tue, Oct 01, 2019 at 03:23:32PM +0200, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> Use the new regulator helper instead of a for loop.
>
> Signed-off-by: Bartosz Golaszewski
> ---
> drivers/phy/tegra/xusb.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
On Tue, Oct 01, 2019 at 03:23:31PM +0200, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> Use the new regulator helper instead of a for loop.
>
> Signed-off-by: Bartosz Golaszewski
> ---
> drivers/ata/ahci_tegra.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
On Wed, Oct 02, 2019 at 12:55:45PM +0100, Colin King wrote:
> From: Colin Ian King
>
> Shifting the u32 integer result of (pci_dword & SNR_IMC_MMIO_BASE_MASK)
> will end up with an overflow when pci_dword greater than 0x1ff. Fix this
> by casting pci_dword to a resource_size_t before masking and
Implement arch_scale_freq_capacity() for 'modern' x86. This function
is used by the scheduler to correctly account usage in the face of
DVFS.
The present patch addresses Intel processors specifically and has positive
performance and performance-per-watt implications for the schedutil cpufreq
v1 at https://lore.kernel.org/lkml/20190909024216.5942-1-ggherdov...@suse.cz/
Changes wrt v1:
- add x86-specific implementation of arch_scale_freq_invariant() using a
static key that checks for the availability of APERF and MPERF
- refer to GOLDMONT_D instead of GOLDMONT_X, according to recent
From: Srinivas Pandruvada
intel_pstate has two operating modes: active and passive. In "active"
mode, the in-built scaling governor is used and in "passive" mode,
the driver can be used with any governor like "schedutil". In "active"
mode the utilization values from schedutil is not used and
Hi Tejun,
In a system with Thunderbolt connected NVMe or SSD entering system
suspend, detaching the NVMe/SSD and resuming the system hangs (see also
https://bugzilla.kernel.org/show_bug.cgi?id=204385).
Triggering sysrq-w I see this:
[ 113.093783] Workqueue: nvme-wq nvme_remove_dead_ctrl_work
On Tue, 2019-09-24 at 18:00 +0200, Peter Zijlstra wrote:
> On Tue, Sep 24, 2019 at 04:03:32PM +0200, Peter Zijlstra wrote:
>
> > > I'll check what's the cost of static_cpu_has() and if it's non-negligible
> > > I'll
> > > do what you suggest (x86-specific version of arch_scale_freq_invariant().
On Tue, 2019-09-24 at 18:04 +0200, Peter Zijlstra wrote:
> On Mon, Sep 09, 2019 at 04:42:15AM +0200, Giovanni Gherdovich wrote:
>
> > +static void intel_set_cpu_max_freq(void)
> > +{
> > + /*
> > +* TODO: add support for:
> > +*
> > +* - Xeon Phi (KNM, KNL)
> > +* - Xeon
Hello Peter,
late replies as I wasn't in the office last week.
On Tue, 2019-09-24 at 18:30 +0200, Peter Zijlstra wrote:
> On Mon, Sep 09, 2019 at 04:42:15AM +0200, Giovanni Gherdovich wrote:
> > +static const struct x86_cpu_id has_turbo_ratio_group_limits[] = {
> > +
On Wed, Oct 2, 2019 at 12:30 PM Kalle Valo wrote:
> New warning:
>
> drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c: In function
> 'rtl8xxxu_refresh_rate_mask':
> drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c:5907:7: warning: this
> statement may fall through
We have 3 laptops which connect the wifi by the same RTL8723BU.
The PCI VID/PID of the wifi chip is 10EC:B720 which is supported.
They have the same problem with the in-kernel rtl8xxxu driver, the
iperf (as a client to an ethernet-connected server) gets ~1Mbps.
Nevertheless, the signal strength is
On Mon, 2019-09-30 at 12:36 +0800, Walter Wu wrote:
> On Fri, 2019-09-27 at 21:41 +0200, Dmitry Vyukov wrote:
> > On Fri, Sep 27, 2019 at 4:22 PM Walter Wu wrote:
> > >
> > > On Fri, 2019-09-27 at 15:07 +0200, Dmitry Vyukov wrote:
> > > > On Fri, Sep 27, 2019 at 5:43 AM Walter Wu
> > > > wrote:
Recently added code introduces 64-bit division in dr_icm_pool_mr_create()
so that build on 32-bit architectures fails with
ERROR: "__umoddi3" [drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.ko]
undefined!
As the divisor is always a power of 2, we can use bitwise operation
instead.
Fixes:
Hi Jacopo,
Maybe, I miss spoke when I mentioned a helper I did not intent a framework
level generic function. Just a function to help in this case :)
That being said, I re-read the thread you mentioned. And as Hughes pointed
out dynamically generating a "working" link frequency value which can
On Wed, Oct 2, 2019 at 11:57 AM Arnd Bergmann wrote:
>
> asm/io.h may not be included implicitly, causing a rare
> randconfig build error:
>
> drivers/input/misc/ixp4xx-beeper.c:48:3: error: implicit declaration of
> function '__raw_writel' [-Werror,-Wimplicit-function-declaration]
>
Hi Petr,
Thank you for the review.
On Tue, Sep 24, 2019 at 12:38:29PM +0200, Petr Mladek wrote:
> On Wed 2019-09-18 16:34:14, Sakari Ailus wrote:
> > %pS and %ps are now the preferred conversion specifiers to print function
> > names. The functionality is equivalent; remove the old, deprecated
This micro series fixes annoying warn described in patches
while samples/bpf build. Second patch fixes new warn that
comes after fixing warn of first patch, that was masked.
Ivan Khoronzhuk (2):
selftests/bpf: add static to enable_all_controllers()
selftests/bpf: correct path to include msg +
The "path" buf is supposed to contain path + printf msg up to 24 bytes.
It will be cut anyway, but compiler generates truncation warns like:
"
samples/bpf/../../tools/testing/selftests/bpf/cgroup_helpers.c: In
function ‘setup_cgroup_environment’:
Jacek
On 10/1/19 4:06 PM, Jacek Anaszewski wrote:
Dan,
Thank you for the patch. One funny omission caught my
eye here and in led-class.c when making visual comparison.
Please refer below.
On 10/1/19 8:04 PM, Dan Murphy wrote:
Add the missing device managed API for registration and
Add static to enable_all_controllers() to get rid from annoying warn:
samples/bpf/../../tools/testing/selftests/bpf/cgroup_helpers.c:44:5:
warning: no previous prototype for ‘enable_all_controllers’
[-Wmissing-prototypes]
int enable_all_controllers(char *cgroup_path)
while samples/bpf build.
Code in the amdgpu driver triggers a bug when using clang to build
an arm64 kernel:
/tmp/sdma_v4_0-f95fd3.s: Assembler messages:
/tmp/sdma_v4_0-f95fd3.s:44: Error: selected processor does not support `bfc
w0,#1,#5'
I expect this to be fixed in llvm soon, but we can also work around
it by
On Tue, Sep 24, 2019 at 12:45:49PM +0200, Petr Mladek wrote:
> On Wed 2019-09-18 16:34:15, Sakari Ailus wrote:
> > Add a note warning of re-use of obsolete %pf or %pF extensions.
> >
> > Signed-off-by: Sakari Ailus
> > Cc: Steven Rostedt
> > ---
> > lib/vsprintf.c | 2 ++
> > 1 file changed, 2
On Tue, Oct 01, 2019 at 03:28:01PM -0700, H. Peter Anvin wrote:
> On 2019-10-01 04:41, Daniel Kiper wrote:
> >
> > OK, so, this is more or less what I had in my v3 patch before sending
> > this email. So, it looks that I am on good track. Great! Though I am not
> > sure that we should have magic
When CONFIG_PERF_EVENTS is disabled, we cannot compile the pmu
portion of the amdgpu driver:
drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c:48:38: error: no member named 'hw' in
'struct perf_event'
struct hw_perf_event *hwc = >hw;
~ ^
On Tue, Oct 01, 2019 at 06:15:02PM +0200, Ahmed S. Darwish wrote:
>
> Using the "ent" tool, [2] also used to test randomness in the Stephen
> Müller LRNG paper, on a 50-byte file, produced the following
> results:
The "ent" tool is really, really useless. If you take any CRNG, even
On Wed, Oct 2, 2019 at 11:57 AM Arnd Bergmann wrote:
> asm/io.h may not be included implicitly, causing a rare
> randconfig build error:
>
> drivers/input/misc/ixp4xx-beeper.c:48:3: error: implicit declaration of
> function '__raw_writel' [-Werror,-Wimplicit-function-declaration]
>
Jacek
On 10/1/19 3:57 PM, Jacek Anaszewski wrote:
Dan,
Thank you for the patch.
Could we have similar patch for leds.h when we are at it,
if you wouldn't mind?
Sure do you want it in this patch or a separate patch?
Dan
From: Colin Ian King
Shifting the u32 integer result of (pci_dword & SNR_IMC_MMIO_BASE_MASK)
will end up with an overflow when pci_dword greater than 0x1ff. Fix this
by casting pci_dword to a resource_size_t before masking and shifting it.
Addresses-Coverity: ("Unintentional integer overflow")
On Wed, Oct 02, 2019 at 11:23:06AM +1000, Daniel Axtens wrote:
> Hi,
>
> >>/*
> >> * Find a place in the tree where VA potentially will be
> >> * inserted, unless it is merged with its sibling/siblings.
> >> @@ -741,6 +752,10 @@ merge_or_add_vmap_area(struct vmap_area *va,
> >>
As nice as it would be to update firmware faster, that patch broke
at least two different boards, an OMAP4+WL1285 based Motorola Droid
4, as reported by Sebasian Reichel and the Logic PD i.MX6Q +
WL1837MOD.
This reverts commit a2e02f38eff84f199c8e32359eb213f81f270047.
Signed-off-by: Adam Ford
Currently, in arm_dt_init_cpu_maps(), the hwid of the boot CPU is read
from MPIDR on SMP devices and set to 0 for non SMP. This value is then
matched with the DT cpu nodes' reg property in order to find the boot
CPU in DT.
On MP devices build without SMP the cpu DT node contains the expected
On Tue, Oct 01, 2019 at 04:47:17PM +0300, Andy Shevchenko wrote:
> Use %ptT instead of open coded variant to print content of
> time64_t type in human readable format.
>
> Cc: Thierry Reding
> Cc: Jonathan Hunter
> Signed-off-by: Andy Shevchenko
> ---
> drivers/usb/host/xhci-tegra.c | 6
On Tue, Oct 01, 2019 at 09:02:22PM +0200, Arnd Bergmann wrote:
> On Tue, Oct 1, 2019 at 7:55 PM Mark Brown wrote:
> > This doesn't apply against current code, please check and resend.
> I looked at "git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
> for-next"
> as well as the
ng, and
next-20191001?
> url:
> https://github.com/0day-ci/linux/commits/Geert-Uytterhoeven/serial-sh-sci-Use-platform_get_irq_optional-for-optional-interrupts/20191002-171547
Oh, this is still the old tty/tty-testing before it was rebased to v5.4-rc1,
i.e. still based on v5.3-rc4. That
Add process for the situation that more than one irq is coming to
a single chip at the same time. The original code will only respond
to the lowest setted bit in JZ_REG_INTC_PENDING, and then exit the
interrupt dispatch function. After exiting the interrupt dispatch
function, since the second
Way back in 2017, fuzzing the 4.14-rc2 USB stack with syzkaller kicked
up the following WARNING from the UVC chain scanning code:
| list_add double add: new=880069084010, prev=880069084010,
| next=880067d22298.
| [ cut here ]
| WARNING: CPU: 1 PID: 1846
From: Paul Cercueil
Get the virq number from the IRQ domain instead of calculating it from
the hardcoded irq base.
Signed-off-by: Paul Cercueil
---
drivers/irqchip/irq-ingenic.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-ingenic.c
From: Paul Cercueil
By creating the generic chips from the IRQ domain, we don't rely on the
JZ4740_IRQ_BASE macro. It also makes the code a bit cleaner.
Signed-off-by: Paul Cercueil
---
drivers/irqchip/irq-ingenic.c | 30 +-
1 file changed, 17 insertions(+), 13
From: Paul Cercueil
If we cannot create the IRQ domain, the driver should fail to probe
instead of succeeding with just a warning message.
Signed-off-by: Paul Cercueil
---
drivers/irqchip/irq-ingenic.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git
AXP813 PMIC has two Vbus maximum value settings -- one is the default
value, which is currently the only supported one; the other is the
really applied value, which is set according to the default value if the
BC detection module detected a charging port, or 500mA if no charging
port is detected.
From: Paul Cercueil
The same behaviour can be obtained by using the IRQCHIP_MASK_ON_SUSPEND
flag on the IRQ chip.
Signed-off-by: Paul Cercueil
---
drivers/irqchip/irq-ingenic.c | 24 +---
include/linux/irqchip/ingenic.h | 14 --
2 files changed, 1
The AXP813 PMIC has support for detection of USB Battery Charging
specification, and it will limit the current to 500mA by default when
the detection is not enabled or the detection result is SDP.
Enable the BC detection to allow correctly selection of the current.
Signed-off-by: Icenowy Zheng
Rebase on top of Paul Cercueil's patches and drop unneeded changes as
Paul Cercueil's advice.
Unlike previous AXP PMICs, the AXP813 PMIC (and AXP803) supports port
detection defined in USB Battery Charging Specification 1.2, and sets
the real Vbus current based on a pre-defined value (which is the
original Vbus current limitation field) and the port status. However,
the detection needs
This is a revert of commit
a4244454df129 ("percpu-refcount: use RCU-sched insted of normal RCU")
which claims the only reason for using RCU-sched is
"rcu_read_[un]lock() … are slightly more expensive than
preempt_disable/enable()"
and
"As the RCU critical sections are extremely short,
From: Colin Ian King
The expression !(hw_cap & XGMAC_HWFEAT_RAVSEL) >> 10 is always zero, so
the masking operation is incorrect. Fix this by adding the missing
parentheses to correctly bind the negate operator on the entire expression.
Addresses-Coverity: ("Operands don't affect result")
Fixes:
On 02.10.2019 13:23, Alexandre Belloni wrote:
> Hi,
>
> On 02/10/2019 07:35:26+, eugen.hris...@microchip.com wrote:
>> +static void wdt_write(struct sam9x60_wdt *wdt, u32 field, u32 val)
>> +{
>> +/*
>> + * WDT_CR and WDT_MR must not be modified within three slow clock
>> + *
Follow common practice and retire printk(KERN_ERR ...) in favor of
dev_err().
Cc: Alan Stern
Cc: Greg Kroah-Hartman
Cc: usb-stor...@lists.one-eyed-alien.net
Signed-off-by: Matthias Maennich
---
drivers/usb/storage/scsiglue.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
On Wed, Oct 2, 2019 at 8:16 AM Nick Hu wrote:
>
> This patch ports the feature Kernel Address SANitizer (KASAN).
Hi Nick,
Please also update KASAN documentation to mention that riscv is supported.
Thanks!
>
> Note: The start address of shadow memory is at the beginning of kernel
> space,
On 02/10/2019 09:30, Vincent Guittot wrote:
>> Isn't that one somewhat risky?
>>
>> Say both groups are classified group_has_spare and we do prefer_sibling.
>> We'd select busiest as the one with the maximum number of busy CPUs, but it
>> could be so that busiest.sum_h_nr_running <
On Wed, Oct 2, 2019 at 5:25 PM Russell King - ARM Linux admin
wrote:
> Masahiro Yamada, please send this to the patch system, thanks.
Done. (8908/1)
Thanks.
--
Best Regards
Masahiro Yamada
As has been seen recently, binding the buffer allocation and tpm_buf
together is sometimes far from optimal. The buffer might come from the
caller namely when tpm_send() is used by another subsystem. In addition we
can stability in call sites w/o rollback (e.g. power events)>
Take allocation out
On 10/2/19 3:13 AM, David Hildenbrand wrote:
> On 02.10.19 02:55, Alexander Duyck wrote:
>> On Tue, Oct 1, 2019 at 12:16 PM Nitesh Narayan Lal wrote:
>>>
>>> On 10/1/19 12:21 PM, Alexander Duyck wrote:
On Tue, 2019-10-01 at 17:35 +0200, David Hildenbrand wrote:
> On 01.10.19 17:29,
As has been seen recently, binding the buffer allocation and tpm_buf
together is sometimes far from optimal. The buffer might come from the
caller namely when tpm_send() is used by another subsystem. In addition we
can stability in call sites w/o rollback (e.g. power events)>
Take allocation out
Hi Shuah,
On Tue, Oct 01, 2019 at 08:41:43PM +,
patchwork-bot+linux-kselft...@kernel.org wrote:
> Hello:
>
> This series was applied to shuah/linux-kselftest.git (refs/heads/fixes).
>
> On Tue, 17 Sep 2019 20:40:22 +0200 you wrote:
> > From: "George G. Davis"
> >
> > The newly added
On Wed, Oct 02, 2019 at 11:08:44AM +0100, Colin King wrote:
> From: Colin Ian King
>
> Variable pval is being assigned a value that is never read. The
> assignment is redundant and hence can be removed.
>
> Addresses-Coverity: ("Unused value")
> Signed-off-by: Colin Ian King
> ---
>
Hi Manivannan,
On Wed, Oct 02, 2019 at 12:12:00AM +0530, Manivannan Sadhasivam wrote:
> Hi Sakari,
>
> On Mon, Sep 23, 2019 at 12:22:09PM +0300, Sakari Ailus wrote:
> > Hi Manivannan,
> >
> > On Fri, Aug 30, 2019 at 02:49:42PM +0530, Manivannan Sadhasivam wrote:
> > > Add driver for Sony IMX290
On 10/1/19 8:55 PM, Alexander Duyck wrote:
> On Tue, Oct 1, 2019 at 12:16 PM Nitesh Narayan Lal wrote:
>>
>> On 10/1/19 12:21 PM, Alexander Duyck wrote:
>>> On Tue, 2019-10-01 at 17:35 +0200, David Hildenbrand wrote:
On 01.10.19 17:29, Alexander Duyck wrote:
> This series provides an
On Tue 01-10-19 23:54:14, Vlastimil Babka wrote:
> On 10/1/19 10:31 PM, David Rientjes wrote:
[...]
> > If
> > hugetlb wants to stress this to the fullest extent possible, it already
> > appropriately uses __GFP_RETRY_MAYFAIL.
>
> Which doesn't work anymore right now, and should again after
On 01/10/2019 13:42:24-0700, Dmitry Torokhov wrote:
> On Tue, Oct 1, 2019 at 12:53 PM Alexandre Belloni
> wrote:
> >
> > Hi Nick,
> >
> > On 25/09/2019 14:32:09-0600, Nick Crews wrote:
> > > If the RTC HW returns an invalid time, the rtc_year_days()
> > > call would crash. This patch adds error
KernelCI reports that bcm2835_defconfig is no longer booting since
commit ac7c3e4ff401 ("compiler: enable CONFIG_OPTIMIZE_INLINING
forcibly") (https://lkml.org/lkml/2019/9/26/825).
I also received a regression report from Nicolas Saenz Julienne
(https://lkml.org/lkml/2019/9/27/263).
This problem
lators the
polarity of the enable GPIO is not specified in the GPIO specifier.
Instead you're supposed to use the boolean enable-active-high property
to specify if the enable GPIO is active-high. By default the enable GPIO
is considered to be active-low. The GPIO specifier ne
On Tue, 2019-10-01 at 16:35 +0200, Thierry Reding wrote:
> On Wed, Aug 14, 2019 at 10:53:38AM +, Philippe Schenker wrote:
> > Add the stmpe-adc DT node as found on Toradex T30 modules
> >
> > Signed-off-by: Philippe Schenker
> >
> > ---
> >
> > arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi |
Hi,
On 02/10/2019 07:35:26+, eugen.hris...@microchip.com wrote:
> +static void wdt_write(struct sam9x60_wdt *wdt, u32 field, u32 val)
> +{
> + /*
> + * WDT_CR and WDT_MR must not be modified within three slow clock
> + * periods following a restart of the watchdog performed by a
Now that there's Hyper-V IOMMU driver, Linux can switch to x2apic mode
when supported by the vcpus.
However, the apic access functions for Hyper-V enlightened apic assume
xapic mode only.
As a result, Linux fails to bring up secondary cpus when run as a guest
in QEMU/KVM with both hv_apic and
On Wed, Oct 02, 2019 at 11:08:44AM +0100, Colin King wrote:
> From: Colin Ian King
>
> Variable pval is being assigned a value that is never read. The
> assignment is redundant and hence can be removed.
>
> Addresses-Coverity: ("Unused value")
> Signed-off-by: Colin Ian King
> ---
>
From: Colin Ian King
The variable ret is being assigned a value that is never read and is
being re-assigned a little later on. The assignment is redundant and hence
can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King
---
On Wed, Oct 02, 2019 at 04:00:50PM +0800, JC Kuo wrote:
> Adds the XUSB pad and XUSB controllers on Tegra194.
>
> Signed-off-by: JC Kuo
> ---
> arch/arm64/boot/dts/nvidia/tegra194.dtsi | 130 +++
> 1 file changed, 130 insertions(+)
>
> diff --git
On Wed, Oct 02, 2019 at 04:00:50PM +0800, JC Kuo wrote:
> Adds the XUSB pad and XUSB controllers on Tegra194.
>
> Signed-off-by: JC Kuo
> ---
> arch/arm64/boot/dts/nvidia/tegra194.dtsi | 130 +++
> 1 file changed, 130 insertions(+)
>
> diff --git
From: Colin Ian King
Variable pval is being assigned a value that is never read. The
assignment is redundant and hence can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King
---
drivers/pwm/pwm-sun4i.c | 1 -
1 file changed, 1 deletion(-)
diff --git
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* This automated bisection report was sent to you on the basis *
* that you may be involved with the breaking commit it has *
* found. No manual investigation has been done to verify it, *
* and the root cause of the
On Wed, Oct 02, 2019 at 04:00:48PM +0800, JC Kuo wrote:
> Add support for the XUSB pad controller found on Tegra194 SoCs. It is
> mostly similar to the same IP found on Tegra186, but the number of
> pads exposed differs, as do the programming sequences. Because most of
> the Tegra194 XUSB PADCTL
asm/io.h may not be included implicitly, causing a rare
randconfig build error:
drivers/input/misc/ixp4xx-beeper.c:48:3: error: implicit declaration of
function '__raw_writel' [-Werror,-Wimplicit-function-declaration]
__raw_writel((count & ~IXP4XX_OST_RELOAD_MASK) |
On 02/10/2019 07:35:23+, eugen.hris...@microchip.com wrote:
> From: Eugen Hristev
>
> Add bindings for Microchip SAM9X60 Watchdog Timer
>
> It has the same bindings as
> Documentation/devicetree/bindings/watchdog/atmel-sama5d4-wdt.txt
> except the compatible.
>
Maybe it can then use the
cd28d1d6e52e: ("net: phy: at803x: Disable phy delay for RGMII mode") broke
the ethernet networking on the beaglebone enhanced.
The board relied on the bug in the at803x driver to always enable the rx
delay. So change the phy-mode to rgmii-id so it is enabled again.
Signed-off-by: Jeroen Hofstee
the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url:
https://github.com/0day-ci/linux/commits/Geert-Uytterhoeven/serial-sh-sci-Use-platform_get_irq_optional-for-optional-interrupts/20191002-171547
base: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh
On Wed, Oct 02, 2019 at 04:00:49PM +0800, JC Kuo wrote:
> Extend the bindings to cover the set of features found in Tegra194.
> Note that, technically, there are four more supplies connected to the
> XUSB pad controller (DVDD_PEX, DVDD_PEX_PLL, HVDD_PEX and HVDD_PEX_PLL)
> , but the power
On Wed, Oct 02, 2019 at 04:00:47PM +0800, JC Kuo wrote:
> This commit adds Tegra194 XUSB host mode controller support. This is
> very similar to the existing Tegra124/Tegra210/Tegra186 XHCI, except
> 1. the number of ports and PHYs differs
> 2. the IPFS wrapper being removed
> 3. mailbox
On Wed, Oct 02, 2019 at 04:00:46PM +0800, JC Kuo wrote:
> Tegra194 XUSB host controller has rearranged mailbox registers. This
> commit makes mailbox registers address a part of "soc" data so that
> xhci-tegra driver can be used for Tegra194.
>
> Signed-off-by: JC Kuo
> ---
>
On Mon, Sep 30, 2019 at 09:00:06AM -0500, Rob Herring wrote:
> On Sun, Sep 08, 2019 at 05:28:12PM +0200, Krzysztof Kozlowski wrote:
> > Convert Generic Power Domain bindings to DT schema format using
> > json-schema. The consumer bindings are split to separate file.
> >
> > Signed-off-by:
On 9/30/2019 5:50 PM, Borislav Petkov wrote:
On Mon, Sep 23, 2019 at 08:17:40PM +0100, Hanna Hawa wrote:
+void edac_device_handle_ce(struct edac_device_ctl_info *edac_dev,
+ int inst_nr, int block_nr, const char *msg)
+{
+ __edac_device_handle_ce(edac_dev, 1,
On Wed, Oct 02, 2019 at 11:19:50AM +0200, Niklas Cassel wrote:
> On Mon, Sep 30, 2019 at 04:20:15PM -0600, Jeffrey Hugo wrote:
> > Amit, the merged version of the below change causes a boot failure
> > (nasty hang, sometimes with RCU stalls) on the msm8998 laptops. Oddly
> > enough, it seems to
On 02/10/2019 10:23, Vincent Guittot wrote:
> On Tue, 1 Oct 2019 at 18:53, Dietmar Eggemann
> wrote:
>>
>> On 01/10/2019 10:14, Vincent Guittot wrote:
>>> On Mon, 30 Sep 2019 at 18:24, Dietmar Eggemann
>>> wrote:
Hi Vincent,
On 19/09/2019 09:33, Vincent Guittot wrote:
>>
>
On 02/10/2019 08:44, Vincent Guittot wrote:
> On Tue, 1 Oct 2019 at 18:53, Dietmar Eggemann
> wrote:
>>
>> On 01/10/2019 10:14, Vincent Guittot wrote:
>>> On Mon, 30 Sep 2019 at 18:24, Dietmar Eggemann
>>> wrote:
Hi Vincent,
On 19/09/2019 09:33, Vincent Guittot wrote:
>>
>>
On 9/26/19 10:16 PM, Linus Torvalds wrote:
On Thu, Sep 26, 2019 at 1:09 PM Thomas Hellström (VMware)
wrote:
That said, if people are OK with me modifying the assert in
pud_trans_huge_lock() and make __walk_page_range non-static, it should
probably be possible to make it work, yes.
I don't
On Tue, 2019-10-01 at 13:56 +, René van Dorst wrote:
> Hi MarkLee,
>
> Quoting MarkLee :
>
> > * Removes mediatek,physpeed property from dtsi that is useless in PHYLINK
> > * Set gmac0 to fixed-link sgmii 2.5Gbit mode
> > * Set gmac1 to gmii mode that connect to a internal gphy
> >
> >
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