The busy loop in rpmh_rsc_send_data() is written with the assumption
that the udelay will be preempted by the tcs_tx_done() irq handler when
the TCS slots are all full. This doesn't hold true when the calling
thread is an irqthread and the tcs_tx_done() irq is also an irqthread.
That's because
Hi Jiri, Adrian,
On 7/22/2020 7:08 PM, Jiri Olsa wrote:
On Wed, Jul 22, 2020 at 01:00:03PM +0800, Jin, Yao wrote:
SNIP
If we use -IXMM0, the attr>sample_regs_intr will be set with
PERF_REG_EXTENDED_MASK bit.
It doesn't make sense to set attr->sample_regs_intr for a
software dummy event.
On Wed, Jul 22, 2020 at 10:56:09PM +0300, Evgeny Novikov wrote:
> Hi Alan,
>
> I have neither an appropriate hardware nor an experience to deal with
> issues that you mentioned. Our framework does not allow to detect them
> as well at the moment. At last, it seems that rather many drivers can
On Wed, 2020-07-22 at 22:56 +0300, Evgeny Novikov wrote:
> Hi Alan,
>
> I have neither an appropriate hardware nor an experience to deal with
> issues that you mentioned. Our framework does not allow to detect
> them as well at the moment. At last, it seems that rather many
> drivers can suffer
Modern device tree bindings are supposed to be created as YAML-files
in accordance with dt-schema. This commit replaces the Synopsis
Designware DMA controller legacy bare text bindings with YAML file.
The only required prorties are "compatible", "reg", "#dma-cells" and
"interrupts", which will be
Some hardware aside from default 0/1 may have greater minimum burst
transactions length constraints. Here we introduce the DMA device
and slave capability, which if required can be initialized by the DMA
engine driver with the device-specific value.
Signed-off-by: Serge Semin
Reviewed-by: Andy
Maximum block size DW DMAC configuration corresponds to the max segment
size DMA parameter in the DMA core subsystem notation. Lets set it with a
value specific to the probed DW DMA controller. It shall help the DMA
clients to create size-optimized SG-list items for the controller. This in
turn
In the previous patchset I've written the next message:
> Folks, note I've removed the next patches from the series:
> [PATCH v7 04/11] dmaengine: Introduce max SG list entries capability
> [PATCH v7 11/11] dmaengine: dw: Initialize max_sg_nents capability
> It turns out the problem with the
According to the DW APB DMAC data book the minimum burst transaction
length is 1 and it's true for any version of the controller since
isn't parametrised in the coreAssembler so can't be changed at the
IP-core synthesis stage. The maximum burst transaction can vary from
channel to channel and from
Multi-block support provides a way to map the kernel-specific SG-table so
the DW DMA device would handle it as a whole instead of handling the
SG-list items or so called LLP block items one by one. So if true LLP
list isn't supported by the DW DMA engine, then soft-LLP mode will be
utilized to
IP core of the DW DMA controller may be synthesized with different
max burst length of the transfers per each channel. According to Synopsis
having the fixed maximum burst transactions length may provide some
performance gain. At the same time setting up the source and destination
multi size
Some devices may lack the support of the hardware accelerated SG list
entries automatic walking through and execution. In this case a burden of
the SG list traversal and DMA engine re-initialization lies on the
DMA engine driver (normally implemented by using a DMA transfer completion
IRQ to
Full multi-block transfers functionality is enabled in DW DMA
controller only if CHx_MULTI_BLK_EN is set. But LLP-based transfers
can be executed only if hardcode channel x LLP register feature isn't
enabled, which can be switched on at the IP core synthesis for
optimization. If it's enabled then
There are DMA devices (like ours version of Synopsys DW DMAC) which have
DMA capabilities non-uniformly redistributed between the device channels.
In order to provide a way of exposing the channel-specific parameters to
the DMA engine consumers, we introduce a new DMA-device callback. In case
if
From: Sriram Krishnan
Date: Wed, 22 Jul 2020 21:08:44 +0530
> Vlan tagged packets are getting dropped when used with DPDK that uses
> the AF_PACKET interface on a hyperV guest.
>
> The packet layer uses the tpacket interface to communicate the vlans
> information to the upper layers. On Rx
Ray Jui wrote:
>
> On 7/22/2020 3:41 AM, Wolfram Sang wrote:
> >
> >>> + synchronize_irq(iproc_i2c->irq);
> >>
> >> If one takes a look at the I2C slave ISR routine, there are places where
> >> IRQ can be re-enabled in the ISR itself. What happens after we mask all
> >> slave interrupt and when
This array property is used to indicate the maximum burst transaction
length supported by each DMA channel.
Signed-off-by: Serge Semin
Reviewed-by: Rob Herring
Acked-by: Viresh Kumar
---
Changelog v2:
- Rearrange SoBs.
- Move $ref to the root level of the properties. So do with the
From: Peilin Ye
Date: Wed, 22 Jul 2020 11:19:01 -0400
> Checks on `addr_len` and `fsa->fsa_ax25.sax25_ndigis` are insufficient.
> ax25_connect() can go out of bounds when `fsa->fsa_ax25.sax25_ndigis`
> equals to 7 or 8. Fix it.
>
> This issue has been reported as a KMSAN uninit-value bug,
From: Colin King
Date: Wed, 22 Jul 2020 16:12:21 +0100
> From: Colin Ian King
>
> The variable current_head_index is being initialized with a value that
> is never read and it is being updated later with a new value. Replace
> the initialization of -1 with the latter assignment.
>
>
On Wed, Jul 22, 2020 at 5:50 PM Brian Norris wrote:
>
> On Wed, Jul 22, 2020 at 5:43 PM Brian Norris wrote:
> > unless I got
> > refactor cros_ec_get_host_event_wake_mask() to use
> > cros_ec_cmd_xfer_status() instead of send_command(). I'm actually not
> > sure why we don't do that, now that I
Quoting Heiko Stuebner (2020-07-22 11:26:50)
> Hi Elaine,
>
> Am Mittwoch, 22. Juli 2020, 04:32:30 CEST schrieb Elaine Zhang:
> > Export __clk_lookup() to support user built as module.
> >
> > ERROR:
> > drivers/clk/rockchip/clk.ko: In function
> > `rockchip_clk_protect_critical':
> >
On Wed, Jul 22, 2020 at 5:43 PM Brian Norris wrote:
> unless I got
> refactor cros_ec_get_host_event_wake_mask() to use
> cros_ec_cmd_xfer_status() instead of send_command(). I'm actually not
> sure why we don't do that, now that I think about it...
Ah, that would appear to be recursion
Quoting Douglas Anderson (2020-07-22 15:00:21)
> When I have KASAN enabled on my kernel and I start stressing the
> touchscreen my system tends to hang. The touchscreen is one of the
> only things that does a lot of big i2c transfers and ends up hitting
> the DMA paths in the geni i2c driver. It
Quoting Douglas Anderson (2020-07-22 15:01:20)
> Writing the command is the final step in kicking off a transfer.
> Let's use writel() to ensure that any other memory accesses are done
> before the command kicks off. It's expected that this is mostly
> relevant if we're in DMA mode but since it
On Wed, Jul 22, 2020 at 11:40 AM Bjorn Helgaas wrote:
>
> [+cc Puranjay]
>
> On Tue, Jul 21, 2020 at 08:18:03PM -0600, Robert Hancock wrote:
> > Recently ASPM handling was changed to no longer disable ASPM on all
> > PCIe to PCI bridges. Unfortunately these ASMedia PCIe to PCI bridge
> > devices
The RXFLR is possible larger than rx_left in Rockchip SPI, fix it.
Fixes: 01b59ce5dac8 ("spi: rockchip: use irq rather than polling")
Signed-off-by: Jon Lin
Reviewed-by: Heiko Stuebner
Reviewed-by: Emil Renner Berthing
Tested-by: Emil Renner Berthing
---
drivers/spi/spi-rockchip.c | 2 +-
1
The FIFO depth of SPI V2 is 64 instead of 32, add support for it.
Signed-off-by: Jon Lin
Reviewed-by: Emil Renner Berthing
Tested-by: Emil Renner Berthing
---
drivers/spi/spi-rockchip.c | 25 ++---
1 file changed, 14 insertions(+), 11 deletions(-)
diff --git
On Wed, Jul 22, 2020 at 2:13 PM Guenter Roeck wrote:
> On Wed, Jul 22, 2020 at 1:50 PM Brian Norris wrote:
> > Other than perhaps taking a lesson not to propagate -ENOTSUPP, I don't
> > think this series should block on that, as this is a bugfix IMO.
>
> My patch will return -EOPNOTSUPP for
The burst length can be adjusted according to the transmission
length to improve the transmission rate
Signed-off-by: Jon Lin
Reviewed-by: Emil Renner Berthing
Tested-by: Emil Renner Berthing
---
drivers/spi/spi-rockchip.c | 19 +--
1 file changed, 17 insertions(+), 2
The pull request you sent on Wed, 22 Jul 2020 13:57:47 +0900:
> git://git.kernel.org/pub/scm/linux/kernel/git/linkinjeon/exfat.git
> tags/exfat-for-5.8-rc7
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/071fb1bcd727e306f3e5911e53e7222fc4efab35
Thank you!
--
The pull request you sent on Wed, 22 Jul 2020 15:57:27 +0200:
> git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
> tags/media/v5.8-3
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/d15be546031cf65a0fc34879beca02fd90fe7ac7
Thank you!
--
On 7/23/20 3:26 AM, Jacob Pan wrote:
DevTLB flush can be used for both DMA request with and without PASIDs.
The former uses PASID#0 (RID2PASID), latter uses non-zero PASID for SVA
usage.
This patch adds a check for PASID value such that devTLB flush with
PASID is used for SVA case. This is more
Really instead of twice checking the clk_round_rate() return value
we could do it once, and if it isn't error the clock rate can be changed.
By doing so we decrease a number of ret-value tests and remove a weird
goto-based construction implemented in the dw8250_set_termios() method.
The race condition may happen if the UART reference clock is shared with
some other device (on Baikal-T1 SoC it's another DW UART port). In this
case if that device changes the clock rate while serial console is using
it the DW 8250 UART port might not only end up with an invalid uartclk
value
Greg, Jiri, Andy. We've missed the last merge window. It would be pity to
miss the next one. Please review/merge in the series.
Regarding the patchset. It might be dangerous if an UART port reference
clock rate is suddenly changed. In particular the 8250 port drivers
(and AFAICS most of the tty
Some platforms can be designed in a way so the UART port reference clock
might be asynchronously changed at some point. In Baikal-T1 SoC this may
happen due to the reference clock being shared between two UART ports, on
the Allwinner SoC the reference clock is derived from the CPU clock, so
any
Indeed according to the clk API if clk_round_rate() has successfully
accepted a rate, then in order setup the clock with value returned by the
clk_round_rate() the clk_set_rate() method must be called with the
original rate value.
Suggested-by: Russell King
Signed-off-by: Serge Semin
---
On Wed, Jul 08, 2020 at 03:33:57PM -0400, Peter Xu wrote:
> Originally, we have three code paths that can dirty a page without
> vcpu context for X86:
>
> - init_rmode_identity_map
> - init_rmode_tss
> - kvmgt_rw_gpa
>
> init_rmode_identity_map and init_rmode_tss will be setup on
>
From: Wang Hai
Date: Wed, 22 Jul 2020 10:10:27 +0800
> Remove casting the values returned by memory allocation function.
>
> Coccinelle emits WARNING: casting value returned by memory allocation
> unction to (struct roce_destroy_qp_req_output_params *) is useless.
>
> This issue was detected
On Wed, Jul 08, 2020 at 03:33:56PM -0400, Peter Xu wrote:
> Cache the address space ID just like the slot ID. It will be used in
> order to fill in the dirty ring entries.
>
> Suggested-by: Paolo Bonzini
> Suggested-by: Sean Christopherson
> Signed-off-by: Peter Xu
> ---
Reviewed-by: Sean
Hi KP,
I love your patch! Perhaps something to improve:
[auto build test WARNING on bpf-next/master]
url:
https://github.com/0day-ci/linux/commits/KP-Singh/Generalizing-bpf_local_storage/20200723-011814
base: https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next.git master
config:
On Wed, Jul 22, 2020 at 4:42 PM Linus Torvalds
wrote:
>
> NOTE NOTE NOTE! This is both somewhat subtle code, and ENTIRELY
> UNTESTED.
It seems to boot.
It adds more lines than it removes, but a lot of it is comments, and
while it's somewhat subtle, I think it's actually conceptually simpler
From: Boqun Feng Sent: Monday, July 20, 2020 6:42 PM
>
> Hyper-V always use 4k page size (HV_HYP_PAGE_SIZE), so when
> communicating with Hyper-V, a guest should always use HV_HYP_PAGE_SIZE
> as the unit for page related data. For storvsc, the data is
> vmbus_packet_mpb_array. And since in
This adds the conversion of the test_sort.c to KUnit test.
Please apply this commit first (linux-kselftest/kunit-fixes):
3f37d14b8a3152441f36b6bc74000996679f0998 kunit: kunit_config: Fix parsing of
CONFIG options with space
Signed-off-by: Vitor Massaru Iha
---
lib/Kconfig.debug
On Thu, 23 Jul 2020 01:56:20 +0200
Peter Zijlstra wrote:
> Anyway, what do you prefer, I suppose I can make objtool whatever we
> need, that patch is trivial. Simply recording the sites and not
> rewriting them should be simple enough.
Either way. If objtool turns it into nops, just make it
On Wed, Jul 22, 2020 at 03:50:48PM -0600, Jerry Hoemann wrote:
> On Wed, Jul 22, 2020 at 10:21:23AM -0500, Bjorn Helgaas wrote:
> > On Wed, Jul 22, 2020 at 10:52:26PM +0800, Kairui Song wrote:
> > > I think I didn't make one thing clear, The PCI UR error never arrives
> > > in kernel, it's the
On Wed, Jul 22, 2020 at 03:09:43PM -0400, Steven Rostedt wrote:
> On Wed, 22 Jul 2020 20:41:37 +0200
> Peter Zijlstra wrote:
>
> > > That said, Andi Kleen added an option to gcc called -mnop-mcount which
> > > will have gcc do both create the mcount section and convert the calls
> > > into nops.
From: Boqun Feng Sent: Wednesday, July 22, 2020 4:43 PM
>
> On Wed, Jul 22, 2020 at 11:25:18PM +, Michael Kelley wrote:
> > From: Boqun Feng Sent: Monday, July 20, 2020 6:41 PM
> > >
> > > This patch introduces two types of GPADL: HV_GPADL_{BUFFER, RING}. The
> > > types of GPADL are purely
The R5F processors on K3 SoCs all have two TCMs (ATCM and BTCM) that
support 32-bit ECC. The TCMs are typically loaded with some boot-up
code to initialize the R5 MPUs to further execute code out of DDR.
The ECC for the TCMs is enabled by default on K3 SoCs due to internal
default tie-off values,
The TI K3 family of SoCs typically have one or more dual-core Arm Cortex
R5F processor clusters/subsystems (R5FSS). This R5F subsystem/cluster
can be configured at boot time to be either run in a LockStep mode or in
an Asymmetric Multi Processing (AMP) fashion in Split-mode. This subsystem
has 64
The K3 SoCs has various internal on-chip SRAM memories like the SRAM
within the MCU domain or the shared MSMC RAM within NavSS that can be
used for multiple purposes. One such purpose is to have the R5F cores
use a portion of such on-chip SRAM for fast-access data or to directly
execute code.
Add
Hi All,
The following is v3 of the TI K3 R5F remoteproc driver series supporting all
the R5F processor clusters/subsystems on TI AM65x and J721E SoCs. Please
see the v1 cover-letter [1] for the features supported on these R5F processors.
This series is almost ready and awaiting the conclusion on
The Texas Instruments K3 family of SoCs have one or more dual-core
Arm Cortex R5F processor subsystems/clusters (R5FSS). The clusters
can be split between multiple voltage domains as well. Add the device
tree bindings document for these R5F subsystem devices. These R5F
processors do not have an
> On Jul 20, 2020, at 2:08 AM, Kirill A. Shutemov wrote:
>
> On Sat, Jul 18, 2020 at 04:54:09PM +0800, Hillf Danton wrote:
>>
>> Wed, 08 Jul 2020 23:43:19 -0700
>>> syzbot found the following crash on:
>>>
>>> HEAD commit:e44f65fd xen-netfront: remove redundant assignment to vari..
>>>
Rich,
On 7/22/20 3:52 PM, Rich Felker wrote:
> On Tue, Jul 21, 2020 at 07:38:40PM -0700, Guenter Roeck wrote:
>> On Thu, Dec 12, 2019 at 11:38:43AM +0900, Kuninori Morimoto wrote:
>>> From: Kuninori Morimoto
>>>
>>> __delay() is used from kernel module.
>>> We need EXPORT_SYMBOL(), otherwise we
Booting Linux with a Conner CP3200 drive attached to the MESH SCSI bus
results in EH measures and a panic:
[ 25.499838] mesh: configured for synchronous 5 MB/s
[ 25.787154] mesh: performing initial bus reset...
[ 29.867115] scsi host0: MESH
[ 29.929527] mesh: target 0 synchronous at 3.6
Signed-off-by: Finn Thain
---
arch/m68k/kernel/head.S | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/m68k/kernel/head.S b/arch/m68k/kernel/head.S
index a54788458ca36..08eff92875144 100644
--- a/arch/m68k/kernel/head.S
+++ b/arch/m68k/kernel/head.S
@@
On Wed, 22 Jul 2020, Anchal Agarwal wrote:
> On Tue, Jul 21, 2020 at 05:18:34PM -0700, Stefano Stabellini wrote:
> > On Tue, 21 Jul 2020, Boris Ostrovsky wrote:
> > > >> +static int xen_setup_pm_notifier(void)
> > > >> +{
> > > >> + if (!xen_hvm_domain())
> > > >> +
On Tue, 2020-07-21 at 19:52 -0500, Brian King wrote:
> >
> > As of today, there seems to be nothing like that happening in the
> > driver I am testing.
> > I spoke to Brian King on slack, and he mentioned that at the point DDW
> > is created there should be no allocations in place.
>
> I think
From: Peter Oskolkov
As Paul Turner presented at LPC in 2013 ...
- pdf:
http://pdxplumbers.osuosl.org/2013/ocw//system/presentations/1653/original/LPC%20-%20User%20Threading.pdf
- video: https://www.youtube.com/watch?v=KXuZi9aeGTw
... Google has developed an M:N userspace threading subsystem
From: Peter Oskolkov
As described in the previous patch in this patchset
("futex: introduce FUTEX_SWAP operation"), it is often
beneficial to wake a task and run it on the same CPU
where the current going to sleep task it running.
Internally at Google, switchto_switch sycall not only
migrates
From: Peter Oskolkov
This is the final patch in FUTEX_SWAP patchset. It
adds a test/benchmark to validate behavior and
compare performance of a new FUTEX_SWAP futex operation.
Detailed API design and behavior considerations are provided
in the commit messages of the previous two patches.
From: Peter Oskolkov
As Paul Turner presented at LPC in 2013 ...
- pdf:
http://pdxplumbers.osuosl.org/2013/ocw//system/presentations/1653/original/LPC%20-%20User%20Threading.pdf
- video: https://www.youtube.com/watch?v=KXuZi9aeGTw
... Google has developed an M:N userspace threading subsystem
On Wed, Jul 22, 2020 at 11:25:18PM +, Michael Kelley wrote:
> From: Boqun Feng Sent: Monday, July 20, 2020 6:41 PM
> >
> > This patch introduces two types of GPADL: HV_GPADL_{BUFFER, RING}. The
> > types of GPADL are purely the concept in the guest, IOW the hypervisor
> > treat them as the
On Wed, Jul 22, 2020 at 3:10 PM Linus Torvalds
wrote:
>
> > + bool first_time = true;
> > bool thrashing = false;
> > bool delayacct = false;
> > unsigned long pflags;
> > @@ -1134,7 +1135,12 @@ static inline int wait_on_page_bit_commo
> >
On Tue, 21 Jul 2020, Florian Fainelli wrote:
> On 7/21/20 12:21 PM, Jakub Kicinski wrote:
> > On Tue, 21 Jul 2020 04:58:59 + Chi Song wrote:
> >> An imbalanced TX indirection table causes netvsc to have low
> >> performance. This table is created and managed during runtime. To help
> >>
On Wed, 2020-07-22 at 11:28 +1000, Alexey Kardashevskiy wrote:
>
> On 22/07/2020 08:13, Leonardo Bras wrote:
> > On Tue, 2020-07-21 at 14:59 +1000, Alexey Kardashevskiy wrote:
> > > On 16/07/2020 17:16, Leonardo Bras wrote:
> > > > Move the part of iommu_table_free() that does struct iommu_table
From: Boqun Feng Sent: Monday, July 20, 2020 6:42 PM
>
> When PAGE_SIZE > HV_HYP_PAGE_SIZE, we need the ringbuffer size to be at
> least 2 * PAGE_SIZE: one page for the header and at least one page of
> the data part (because of the alignment requirement for double mapping).
>
> So make sure
On Wed, Jul 22, 2020 at 01:51:53PM -0700, Paul E. McKenney wrote:
> And scftorture doesn't much like the full set of patches. Though this
> is early enough during boot that I am not sure that scftorture had much
> chance to do any real damage.
Thanks for taking them for a spin; I've only barely
Hi all,
After merging the arm-soc tree, today's linux-next build (arm
multi_v7_defconfig) produced these warnings:
arch/arm/boot/dts/mmp2.dtsi:472.23-480.6: Warning (spi_bus_bridge):
/soc/apb@d400/spi@d4037000: incorrect #address-cells for SPI bus
also defined at
From: Rajan Vaja
Initially all devices are in power up state. Firmware expect that
processor should call InitFinalize API once it have requested devices
which are required so that it can turn off all unused devices and
save power. From Linux, PM driver calls InitFinalize to inform the
firmware
On Thu, Jul 23, 2020 at 01:08:42AM +0200, Thomas Gleixner wrote:
> Dennis Zhou writes:
> > On Mon, Jul 20, 2020 at 01:49:14PM -0700, Nick Desaulniers wrote:
> >> Resend of Brian's v2 with Acks from Peter and Linus collected, as well
> >> as the final patch (mine) added. The commit of the final
Hi Mauro,
First bad commit (maybe != root cause):
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 8c26c87b05323a7ccdc632820b85253e0bf47fd9
commit: df823a8208c434eee6e4e9aa016c956d0968e2e2 media: cec: rename CEC
platform drivers config options
date: 3
From: Boqun Feng Sent: Monday, July 20, 2020 6:41 PM
>
> This patch introduces two types of GPADL: HV_GPADL_{BUFFER, RING}. The
> types of GPADL are purely the concept in the guest, IOW the hypervisor
> treat them as the same.
>
> The reason of introducing the types of GPADL is to support
Other architectures expect that syscall_set_return_value gets an already
negative value as error. That's also what kernel/seccomp.c provides.
Signed-off-by: Michael Karcher
---
arch/sh/include/asm/syscall_32.h | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git
Port sh to use the new SECCOMP_FILTER code.
Signed-off-by: Michael Karcher
---
arch/sh/Kconfig | 1 +
arch/sh/kernel/entry-common.S | 2 ++
arch/sh/kernel/ptrace_32.c| 5 +++--
tools/testing/selftests/seccomp/seccomp_bpf.c | 8
The slow path for traced system call entries accessed a wrong memory
location to get the number of the maximum allowed system call number.
Renumber the numbered "local" label for the correct location to avoid
collisions with actual local labels.
Signed-off-by: Michael Karcher
---
On 7/23/20 1:13 AM, Michael Karcher wrote:
> Other architectures expect that syscall_set_return_value gets an already
> negative value as error. That's also what kernel/seccomp.c provides.
>
> Signed-off-by: Michael Karcher
> ---
> arch/sh/include/asm/syscall_32.h | 5 +
> 1 file changed, 1
On Tue, Jul 21, 2020 at 03:22:18PM +, Wei Liu wrote:
> On Tue, Jul 21, 2020 at 09:41:25AM +0800, Boqun Feng wrote:
> > Since the hypervisor always uses 4K as its page size, the size of PFNs
> > used for gpadl should be HV_HYP_PAGE_SIZE rather than PAGE_SIZE, so
> > adjust this accordingly as
This avoids out-of-range jumps that get auto-replaced by the assembler
and prepares for the changes needed to implement SECCOMP_FILTER cleanly.
Signed-off-by: Michael Karcher
---
arch/sh/kernel/entry-common.S | 57 ++-
1 file changed, 29 insertions(+), 28
On 7/23/20 1:13 AM, Michael Karcher wrote:
> Port sh to use the new SECCOMP_FILTER code.
>
> Signed-off-by: Michael Karcher
> ---
> arch/sh/Kconfig | 1 +
> arch/sh/kernel/entry-common.S | 2 ++
> arch/sh/kernel/ptrace_32.c| 5
On 7/22/20 17:40, Winkler, Tomas wrote:
>>
>> Hi Tomas,
>>
>> Please, see my comments below...
>>
>> On 7/22/20 14:04, Winkler, Tomas wrote:
>>>
Hi all,
Friendly ping: who can take this? :)
Thanks
--
Gustavo
On 7/14/20 16:45, Gustavo A. R. Silva
On 7/23/20 1:13 AM, Michael Karcher wrote:
> The slow path for traced system call entries accessed a wrong memory
> location to get the number of the maximum allowed system call number.
> Renumber the numbered "local" label for the correct location to avoid
> collisions with actual local labels.
>
On 7/23/20 1:13 AM, Michael Karcher wrote:
> This avoids out-of-range jumps that get auto-replaced by the assembler
> and prepares for the changes needed to implement SECCOMP_FILTER cleanly.
>
> Signed-off-by: Michael Karcher
> ---
> arch/sh/kernel/entry-common.S | 57
On Wed, Jul 22, 2020 at 02:15:13AM +0200, Julia Suvorova wrote:
> Scanning for PCI devices at boot takes a long time for KVM guests. It
> can be reduced if KVM will handle all configuration space accesses for
> non-existent devices without going to userspace [1]. But for this to
> work, all
Hi Jagan,
Am Mittwoch, 22. Juli 2020, 21:09:46 CEST schrieb Jagan Teki:
> Add dt-bindings for ROCKPi 4B which is similar to 4A with
> additional AP6256 Wifi/BT, PoE.
>
> Signed-off-by: Jagan Teki
> ---
> Changes for v2:
> - new patch
>
> Documentation/devicetree/bindings/arm/rockchip.yaml | 6
This patch adds clang-tidy and the clang static-analyzer as make
targets. The goal of this patch is to make static analysis tools
usable and extendable by any developer or researcher who is familiar
with basic c++.
The current static analysis tools require intimate knowledge of the
internal
Dennis Zhou writes:
> On Mon, Jul 20, 2020 at 01:49:14PM -0700, Nick Desaulniers wrote:
>> Resend of Brian's v2 with Acks from Peter and Linus collected, as well
>> as the final patch (mine) added. The commit of the final patch discusses
>> some of the architectural differences between GCC and
Hi Christian,
On 2020-07-19 16:10, Christian Hewitt wrote:
> HardKernel ODROID-N2+ uses an Amlogic S922X rev. C chip capable of higher
> clock speeds than the original ODROID-N2. Hardkernel supports the big cpu
> cluster at 2.4GHz and the little cpu cluster at 2.0GHz. Opp points and
> regulator
Ricardo Neri writes:
> On Tue, Jul 07, 2020 at 09:36:15AM -0700, Andy Lutomirski wrote:
>> On Mon, Jul 6, 2020 at 7:21 PM Cathy Zhang wrote:
>> >
>> > This instruction gives software a way to force the processor to complete
>> > all modifications to flags, registers and memory from previous
On Wed, Jul 22, 2020 at 5:47 PM Rob Clark wrote:
>
> On Tue, Jul 21, 2020 at 10:30 PM Viresh Kumar wrote:
> >
> > On 21-07-20, 07:28, Rob Clark wrote:
> > > With your ack, I can add the patch the dev_pm_opp_set_bw patch to my
> > > tree and merge it via msm-next -> drm-next -> linus
> >
> > I
Hi Scott,
I'm hitting this issue and Rick just pointed my at your patch. Any
chance we could get it upstream?
Thanks,
Anton
> On PowerPC, memory_add_physaddr_to_nid() uses a linear search to find
> an LMB matching the given address. This scales very poorly when there
> are many LMBs. The poor
On Wed, Jul 22, 2020 at 03:36:38PM -0700, Florian Fainelli wrote:
> On 7/22/20 12:38 PM, Jonathan McDowell wrote:
> > On Tue, Jul 21, 2020 at 10:26:07AM -0700, Florian Fainelli wrote:
> >> On 7/21/20 10:16 AM, Jonathan McDowell wrote:
> >>> This adds full 802.1q VLAN support to the qca8k, allowing
> On Jul 22, 2020, at 1:05 AM, Joerg Roedel wrote:
>
> Hmm, I have a theory ...
>
> On Tue, Jul 21, 2020 at 09:01:44PM +, Mike Stunes wrote:
>> If I remove the call to probe_roms from setup_arch, or remove the calls to
>> romchecksum from probe_roms, this kernel boots normally.
>>
>>
On Tue, Jul 21, 2020 at 07:38:40PM -0700, Guenter Roeck wrote:
> On Thu, Dec 12, 2019 at 11:38:43AM +0900, Kuninori Morimoto wrote:
> > From: Kuninori Morimoto
> >
> > __delay() is used from kernel module.
> > We need EXPORT_SYMBOL(), otherwise we will get compile error.
> >
> > ERROR:
The following commit has been merged into the efi/urgent branch of tip:
Commit-ID: 3230d95cea0515a6acf3f5ff360663de4c40fd07
Gitweb:
https://git.kernel.org/tip/3230d95cea0515a6acf3f5ff360663de4c40fd07
Author:Atish Patra
AuthorDate:Mon, 06 Jul 2020 10:25:59 -07:00
The following commit has been merged into the efi/urgent branch of tip:
Commit-ID: 950accbabd4cfa83519fa920f99428bcc131c3c9
Gitweb:
https://git.kernel.org/tip/950accbabd4cfa83519fa920f99428bcc131c3c9
Author:Atish Patra
AuthorDate:Thu, 25 Jun 2020 16:45:06 -07:00
The following commit has been merged into the efi/urgent branch of tip:
Commit-ID: 59476f80d8781a84e25f0cbcf378ccab1ad7abf8
Gitweb:
https://git.kernel.org/tip/59476f80d8781a84e25f0cbcf378ccab1ad7abf8
Author:Arvind Sankar
AuthorDate:Thu, 18 Jun 2020 16:43:15 -04:00
The following commit has been merged into the efi/urgent branch of tip:
Commit-ID: c1aac64ddc01112e137121a43645b96c3633c41b
Gitweb:
https://git.kernel.org/tip/c1aac64ddc01112e137121a43645b96c3633c41b
Author:Masahiro Yamada
AuthorDate:Thu, 04 Jun 2020 11:20:30 +09:00
The following commit has been merged into the efi/urgent branch of tip:
Commit-ID: f88814cc2578c121e6edef686365036db72af0ed
Gitweb:
https://git.kernel.org/tip/f88814cc2578c121e6edef686365036db72af0ed
Author:Ard Biesheuvel
AuthorDate:Wed, 08 Jul 2020 13:01:57 +03:00
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