Pull code out to a function for re-use.
Signed-off-by: Alex Williamson
---
drivers/vfio/vfio_iommu_type1.c | 57 +++
1 file changed, 34 insertions(+), 23 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index 12d99
We'll need these to track vfio device mappings.
Signed-off-by: Alex Williamson
---
drivers/vfio/vfio_iommu_type1.c | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index f7d35a11
Trigger a release notifier call when open reference count is zero.
Signed-off-by: Alex Williamson
---
drivers/vfio/pci/vfio_pci.c |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/vfio/pci/vfio_pci.c b/drivers/vfio/pci/vfio_pci.c
index 585895970e9c..bee9318b46ed 100644
--- a/drivers
Add a new vfio_device_ops callback to allow the bus driver to
translate a vma mapping of a vfio device fd to a pfn. Plumb through
vfio-core. Implemented for vfio-pci.
Suggested-by: Jason Gunthorpe
Signed-off-by: Alex Williamson
---
drivers/vfio/pci/vfio_pci.c |1 +
drivers/vfio/vfio.c
Using a vfio device, a notifier block can be registered to receive
select device events. Notifiers can only be registered for contained
devices, ie. they are available through a user context. Registration
of a notifier increments the reference to that container context
therefore notifiers must mi
Creating an address space mapping onto our vfio pseudo fs for each
device file descriptor means that we can universally retrieve a
vfio_device from a vma mapping this file.
Suggested-by: Jason Gunthorpe
Signed-off-by: Alex Williamson
---
drivers/vfio/vfio.c | 19 +--
include/
With the vfio device fd tied to the address space of the pseudo fs
inode, we can use the mm to track all vmas that might be mmap'ing
device BARs, which removes our vma_list and all the complicated
lock ordering necessary to manually zap each related vma.
Note that we can no longer store the pfn in
The primary goal of this series is to better manage device memory
mappings, both with a much simplified scheme to zap CPU mappings of
device memory using unmap_mapping_range() and also to restrict IOMMU
mappings of PFNMAPs to vfio device memory and drop those mappings on
device release. This serie
Allow bus drivers to use vfio pseudo fs mapping to zap all mmaps
across a range of their device files.
Signed-off-by: Alex Williamson
---
drivers/vfio/vfio.c |7 +++
include/linux/vfio.h |2 ++
2 files changed, 9 insertions(+)
diff --git a/drivers/vfio/vfio.c b/drivers/vfio/vfio.c
Rather than an errno, return a pointer to the opaque vfio_device
to allow the bus driver to call into vfio-core without additional
lookups and references. Note that bus drivers are still required
to use vfio_del_group_dev() to teardown the vfio_device.
Signed-off-by: Alex Williamson
---
Documen
By linking all the device fds we provide to userspace to an
address space through a new pseudo fs, we can use tools like
unmap_mapping_range() to zap all vmas associated with a device.
Suggested-by: Jason Gunthorpe
Signed-off-by: Alex Williamson
---
drivers/vfio/vfio.c | 54 ++
On 3/8/2021 1:30 PM, Borislav Petkov wrote:
On Fri, Feb 26, 2021 at 09:26:34AM -0800, Yu-cheng Yu wrote:
SIGSEGV fills si_addr only for memory access faults. Add a note to clarify.
Signed-off-by: Yu-cheng Yu
Cc: Alejandro Colomar
Cc: Michael Kerrisk
Cc: Andy Lutomirski
Cc: Borislav Petkov
Applied. Thanks!
Alex
On Sat, Mar 6, 2021 at 6:05 AM wrote:
>
> From: Zhang Yunkai
>
> 'dce110_resource.h' included in 'dcn21_resource.c' is duplicated.
> 'hw_gpio.h' included in 'hw_factory_dce110.c' is duplicated.
>
> Signed-off-by: Zhang Yunkai
> ---
> drivers/gpu/drm/amd/display/dc/dcn21
Applied. Thanks!
Alex
On Sat, Mar 6, 2021 at 5:48 AM wrote:
>
> From: Zhang Yunkai
>
> 'drm/drm_hdcp.h' included in 'amdgpu_dm.c' is duplicated.
> It is also included in the 79th line.
>
> Signed-off-by: Zhang Yunkai
> ---
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 -
> 1 file c
On Mon, 2021-03-08 at 09:18 -0800, Sean Christopherson wrote:
> On Mon, Mar 08, 2021, Maxim Levitsky wrote:
> > On Thu, 2021-03-04 at 18:16 -0800, Sean Christopherson wrote:
> > > Directly connect the 'npt' param to the 'npt_enabled' variable so that
> > > runtime adjustments to npt_enabled are ref
--
Hello Darling,
I am happy to have you here as a friend, i hope all is well with you,
and how are you enjoying your day over there in your country?
My name is Sergeant ,Shannon Mccraney. I’m 29 years an orphan my
parents died when I was five years old nobody to help me,I send you my
business
On 08.03.2021 22:37, Rafał Miłecki wrote:
On 08.03.2021 19:43, Rob Herring wrote:
On Tue, Mar 02, 2021 at 08:44:04AM +0100, Rafał Miłecki wrote:
From: Rafał Miłecki
NVRAM structure contains device data and can be accessed using MMIO.
Signed-off-by: Rafał Miłecki
---
.../bindings/firmware/
On Mon, Mar 08, 2021 at 10:46:56AM -0800, Sami Tolvanen wrote:
> While LTO with KASAN is normally not useful, hardware tag-based KASAN
> can be used also in production kernels with ARM64_MTE. Therefore, allow
> KASAN_HW_TAGS to be selected together with HAS_LTO_CLANG.
>
> Reported-by: Alistair Del
On Mon, Feb 15, 2021 at 10:26:34PM +0200, Topi Miettinen wrote:
> Memory mappings inside kernel allocated with vmalloc() are in
> predictable order and packed tightly toward the low addresses, except
> for per-cpu areas which start from top of the vmalloc area. With
> new kernel boot parameter 'ran
On Mon, Mar 08, 2021 at 09:02:29PM +0100, Rasmus Villemoes wrote:
> On 08/03/2021 18.21, Rob Herring wrote:
> > On Fri, Feb 26, 2021 at 03:14:10PM +0100, Rasmus Villemoes wrote:
> >> While a ripple counter can not usually be interfaced with (directly)
> >> from software, it may still be a crucial c
On 08.03.2021 19:43, Rob Herring wrote:
On Tue, Mar 02, 2021 at 08:44:04AM +0100, Rafał Miłecki wrote:
From: Rafał Miłecki
NVRAM structure contains device data and can be accessed using MMIO.
Signed-off-by: Rafał Miłecki
---
.../bindings/firmware/brcm,nvram.yaml | 41 ++
On Mon, Mar 08, 2021 at 03:11:41PM -0600, Brijesh Singh wrote:
>
> On 3/8/21 1:51 PM, Sean Christopherson wrote:
> > On Mon, Mar 08, 2021, Ashish Kalra wrote:
> >> On Fri, Feb 26, 2021 at 09:44:41AM -0800, Sean Christopherson wrote:
> >>> +Will and Quentin (arm64)
> >>>
> >>> Moving the non-KVM x8
On Fri, Feb 26, 2021 at 09:26:34AM -0800, Yu-cheng Yu wrote:
> SIGSEGV fills si_addr only for memory access faults. Add a note to clarify.
>
> Signed-off-by: Yu-cheng Yu
> Cc: Alejandro Colomar
> Cc: Michael Kerrisk
> Cc: Andy Lutomirski
> Cc: Borislav Petkov
> Cc: Dave Hansen
> Cc: Florian
Hi Minchan,
I love your patch! Perhaps something to improve:
[auto build test WARNING on hnaz-linux-mm/master]
url:
https://github.com/0day-ci/linux/commits/Minchan-Kim/mm-page_alloc-dump-migrate-failed-pages/20210309-042205
base: https://github.com/hnaz/linux-mm master
config: m68k-allmod
> +@pmaxif depends on patch@
> +identifier func;
> +expression x, y;
> +expression max_val;
> +binary operator cmp = {>=, >};
> +@@
> +
> +func(...)
> +{
> + <...
> +-if ((x) cmp (y)) {
> +-max_val = (x);
> +-} else {
> +-max_val = (y);
> +-}
> ++max_val
Add the version of the EC in the Tolino Shine 2 HD
to the supported versions. It seems not to have an RTC
and does not ack data written to it.
The vendor kernel happily ignores write errors, using
I2C via userspace i2c-set also shows the error.
So add a quirk to ignore that error.
PWM can be succe
On Mon, Mar 8, 2021 at 12:36 PM David Hildenbrand wrote:
>
>
> > Am 08.03.2021 um 21:18 schrieb Yang Shi :
> >
> > On Mon, Mar 8, 2021 at 11:30 AM David Hildenbrand wrote:
> >>
> >>> On 08.03.21 20:11, Yang Shi wrote:
> >>> On Mon, Mar 8, 2021 at 11:01 AM Zi Yan wrote:
>
> On 8 Mar 20
Add support for the TCU (Timer/Counter Unit) of the JZ4760 and JZ4760B
SoCs.
Signed-off-by: Paul Cercueil
---
Notes:
v2: No change
drivers/clocksource/ingenic-timer.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clocksource/ingenic-timer.c
b/drivers/clocksource/ingenic-ti
The OST in the JZ4760B SoC works exactly the same as in the JZ4770. But
since the JZ4760B is older, its Device Tree string does not fall back to
the JZ4770 one; so add support for the JZ4760B compatible string here.
Signed-off-by: Paul Cercueil
---
Notes:
v2: No change
drivers/clocksource/
Add compatible strings to support the system timer, clocksource, OST,
watchdog and PWM blocks of the JZ4760 and JZ4760B SoCs.
Newer SoCs which behave like the JZ4760 or JZ4760B now see their
compatible string require a fallback compatible string that corresponds
to one of these two SoCs.
Signed-o
defconfig
mips allyesconfig
mips allmodconfig
powerpc allyesconfig
powerpc allmodconfig
powerpc allnoconfig
x86_64 randconfig-a006-20210308
On 08/03/2021 20:55, Lukasz Luba wrote:
> Hi Daniel,
>
> On 3/8/21 7:31 PM, Daniel Lezcano wrote:
>>
>> On 01/03/2021 22:21, Daniel Lezcano wrote:
>>> In order to increase the self-encapsulation of the dtpm generic code,
>>> the following changes are adding a power update ops to the dtpm
>>> ops.
Le lun. 8 mars 2021 à 10:39, Rob Herring a écrit :
On Sun, 07 Mar 2021 17:15:51 +, Paul Cercueil wrote:
Add compatible strings to support the system timer, clocksource,
OST,
watchdog and PWM blocks of the JZ4760 and JZ4760B SoCs.
Newer SoCs which behave like the JZ4760 or JZ4760B no
On Fri, 05 Mar 2021 06:39:01 +0900, Hector Martin wrote:
> Apple SoCs run firmware that sets up a simplefb-compatible framebuffer
> for us. Add a compatible for it, and two missing supported formats.
>
> Signed-off-by: Hector Martin
> ---
> .../devicetree/bindings/display/simple-framebuffer.yaml
On Fri, 05 Mar 2021 06:38:58 +0900, Hector Martin wrote:
> Apple mobile devices originally used Samsung SoCs (starting with the
> S5L8900), and their current in-house SoCs continue to use compatible
> UART peripherals. We'll call this UART variant apple,s5l-uart.
>
> Signed-off-by: Hector Martin
On Fri, 05 Mar 2021 06:38:50 +0900, Hector Martin wrote:
> AIC is the Apple Interrupt Controller found on Apple ARM SoCs, such as
> the M1.
>
> Signed-off-by: Hector Martin
> Reviewed-by: Linus Walleij
> ---
> .../interrupt-controller/apple,aic.yaml | 88 +++
> MAINTAINERS
On Sat, Mar 06, 2021 at 11:39:35AM +0100, Marius Zachmann wrote:
> On 06.03.21 at 10:53:59 CET, Gustavo A. R. Silva wrote
> > In preparation to enable -Wimplicit-fallthrough for Clang, fix a warning
> > by explicitly adding a break statement instead of letting the code fall
> > through to the next
Applied. Thanks!
Alex
On Thu, Mar 4, 2021 at 11:02 PM Quan, Evan wrote:
>
> [AMD Public Use]
>
> Thanks. Reviewed-by: Evan Quan
>
> -Original Message-
> From: Jia-Ju Bai
> Sent: Friday, March 5, 2021 11:54 AM
> To: Deucher, Alexander ; Koenig, Christian
> ; airl...@linux.ie; dan...@f
On Mon, Mar 08, 2021 at 09:29:54PM +0100, Arnd Bergmann wrote:
> On Mon, Mar 8, 2021 at 4:56 PM Rob Herring wrote:
> > On Fri, Mar 5, 2021 at 2:17 PM Arnd Bergmann wrote:
> > > On Fri, Mar 5, 2021 at 7:18 PM Hector Martin wrote:
> >
> > > > > What's the code path using these functions on the M1
On 3/8/21 1:51 PM, Sean Christopherson wrote:
> On Mon, Mar 08, 2021, Ashish Kalra wrote:
>> On Fri, Feb 26, 2021 at 09:44:41AM -0800, Sean Christopherson wrote:
>>> +Will and Quentin (arm64)
>>>
>>> Moving the non-KVM x86 folks to bcc, I don't they care about KVM details at
>>> this
>>> point.
On Mon, Mar 8, 2021 at 12:22 PM Yang Shi wrote:
>
> On Mon, Mar 8, 2021 at 8:49 AM Roman Gushchin wrote:
> >
> > On Sun, Mar 07, 2021 at 10:13:04PM -0800, Shakeel Butt wrote:
> > > On Tue, Feb 16, 2021 at 4:13 PM Yang Shi wrote:
> > > >
> > > > Using kvfree_rcu() to free the old shrinker_maps in
On Mon, Mar 8, 2021 at 12:30 PM Yang Shi wrote:
>
> On Mon, Mar 8, 2021 at 11:12 AM Shakeel Butt wrote:
> >
> > On Tue, Feb 16, 2021 at 4:13 PM Yang Shi wrote:
> > >
> > > Currently the number of deferred objects are per shrinker, but some
> > > slabs, for example,
> > > vfs inode/dentry cache
Hello,
syzbot found the following issue on:
HEAD commit:a38fd874 Linux 5.12-rc2
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=14158fdad0
kernel config: https://syzkaller.appspot.com/x/.config?x=db9c6adb4986f2f2
dashboard link: https://syzkaller.appspo
vmwgfx used a custom locking code to support semantics of a
interruptible rwsem. Now with down_(read|write)_interruptible
implemented in the rwsem we can completely remove the custom
locking code. It also allows us to remove the hacks we needed
to support proper waits for write resources before
hib
vmwgfx has really ugly implemention of an interruptible lock trying
to match rw sem semantics. By adding a small bit of code implementing
down_write_interruptible to rwsem which already supported
down_read_interruptible we can completely remove all of the custom
code from vmwgfx.
Cc: Peter Zijlstr
Add an interruptible version of down_write. It's the other
side of the already implemented down_read_interruptible.
It allows drivers which used custom locking code to
support interruptible rw semaphores to switch over
to rwsem.
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Will Deacon
Cc: linux-kerne
On Mon, Mar 08, 2021 at 11:51:57AM -0800, Sean Christopherson wrote:
> On Mon, Mar 08, 2021, Ashish Kalra wrote:
> > On Fri, Feb 26, 2021 at 09:44:41AM -0800, Sean Christopherson wrote:
> > > +Will and Quentin (arm64)
> > >
> > > Moving the non-KVM x86 folks to bcc, I don't they care about KVM det
On Thu, Mar 04, 2021 at 07:40:53AM +, Zhou Guanghui wrote:
> As described in the split_page function comment, for the non-compound
> high order page, the sub-pages must be freed individually. If the
> memcg of the fisrt page is valid, the tail pages cannot be uncharged
> when be freed.
>
> For
On Mon, Mar 8, 2021 at 5:14 PM Vincenzo Frascino
wrote:
>
> This patchset implements the asynchronous mode support for ARMv8.5-A
> Memory Tagging Extension (MTE), which is a debugging feature that allows
> to detect with the help of the architecture the C and C++ programmatic
> memory errors like
On Mon, Mar 8, 2021 at 10:34 PM Stephen Rothwell wrote:
>
> Hi all,
>
> On Tue, 9 Mar 2021 07:26:20 +1100 Stephen Rothwell
> wrote:
> >
> > Commits
> >
> > eb441337c714 ("gpio: pca953x: Set IRQ type when handle Intel Galileo Gen
> > 2")
> > 809390219fb9 ("gpiolib: acpi: Allow to find GpioIn
> +static int bcm6368_mdiomux_probe(struct platform_device *pdev)
> +{
> + struct bcm6368_mdiomux_desc *md;
> + struct mii_bus *bus;
> + struct resource *res;
> + int rc;
> +
> + md = devm_kzalloc(&pdev->dev, sizeof(*md), GFP_KERNEL);
> + if (!md)
> + return -ENO
On Mon, Mar 08, 2021 at 07:41:01PM +0100, Álvaro Fernández Rojas wrote:
> + clocks:
> +maxItems: 1
Hi Álvaro
The driver does not make use of this clocks property. Is it really
needed?
Andrew
The MHI WWWAN control driver allows MHI Qcom based modems to expose
different modem control protocols to userspace, so that userspace
modem tools or daemon (e.g. ModemManager) can control WWAN config
and state (APN config, SMS, provider selection...). A Qcom based
modem can expose one or several of
Hi Rafael
On 08/03/2021 17:23, Rafael J. Wysocki wrote:
> On Mon, Mar 8, 2021 at 4:45 PM Rafael J. Wysocki wrote:
>> On Mon, Mar 8, 2021 at 2:57 PM Andy Shevchenko
>> wrote:
>>> On Mon, Mar 08, 2021 at 02:36:27PM +0100, Rafael J. Wysocki wrote:
On Sun, Mar 7, 2021 at 9:39 PM Andy Shevchenko
On 3/1/21 3:58 PM, Masahiro Yamada wrote:
Many architectures duplicate similar shell scripts.
This commit converts parisc to use scripts/syscalltbl.sh. This also
unifies syscall_table_64.h and syscall_table_c32.h.
Signed-off-by: Masahiro Yamada
For both patches:
Acked-by: Helge Deller
Masa
On Mon, Mar 08, 2021 at 12:42:27PM -0800, Andrew Morton wrote:
> On Mon, 8 Mar 2021 09:41:38 +0100 Michal Hocko wrote:
>
> > On Fri 05-03-21 15:58:40, Andrew Morton wrote:
> > > On Fri, 5 Mar 2021 12:52:52 +0100 Michal Hocko wrote:
> > >
> > > > On Thu 04-03-21 07:40:53, Zhou Guanghui wrote:
>
From: Arnd Bergmann
Using 'imply AMD_IOMMU_V2' does not guarantee that the driver can link
against the exported functions. If the GPU driver is built-in but the
IOMMU driver is a loadable module, the kfd_iommu.c file is indeed
built but does not work:
x86_64-linux-ld: drivers/gpu/drm/amd/amdkfd/
On Mon, Mar 08, 2021, Paolo Bonzini wrote:
> On 08/03/21 17:44, Sean Christopherson wrote:
> > VMCALL is also probably ok
> > in most scenarios, but patching L2's code from L0 KVM is sketchy.
>
> I agree that patching is sketchy and I'll send a patch. However...
>
> > > The same is true for the
Hi Parshuram,
On Tue, Mar 02, 2021 at 12:53:50PM +, Parshuram Raju Thombare wrote:
> Hi Laurent,
>
> >>> Is this a property of the hardware, that is, are there multiple versions
> >>> of this IP core covered by the same compatible string that support HDCP
> >>> 1.4 only, DHCP 2.2 only or both
On Mon, 8 Mar 2021 09:41:38 +0100 Michal Hocko wrote:
> On Fri 05-03-21 15:58:40, Andrew Morton wrote:
> > On Fri, 5 Mar 2021 12:52:52 +0100 Michal Hocko wrote:
> >
> > > On Thu 04-03-21 07:40:53, Zhou Guanghui wrote:
> > > > As described in the split_page function comment, for the non-compound
On Mon, Mar 08, 2021 at 12:12:59PM -0800, James Bottomley wrote:
> On Mon, 2021-03-08 at 13:32 -0600, Gustavo A. R. Silva wrote:
> > Hi all,
> >
> > Friendly ping: who can review/take this, please?
>
> Well, before embarking on a huge dynamic update, let's ask Broadcom the
> simpler question of w
On Mon, Mar 08, 2021, Peter Zijlstra wrote:
> On Mon, Mar 08, 2021 at 10:25:59AM +0800, Xu, Like wrote:
> > On 2021/3/6 6:33, Sean Christopherson wrote:
> > > Handle a NULL x86_pmu.guest_get_msrs at invocation instead of patching
> > > in perf_guest_get_msrs_nop() during setup. If there is no PMU,
Hi Rafael
On 08/03/2021 17:46, Rafael J. Wysocki wrote:
>> +void acpi_walk_dep_device_list(acpi_handle handle,
>> + int (*callback)(struct acpi_dep_data *, void
>> *),
>> + void *data)
>> +{
>> + struct acpi_dep_data *dep, *tmp;
>> +
On Fri, Mar 05, 2021 at 06:38:41AM +0900, Hector Martin wrote:
> Not all platforms provide the same set of timers/interrupts, and Linux
> only needs one (plus kvm/guest ones); some platforms are working around
> this by using dummy fake interrupts. Implementing interrupt-names allows
> the devicetr
Hi Tom,
On 2/25/21 1:59 PM, Tom Rix wrote:
CAUTION: This message has originated from an External Source. Please use proper
judgment and caution when opening attachments, clicking links, or responding to
this email.
On 2/17/21 10:40 PM, Lizhi Hou wrote:
infrastructure code providing APIs fo
On Mon, Mar 8, 2021 at 9:12 PM Christian König
wrote:
> Am 08.03.21 um 21:02 schrieb Felix Kuehling:
> > Am 2021-03-08 um 2:33 p.m. schrieb Arnd Bergmann:
> > I don't want to create a hard dependency on AMD_IOMMU_V2 if I can avoid
> > it, because it is only really needed for a small number of AMD
Hi!
> This is the start of the stable review cycle for the 5.10.22 release.
> There are 42 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses should be made by Wed, 10 Mar 2021 12:27:05 +0
> Am 08.03.2021 um 21:18 schrieb Yang Shi :
>
> On Mon, Mar 8, 2021 at 11:30 AM David Hildenbrand wrote:
>>
>>> On 08.03.21 20:11, Yang Shi wrote:
>>> On Mon, Mar 8, 2021 at 11:01 AM Zi Yan wrote:
On 8 Mar 2021, at 13:11, David Hildenbrand wrote:
> On 08.03.21 18:49, Zi
On 3/6/21 11:18 AM, Juergen Gross wrote:
> An event channel should be kept masked when an eoi is pending for it.
> When being migrated to another cpu it might be unmasked, though.
>
> In order to avoid this keep three different flags for each event channel
> to be able to distinguish "normal" mas
Hi all,
On Tue, 9 Mar 2021 07:26:20 +1100 Stephen Rothwell
wrote:
>
> Commits
>
> eb441337c714 ("gpio: pca953x: Set IRQ type when handle Intel Galileo Gen 2")
> 809390219fb9 ("gpiolib: acpi: Allow to find GpioInt() resource by name and
> index")
> 62d5247d239d ("gpiolib: acpi: Add ACPI_G
On Fri, Mar 05, 2021 at 03:03:00PM -0600, Rob Herring wrote:
> On Fri, Feb 12, 2021 at 02:22:49PM -0800, mgr...@linux.intel.com wrote:
> > From: Seamus Kelly
> >
> > Add device tree bindings for keembay-xlink.
> >
> > Cc: Rob Herring
> > Cc: devicet...@vger.kernel.org
> > Reviewed-by: Mark Gros
On Mon, Mar 8, 2021 at 11:12 AM Shakeel Butt wrote:
>
> On Tue, Feb 16, 2021 at 4:13 PM Yang Shi wrote:
> >
> > Currently the number of deferred objects are per shrinker, but some slabs,
> > for example,
> > vfs inode/dentry cache are per memcg, this would result in poor isolation
> > among mem
On Mon, Mar 8, 2021 at 4:56 PM Rob Herring wrote:
> On Fri, Mar 5, 2021 at 2:17 PM Arnd Bergmann wrote:
> > On Fri, Mar 5, 2021 at 7:18 PM Hector Martin wrote:
>
> > > > What's the code path using these functions on the M1 where we need to
> > > > return 'posted'? It's just downstream PCI mappin
Document nvmem-cells compatible used to treat mtd partitions as a
nvmem provider.
Signed-off-by: Ansuel Smith
---
.../bindings/mtd/partitions/nvmem-cells.yaml | 105 ++
1 file changed, 105 insertions(+)
create mode 100644
Documentation/devicetree/bindings/mtd/partitions/nvmem-
On Fri, 05 Mar 2021 06:38:39 +0900, Hector Martin wrote:
> These are the CPU cores in the "Apple Silicon" M1 SoC.
>
> Signed-off-by: Hector Martin
> ---
> Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewed-by: Rob Herring
Partitions that contains the nvmem-cells compatible will register
their direct subonodes as nvmem cells and the node will be treated as a
nvmem provider.
Signed-off-by: Ansuel Smith
---
Depends on [PATCH] mtd: parsers: ofpart: limit parsing of deprecated DT syntax
---
drivers/mtd/mtdcore.c | 3 +
On 8/03/21 5:59 pm, Guenter Roeck wrote:
> On 3/7/21 8:37 PM, Chris Packham wrote:
> [ ... ]
>>> That's from -ENXIO which is used in only one place in i2c-mpc.c. I'll
>>> enable some debug and see what we get.
>> For the errant readings there was nothing abnormal reported by the driver.
>>
>> For
On Fri, 05 Mar 2021 06:38:38 +0900, Hector Martin wrote:
> This introduces bindings for all three 2020 Apple M1 devices:
>
> * apple,j274 - Mac mini (M1, 2020)
> * apple,j293 - MacBook Pro (13-inch, M1, 2020)
> * apple,j313 - MacBook Air (M1, 2020)
>
> Signed-off-by: Hector Martin
> ---
> .../d
On Mon, Mar 08, 2021 at 07:58:11AM -0800, Minchan Kim wrote:
> On Mon, Mar 08, 2021 at 04:42:43PM +0100, Michal Hocko wrote:
> > On Mon 08-03-21 15:13:35, David Hildenbrand wrote:
> > > On 08.03.21 15:11, Michal Hocko wrote:
> > > > On Mon 08-03-21 14:22:12, David Hildenbrand wrote:
> > > > > On 08
Hi all,
Commits
eb441337c714 ("gpio: pca953x: Set IRQ type when handle Intel Galileo Gen 2")
809390219fb9 ("gpiolib: acpi: Allow to find GpioInt() resource by name and
index")
62d5247d239d ("gpiolib: acpi: Add ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER quirk")
6e5d5791730b ("gpiolib: acpi: Add miss
On Fri, 05 Mar 2021 06:38:37 +0900, Hector Martin wrote:
> This is different from the legacy AAPL prefix used on PPC, but
> consensus is that we prefer `apple` for these new platforms.
>
> Signed-off-by: Hector Martin
> Reviewed-by: Krzysztof Kozlowski
> Reviewed-by: Linus Walleij
> ---
> Docu
The following commit has been merged into the irq/irqchip-next branch of
irqchip:
Commit-ID: 69dd4503a7e6bae3389b8e028e5768008be8f2d7
Gitweb:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/69dd4503a7e6bae3389b8e028e5768008be8f2d7
Author:Greg Kroah-Hartman
A
The following commit has been merged into the irq/irqchip-next branch of
irqchip:
Commit-ID: a79f7051cccb6f3bcd3d2a0a058c7d5c79bb0371
Gitweb:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/a79f7051cccb6f3bcd3d2a0a058c7d5c79bb0371
Author:Marc Zyngier
AuthorD
The following commit has been merged into the irq/irqchip-next branch of
irqchip:
Commit-ID: 3e895f4cbd158c31f1295d097a73ea4fe50f88f4
Gitweb:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/3e895f4cbd158c31f1295d097a73ea4fe50f88f4
Author:Marc Zyngier
AuthorD
From: Peter Ujfalusi
On AM64 the DMA channel for sa2ul can be configured to be coherent or
non coherent via DT binding.
Use the dmaengine_get_device_for_dma_api() to get the device pointer which
should be used for with the dma_api to use matching dma_ops for the
channel coherency/non coherency.
From: Peter Ujfalusi
The sa2ul module in am64 have limited support for algorithms, and the
priv and priv_id used on the platform is different compared to AM654 or
j721e.
Use match data to get the SoC specific information and use it throughout
the driver.
Signed-off-by: Peter Ujfalusi
Signed-of
From: Peter Ujfalusi
Add the AM64 version of sa2ul to the compatible list.
[v_gu...@ti.com: Conditional dma-coherent requirement, clocks]
Signed-off-by: Peter Ujfalusi
Signed-off-by: Vaibhav Gupta
---
.../devicetree/bindings/crypto/ti,sa2ul.yaml | 40 +++
1 file changed, 33 i
From: Vaibhav Gupta
This patch series aims to modify necessary files before an entry for sa2ul
can be made in the respective am64 device tree.
Peter Ujfalusi (3):
dt-bindings: crypto: ti,sa2ul: Add new compatible for AM64
crypto: sa2ul: Support for per channel coherency
crypto: sa2ul: Add
On Mon, Mar 8, 2021 at 8:49 AM Roman Gushchin wrote:
>
> On Sun, Mar 07, 2021 at 10:13:04PM -0800, Shakeel Butt wrote:
> > On Tue, Feb 16, 2021 at 4:13 PM Yang Shi wrote:
> > >
> > > Using kvfree_rcu() to free the old shrinker_maps instead of call_rcu().
> > > We don't have to define a dedicated
On Thu, 04 Mar 2021 14:51:32 +0530, Jagan Teki wrote:
> ICN6211 is MIPI-DSI to RGB Converter bridge from Chipone.
>
> It has a flexible configuration of MIPI DSI signal input and
> produces RGB565, RGB666, RGB888 output format.
>
> Add dt-bingings for it.
>
> Signed-off-by: Jagan Teki
> ---
> C
alloc_contig_range is usually used on cma area or movable zone.
It's critical if the page migration fails on those areas so
dump more debugging message.
page refcount, mapcount with page flags on dump_page are
helpful information to deduce the culprit. Furthermore,
dump_page_owner was super helpfu
On Mon, 8 Mar 2021 19:11:26 +0800
Zeng Tao wrote:
> We have met the following error when test with DPDK testpmd:
> [ 1591.733256] kernel BUG at mm/memory.c:2177!
> [ 1591.739515] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
> [ 1591.747381] Modules linked in: vfio_iommu_type1 vfio_pci vfio_virq
lo that,
> >
> > Tested-by: Hector Martin
> >
> > [1]
> > https://lore.kernel.org/lkml/CAHk-=wjnzdlsp3odxhf9emtyo7gf-qjanlbuh1zk3c4a7x7...@mail.gmail.com/
>
> Thanks!
>
> I've folded that in, with the series rebased to v5.12-rc2, tagged as
> ar
On Fri, Mar 05, 2021 at 03:01:40PM -0600, Rob Herring wrote:
> On Fri, Feb 12, 2021 at 02:22:34PM -0800, mgr...@linux.intel.com wrote:
> > From: Daniele Alessandrelli
> >
> > Add DT binding documentation for the Intel Keem Bay IPC driver, which
>
> Bindings are for h/w blocks, not drivers. From
On Thu, Mar 04, 2021 at 12:32:23PM +0530, Nava kishore Manne wrote:
> From: Appana Durga Kedareswara rao
>
> This patch adds binding doc for versal fpga manager driver.
Why do you need a DT entry for this? Can't the Versal firmware driver
instantiate the fpga-mgr device?
>
> Signed-off-by: Na
On Mon, Mar 8, 2021 at 11:30 AM David Hildenbrand wrote:
>
> On 08.03.21 20:11, Yang Shi wrote:
> > On Mon, Mar 8, 2021 at 11:01 AM Zi Yan wrote:
> >>
> >> On 8 Mar 2021, at 13:11, David Hildenbrand wrote:
> >>
> >>> On 08.03.21 18:49, Zi Yan wrote:
> On 8 Mar 2021, at 11:17, David Hildenbra
Hi Thomas
On Mon, Mar 08, 2021 at 10:24:47AM +0100, Thomas Bogendoerfer wrote:
> BMIPS is one of the few platforms that do change the exception base.
> After commit 2dcb39645441 ("memblock: do not start bottom-up allocations
> with kernel_end") we started seeing BMIPS boards fail to boot with the
On Mon, Mar 08, 2021 at 08:00:00PM +, Chen, Mike Ximing wrote:
>
>
> > -Original Message-
> > From: Dan Williams
> > Sent: Tuesday, February 9, 2021 11:30 AM
> > To: Greg KH
> > Cc: Chen, Mike Ximing ; Linux Kernel Mailing
> > List
> > ; Arnd Bergmann ; Pierre-Louis
> > Bossart ; G
On Mon, 2021-03-08 at 13:32 -0600, Gustavo A. R. Silva wrote:
> Hi all,
>
> Friendly ping: who can review/take this, please?
Well, before embarking on a huge dynamic update, let's ask Broadcom the
simpler question of why isn't MPI2_IO_UNIT_PAGE_3_GPIO_VAL_MAX simply
set to 36? There's no dynamic
Hello Moritz,
> -Original Message-
> From: Moritz Fischer
> Sent: Saturday, March 6, 2021 9:19 AM
> To: Sonal Santan
> Cc: Tom Rix ; Lizhi Hou ; linux-
> ker...@vger.kernel.org; linux-f...@vger.kernel.org; Max Zhen
> ; Michal Simek ; Stefano Stabellini
> ; devicet...@vger.kernel.org; m..
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