[PATCH 8/8] scsi: hisi_sas: Some very minor tidying

From: Luo Jiaxing We found an extra blank line at the end of some functions, so delete them. And add spaces around some operators. Signed-off-by: Luo Jiaxing Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_main.c | 1 - drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 2 +- drivers

[PATCH 0/8] hisi_sas: Misc patches

This series contains some minor feature updates and general tidying: - Some new BIST features - Stop modifying previously unused fields in programmable link rate reg - Stop accessing some SSP task fields for SMP tasks - General minor tidying Thanks! Luo Jiaxing (6): scsi: hisi_sas: Modify

[PATCH 1/8] scsi: hisi_sas: Avoid accessing to SSP task for SMP IOs

ask. Signed-off-by: Xiang Chen Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_main.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/scsi/hisi_sas/hisi_sas_main.c b/drivers/scsi/hisi_sas/hisi_sas_main.c index 11caa4b0d797..fdf5f0f1b60b 100

[PATCH 3/8] scsi: hisi_sas: Do not modify upper fields of PROG_PHY_LINK_RATE reg

Jiaxing Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 25 ++--- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index 05b60cdf6b24..b7d94f2e49ae 100644

[PATCH 2/8] scsi: hisi_sas: Modify macro name for OOB phy linkrate

From: Luo Jiaxing The macro for OOB phy linkrate is named as CFG_PROG_PHY_LINK_RATE_*, but it's not correct. To avoid some misunderstand, we modify it to a correct naming. Signed-off-by: Luo Jiaxing Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 15 +++ 1

[PATCH 5/8] scsi: hisi_sas: Add BIST support for phy FFE

after BIST test if necessary. Signed-off-by: Luo Jiaxing Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas.h | 13 + drivers/scsi/hisi_sas/hisi_sas_main.c | 76 ++ drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 25 - 3 files changed, 111 insertions

[PATCH 7/8] scsi: hisi_sas: Add carriage returns to some prints

From: Xiang Chen There is no carriage return for some prints, so add carriage returns for them. Signed-off-by: Xiang Chen Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_main.c | 2 +- drivers/scsi/hisi_sas/hisi_sas_v1_hw.c | 24 drivers/scsi/hisi_sas

[PATCH 4/8] scsi: hisi_sas: Make phy index variable name consistent

From: Luo Jiaxing We use "phy_id" to identify phy in the BIST code, but the rest of code always use "phy_no". So we change it for consistent coding style. Signed-off-by: Luo Jiaxing Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 50 +-

[PATCH 6/8] scsi: hisi_sas: Add BIST support for fixed code pattern

From: Luo Jiaxing Add BIST support for fixed code pattern. Through the new debugfs interface, the user can select fixed code pattern if they want. We added two new interfaces fixed_code and fixed_code1 to configure fixed code pattern. Signed-off-by: Luo Jiaxing Signed-off-by: John Garry

Re: [PATCH v6 1/5] perf/jevents: Remove jevents.h file

On 31/08/2020 09:43, Jiri Olsa wrote: On Thu, Aug 27, 2020 at 06:39:54PM +0530, Kajol Jain wrote: This patch removes jevents.h file and add its data inside jevents.c as this file is only included there. Signed-off-by: Kajol Jain --- tools/perf/pmu-events/jevents.c | 9 -

Re: [PATCH v8 00/18] blk-mq/scsi: Provide hostwide shared tags for SCSI HBAs

it-send-email-john.ga...@huawei.com/T/#t Hannes Reinecke (5): blk-mq: Rename blk_mq_update_tag_set_depth() blk-mq: Free tags in blk_mq_init_tags() upon error scsi: Add host and host template flag 'host_tagset' hpsa: enable host_tagset and switch to MQ smartpqi: enable host tagset John G

Re: [RFC] perf/jevents: Add new structure to pass json fields.

On 26/08/2020 12:24, kajoljain wrote: On 8/26/20 4:30 PM, Jiri Olsa wrote: On Tue, Aug 25, 2020 at 09:14:11AM +0100, John Garry wrote: SNIP goto free_strings; } - err = func(data, name, real_event(name, event), desc, long_desc

Re: [RFC] perf/jevents: Add new structure to pass json fields.

On 25/08/2020 08:40, Kajol Jain wrote: This patch adds new structure called 'json_event' inside jevents.h file to improve the callback prototype inside jevent files. Initially, whenever user want to add new field, they need to update in all function callback which make it more and more complex

[PATCH v2 1/2] iommu/arm-smmu-v3: Calculate max commands per batch

Calculate the batch size limit such that all CPUs in the system cannot issue so many commands as to fill the command queue. Signed-off-by: John Garry --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 46 +++-- 1 file changed, 42 insertions(+), 4 deletions(-) diff --git

[PATCH v2 2/2] iommu/arm-smmu-v3: Remove cmpxchg() in arm_smmu_cmdq_issue_cmdlist()

that this that this scenario does not occur, as we limit the amount of commands any CPU can issue at any given time, such that we cannot progress prod pointer further. Signed-off-by: John Garry --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 120 1 file changed,

[PATCH v2 0/2] iommu/arm-smmu-v3: Improve cmdq lock efficiency

/b926444035e5e2439431908e3842afd24b8...@dggemi525-mbs.china.huawei.com/T/#ma02e301c38c3e94b7725e685757c27e39c7cbde3 Differences to v1: - Simplify by dropping patch to always issue a CMD_SYNC - Use 64b atomic add, keeping prod in a separate 32b field John Garry (2): iommu/arm-smmu-v3: Calculate max commands

Re: [PATCH v2] MAINTAINERS: Add entries for CoreSight and Arm SPE

On 20/08/2020 18:55, Mathieu Poirier wrote: Add entries for perf tools elements related to the support of Arm CoreSight and Arm SPE. Also lump in Arm and Arm64 architecture files to provide coverage. Signed-off-by: Mathieu Poirier thanks Acked-by: John Garry --- V2: - Completed fileset

Re: v5.9-rc1 commit reliably breaks pci nvme detection

On 20/08/2020 18:12, Christoph Hellwig wrote: On Thu, Aug 20, 2020 at 11:10:58AM -0600, Jens Axboe wrote: To be fair, I've only heard this one complaint about it, so hopefully it's not too widespread. I'm on an x86-64 laptop myself with nvme, and it works just fine:-) The cause for this is the

Re: [PATCH] MAINTAINERS: Add entries for CoreSight and Arm SPE

On 19/08/2020 20:26, Mathieu Poirier wrote: On Wed, 19 Aug 2020 at 11:30, Will Deacon wrote: On Wed, Aug 19, 2020 at 11:01:38AM -0600, Mathieu Poirier wrote: On Tue, 18 Aug 2020 at 11:56, John Garry wrote: On 17/08/2020 20:31, Mathieu Poirier wrote: diff --git a/MAINTAINERS b/MAINTAINERS

[PATCH v8 10/18] blk-mq, elevator: Count requests per hctx to improve performance

vator even though there are no requests queued. Signed-off-by: Kashyap Desai Signed-off-by: Hannes Reinecke [jpg: Relocated atomic_dec() in dd_dispatch_request(), update commit message per Kashyap] Signed-off-by: John Garry --- block/bfq-iosched.c| 5 + block/blk-mq.c | 1 +

[PATCH v8 16/18] hpsa: enable host_tagset and switch to MQ

From: Hannes Reinecke The smart array HBAs can steer interrupt completion, so this patch switches the implementation to use multiqueue and enables 'host_tagset' as the HBA has a shared host-wide tagset. Reviewed-by: Don Brace Signed-off-by: Hannes Reinecke Signed-off-by: John Garry

[PATCH v8 17/18] scsi: megaraid_sas: Added support for shared host tagset for cpuhotplug

ashyap Desai Signed-off-by: Hannes Reinecke Signed-off-by: John Garry --- drivers/scsi/megaraid/megaraid_sas_base.c | 39 + drivers/scsi/megaraid/megaraid_sas_fusion.c | 29 --- 2 files changed, 55 insertions(+), 13 deletions(-) diff --git a/d

[PATCH v8 18/18] smartpqi: enable host tagset

From: Hannes Reinecke Enable host tagset for smartpqi; with this we can use the request tag to look command from the pool avoiding the list iteration in the hot path. Signed-off-by: Hannes Reinecke [jpg: Mod ctrl_info->next_io_request_slot calc] Signed-off-by: John Garry --- drivers/s

[PATCH v8 02/18] blk-mq: Rename blk_mq_update_tag_set_depth()

in blk_mq_init_bitmap_tags()] Signed-off-by: John Garry --- block/blk-mq.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/block/blk-mq.c b/block/blk-mq.c index 8f95cc443527..50de9eb60466 100644 --- a/block/blk-mq.c +++ b/block/blk-mq.c @@ -2880,8 +2880,8 @@ static void

[PATCH v8 11/18] null_blk: Support shared tag bitmap

that is the queue depth over all null blk devices. Signed-off-by: John Garry --- drivers/block/null_blk_main.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/block/null_blk_main.c b/drivers/block/null_blk_main.c index 47a9dad880af..19c04e074880 100644 --- a/drivers/block

[PATCH v8 07/18] blk-mq: Relocate hctx_may_queue()

blk-mq.h and blk-mq-tag.h include on each other, which is less than ideal. Locate hctx_may_queue() to blk-mq.h, as it is not really tag specific code. In this way, we can drop the blk-mq-tag.h include of blk-mq.h Signed-off-by: John Garry --- block/blk-mq-tag.h | 33

[PATCH v8 06/18] blk-mq: Facilitate a shared sbitmap per tagset

ches used Signed-off-by: John Garry --- block/blk-mq-sched.c | 8 --- block/blk-mq-tag.c | 51 ++ block/blk-mq-tag.h | 7 ++ block/blk-mq.c | 15 + block/blk-mq.h | 5 + include/linux/blk-mq.h | 6 +

[PATCH v8 09/18] blk-mq: Record active_queues_shared_sbitmap per tag_set for when using shared sbitmap

patches used Originally-from: Kashyap Desai Signed-off-by: John Garry --- block/blk-mq-tag.c | 33 + block/blk-mq.c | 2 ++ block/blk-mq.h | 16 +--- include/linux/blk-mq.h | 1 + include/linux/blkdev.h | 1 + 5 files changed, 42

[PATCH v8 04/18] blk-mq: Pass flags for tag init/free

Pass hctx/tagset flags argument down to blk_mq_init_tags() and blk_mq_free_tags() for selective init/free. For now, make it include the alloc policy flag, which can be evaluated when needed (in blk_mq_init_tags()). Signed-off-by: John Garry --- block/blk-mq-sched.c | 11 --- block/blk

[PATCH v8 03/18] blk-mq: Free tags in blk_mq_init_tags() upon error

commit message] Signed-off-by: John Garry --- block/blk-mq-tag.c | 18 ++ 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/block/blk-mq-tag.c b/block/blk-mq-tag.c index 32d82e23b095..c2c9f369d777 100644 --- a/block/blk-mq-tag.c +++ b/block/blk-mq-tag.c @@ -429,24 +429,22

[PATCH v8 12/18] scsi: Add host and host template flag 'host_tagset'

comment on .can_queue and add Scsi_Host.host_tagset] Signed-off-by: John Garry --- drivers/scsi/hosts.c | 1 + drivers/scsi/scsi_lib.c | 2 ++ include/scsi/scsi_host.h | 9 - 3 files changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/scsi/hosts.c b/drivers/scsi/hosts.c index

[PATCH v8 13/18] scsi: core: Show nr_hw_queues in sysfs

So that we don't use a value of 0 for when Scsi_Host.nr_hw_queues is unset, use the tag_set->nr_hw_queues (which holds 1 for this case). Signed-off-by: John Garry --- drivers/scsi/scsi_sysfs.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/drivers/scsi/scsi_sysfs.c b/driv

[PATCH v8 01/18] blk-mq: Rename BLK_MQ_F_TAG_SHARED as BLK_MQ_F_TAG_QUEUE_SHARED

a few times, add rnbd-clt.c change] Signed-off-by: John Garry --- block/blk-mq-debugfs.c| 2 +- block/blk-mq-tag.h| 6 +++--- block/blk-mq.c| 20 ++-- drivers/block/rnbd/rnbd-clt.c | 2 +- include/linux/blk-mq.h| 2 +- 5 files changed

[PATCH v8 08/18] blk-mq: Record nr_active_requests per queue for when using shared sbitmap

based on that value. Tested-by: Don Brace #SCSI resv cmds patches used Co-developed-with: Kashyap Desai Signed-off-by: John Garry --- block/blk-core.c | 2 ++ block/blk-mq.c | 4 ++-- block/blk-mq.h | 26 -- include/linux/blkdev.h | 2 ++ 4 files

[PATCH v8 05/18] blk-mq: Use pointers for blk_mq_tags bitmap tags

Introduce pointers for the blk_mq_tags regular and reserved bitmap tags, with the goal of later being able to use a common shared tag bitmap across all HW contexts in a set. Tested-by: Don Brace #SCSI resv cmds patches used Reviewed-by: Hannes Reinecke Signed-off-by: John Garry --- block/bfq

[PATCH v8 00/18] blk-mq/scsi: Provide hostwide shared tags for SCSI HBAs

a...@huawei.com/T/#t Hannes Reinecke (5): blk-mq: Rename blk_mq_update_tag_set_depth() blk-mq: Free tags in blk_mq_init_tags() upon error scsi: Add host and host template flag 'host_tagset' hpsa: enable host_tagset and switch to MQ smartpqi: enable host tagset John Garry (10): blk-mq: Pa

[PATCH v8 14/18] scsi: hisi_sas: Switch v3 hw to MQ

Now that the block layer provides a shared tag, we can switch the driver to expose all HW queues. Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas.h | 3 +- drivers/scsi/hisi_sas/hisi_sas_main.c | 36 ++- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 87

[PATCH v8 15/18] scsi: scsi_debug: Support host tagset

set, sdebug_max_queue is fixed to the same value, we can simplify how sdebug_driver_template.can_queue is set. Signed-off-by: John Garry --- drivers/scsi/scsi_debug.c | 28 ++-- 1 file changed, 10 insertions(+), 18 deletions(-) diff --git a/drivers/scsi/scsi_debug.c b/drivers/s

Re: [PATCH] MAINTAINERS: Add entries for CoreSight and Arm SPE

/MAINTAINERS index 4e2698cc7e23..f9bb76baeec9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13427,8 +13427,18 @@ F: tools/perf/ PERFORMANCE EVENTS SUBSYSTEM ARM64 PMU EVENTS R:John Garry R:Will Deacon +R: Mathieu Poirier +R: Leo Yan L:linux-arm-ker

[PATCH] nvme-pci: Use u32 for nvme_dev.q_depth and nvme_queue.q_depth

ove. Fixes: 61f3b8963097 ("nvme-pci: use unsigned for io queue depth") Signed-off-by: John Garry diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c index ba725ae47305..1cb09a187ae7 100644 --- a/drivers/nvme/host/pci.c +++ b/drivers/nvme/host/pci.c @@ -120,7 +120,7 @@ st

Re: nvme crash - Re: linux-next: Tree for Aug 13

On 14/08/2020 14:07, John Garry wrote: BTW, as for the DMA/sg scatterlist code, it so happens in this case that we try the dma alloc for size=0 in nvme_alloc_queue() - I know an allocation for size=0 makes no sense, but couldn't we bit a bit more robust? it's giving ZERO_SIZE_PTR, which we

Re: nvme crash - Re: linux-next: Tree for Aug 13

to worry about? I guess not since we're in the merge window, but mentioning just in case ... I bisected, and this patch looks to fix it (note the comments below the '---'): From 263891a760edc24b901085bf6e5fe2480808f86d Mon Sep 17 00:00:00 2001 From: John Garry Date: Fri, 14 Aug 2020 12:45:18 +0100

Re: nvme crash - Re: linux-next: Tree for Aug 13

bisected, and this patch looks to fix it (note the comments below the '---'): From 263891a760edc24b901085bf6e5fe2480808f86d Mon Sep 17 00:00:00 2001 From: John Garry Date: Fri, 14 Aug 2020 12:45:18 +0100 Subject: [PATCH] nvme-pci: Use u32 for nvme_dev.q_depth Recently nvme_dev.q_depth was changed from

Re: [PATCH v2 0/4] Perf tool: Enable Arm arch timer counter and arm-spe's timestamp

. Thats ok with me, I think we should reflect that on the MAINTAINERS file, right? We have this already: PERFORMANCE EVENTS SUBSYSTEM ARM64 PMU EVENTS R: John Garry R: Will Deacon L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers) S: Supported F: tools

nvme crash - Re: linux-next: Tree for Aug 13

On 13/08/2020 07:58, Stephen Rothwell wrote: Hi all, Hi guys, I have experienced this this crash below on linux-next for the last few days on my arm64 system. Linus' master branch today also has it. root@ubuntu:/home/john# insmod nvme.ko [148.254564] nvme :81:00.0: Adding to iommu

Re: [PATCH v2 2/2] perf pmu: Improve CPU core PMU HW event list ordering

On 03/08/2020 13:54, Arnaldo Carvalho de Melo wrote: git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git Please let me know - it would be useful for any dev during the merge window. So, I'm now pushing things directly to Linus, but just the tooling part, the branch to do development on

Re: [PATCH 4.14 01/51] scsi: libsas: direct call probe and destruct

e filename. Since the LLDD will send broadcast for every device change, we can only process one expander's revalidation. [mkp: kbuild test robot warning] Signed-off-by: Jason Yan CC: John Garry CC: Johannes Thumshirn CC: Ewan Milne CC: Christoph Hellwig CC: Tomas Henzl CC: Dan Williams

Re: [PATCH v2 2/2] perf pmu: Improve CPU core PMU HW event list ordering

On 17/06/2020 13:15, Arnaldo Carvalho de Melo wrote: Em Wed, Jun 17, 2020 at 08:31:02PM +0900, Namhyung Kim escreveu: On Wed, Jun 17, 2020 at 6:06 PM John Garry wrote: For perf list, the CPU core PMU HW event ordering is such that not all events may will be listed adjacent - consider

Re: [PATCH] MAINTAINERS: Include drivers subdirs for ARM PMU PROFILING AND DEBUGGING entry

On 17/06/2020 12:17, John Garry wrote: Ensure that the ARM PMU PROFILING AND DEBUGGING maintainers are included for the HiSilicon PMU driver. Just a reminder in case this minor patch was missed... Signed-off-by: John Garry diff --git a/MAINTAINERS b/MAINTAINERS index 68f21d46614c

Re: [PATCH] io: Fix return type of _inb and _inl

her comments. Thanks a lot for spotting it and sending a fix. Thanks Arnd. Yeah, these looks like copy+paste errors on my part: Reviewed-by: John Garry I'll give this patch a spin, but not expecting any differences (since original seems ok). Note that kbuild robot also reported this: ht

Re: [PATCH] scsi: libsas: remove redundant assignment to variable res

Colin Ian King Reviewed-by: John Garry

Re: [PATCH] [SCSI] libsas: add missing newline when printing 'enable' by sysfs

st ~]# cat /sys/devices/pci:00/:00:0d.0/:0f:00.0/host3/phy-3:2/sas_phy/phy-3:2/enable 1[root@localhost ~]# Signed-off-by: Xiongfeng Wang Apart from above, Reviewed-by: John Garry --- drivers/scsi/scsi_transport_sas.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

Re: [PATCH 0/4] iommu/arm-smmu-v3: Improve cmdq lock efficiency

Perhaps a silly question (I'm too engrossed in PMU world ATM to get properly back up to speed on this), but couldn't this be done without cmpxchg anyway? Instinctively it feels like instead of maintaining a literal software copy of the prod value, we could resolve the "claim my slot in the

Re: [PATCH 0/4] iommu/arm-smmu-v3: Improve cmdq lock efficiency

On 16/07/2020 11:28, Will Deacon wrote: On Thu, Jul 16, 2020 at 11:22:33AM +0100, Will Deacon wrote: On Thu, Jul 16, 2020 at 11:19:41AM +0100, Will Deacon wrote: On Tue, Jun 23, 2020 at 01:28:36AM +0800, John Garry wrote: As mentioned in [0], the CPU may consume many cycles processing

Re: [PATCH 0/4] iommu/arm-smmu-v3: Improve cmdq lock efficiency

On 16/07/2020 12:22, Robin Murphy wrote: On 2020-07-16 11:56, John Garry wrote: On 16/07/2020 11:28, Will Deacon wrote: On Thu, Jul 16, 2020 at 11:22:33AM +0100, Will Deacon wrote: On Thu, Jul 16, 2020 at 11:19:41AM +0100, Will Deacon wrote: On Tue, Jun 23, 2020 at 01:28:36AM +0800, John

Re: [PATCH] drivers/perf: Fix kernel panic when rmmod PMU modules during perf sampling

On 16/07/2020 11:44, Will Deacon wrote: Please also note what Qi Liu wrote about being able to unbind the driver and cause the same issue. I don't know if you can about that issue also. I guess we have to throw in some '.suppress_bind_attrs = true,' lines as well, then? Yeah, I think it would

Re: [PATCH 0/4] iommu/arm-smmu-v3: Improve cmdq lock efficiency

On 16/07/2020 11:28, Will Deacon wrote: On Thu, Jul 16, 2020 at 11:22:33AM +0100, Will Deacon wrote: On Thu, Jul 16, 2020 at 11:19:41AM +0100, Will Deacon wrote: On Tue, Jun 23, 2020 at 01:28:36AM +0800, John Garry wrote: As mentioned in [0], the CPU may consume many cycles processing

Re: [PATCH] drivers/perf: Fix kernel panic when rmmod PMU modules during perf sampling

On 16/07/2020 11:30, Will Deacon wrote: On Thu, Jul 16, 2020 at 11:26:25AM +0100, Robin Murphy wrote: On 2020-07-16 10:41, Will Deacon wrote: On Thu, Jul 16, 2020 at 05:19:25PM +0800, Qi Liu wrote: Kernel panic will also happen when users try to unbind PMU drivers with device. This unbind

Re: [PATCH 4/4] iommu/arm-smmu-v3: Remove cmpxchg() in arm_smmu_cmdq_issue_cmdlist()

On 16/07/2020 11:20, Will Deacon wrote: On Tue, Jun 23, 2020 at 01:28:40AM +0800, John Garry wrote: It has been shown that the cmpxchg() for finding space in the cmdq can be a bottleneck: - for more CPUs contending the cmdq, the cmpxchg() will fail more often - since the software-maintained

Re: [PATCH] drivers/perf: Fix kernel panic when rmmod PMU modules during perf sampling

On 16/07/2020 10:41, Will Deacon wrote: On Thu, Jul 16, 2020 at 05:19:25PM +0800, Qi Liu wrote: Kernel panic will also happen when users try to unbind PMU drivers with device. This unbind issue could be solved by another patch latter. drivers/perf/arm_smmuv3_pmu.c | 1 +

Re: [PATCH -next] scsi: hisi_sas: Convert to DEFINE_SHOW_ATTRIBUTE

On 16/07/2020 09:47, Qinglang Miao wrote: Not sure why you cc Greg, but SCSI maintainers should have been - James and Martin From: Yongqiang Liu Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code. Signed-off-by: Yongqiang Liu The sender is not the author, so your signed-off-by should

Re: [PATCH 00/18] perf metric: Add support to reuse metric

On 12/07/2020 14:26, Jiri Olsa wrote: hi, this patchset is adding the support to reused metric in another metric. The metric needs to be referenced by 'metric:' prefix. For example, to define IPC by using CPI with change like: "BriefDescription": "Instructions Per Cycle (per Logical

Re: [PATCH V1 RESEND 2/3] bindings/perf/imx-ddr: update compatible string

On 12/05/2020 08:31, Joakim Zhang wrote: Update compatible string according to driver change.` Signed-off-by: Joakim Zhang --- Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git

Re: [PATCH] drivers/perf: hisi: Add identifier sysfs file

Hi Will, On Wed, Jun 17, 2020 at 09:05:11PM +0800, John Garry wrote: To allow userspace to identify the specific implementation of the device, add an "identifier" sysfs file. Encoding is as follows: hi1620: 0x0 (aka hip08) hi1630: 0x30 Signed-off-by: John Garry I'm strugg

Re: [PATCH 11/18] perf metric: Add referenced metrics to hash data

On 12/07/2020 14:26, Jiri Olsa wrote: +int expr__add_ref(struct expr_parse_ctx *ctx, struct metric_ref *ref) +{ + struct expr_id_data *data_ptr = NULL, *old_data = NULL; + char *old_key = NULL; + char *name; + int ret; + + data_ptr = zalloc(sizeof(*data_ptr)); +

[PATCH 1/2] scsi: hisi_sas: Directly trigger SCSI error handling for completion errors

of seconds until block layer detect timeout and wake up SCSI error handle thread. So we try to trigger error handling directly for some specific IOs to save time. Signed-off-by: Luo Jiaxing Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_v1_hw.c | 4 +++- drivers/scsi/hisi_sas

[PATCH 0/2] hisi_sas: A couple of misc patches

Includes a patch to speed up error handling and a kerneldoc clean-up. John Garry (1): scsi: hisi_sas: Remove one kerneldoc comment Luo Jiaxing (1): scsi: hisi_sas: Directly trigger SCSI error handling for completion errors drivers/scsi/hisi_sas/hisi_sas_v1_hw.c | 4 +++- drivers/scsi

[PATCH 2/2] scsi: hisi_sas: Remove one kerneldoc comment

The comment for interrupt_init_v2_hw() should not be a kerneldoc comment, so remove it. Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas

Re: [PATCH 0/4] iommu/arm-smmu-v3: Improve cmdq lock efficiency

On 22/06/2020 18:28, John Garry wrote: Hi, Can you guys let me know if this is on the radar at all? I have been talking about this performance issue since Jan, and not getting anything really. thanks As mentioned in [0], the CPU may consume many cycles processing

[PATCH] sbitmap: Consider cleared bits in sbitmap_bitmap_show()

out the cleared bits. Fixes: ea86ea2cdced ("sbitmap: ammortize cost of clearing bits") Signed-off-by: John Garry diff --git a/lib/sbitmap.c b/lib/sbitmap.c index af88d1346dd7..267aa7709416 100644 --- a/lib/sbitmap.c +++ b/lib/sbitmap.c @@ -292,8 +292,11 @@ void sbitmap_bitmap_show(struct sb

Re: [RFC 00/10] perf tools: Add support to reuse metric

On 26/06/2020 20:47, Jiri Olsa wrote: hi, this patchset is adding the support to reused metric in another metric. The metric needs to be referenced by 'metric:' prefix. I notice that there is much repetition in the x86 metric JSONs between CPUs. So I know it's not the same as what you

Re: [PATCH 4/4] iommu/arm-smmu-v3: Remove cmpxchg() in arm_smmu_cmdq_issue_cmdlist()

On 23/06/2020 14:55, Rikard Falkeborn wrote: Den tis 23 juni 2020 12:21John Garry > skrev: On 23/06/2020 10:35, Rikard Falkeborn wrote: > >     I'd say that GENMASK_INPUT_CHECK() should be able to handle a l=0 and >     h=unsigned value, so I

Re: [PATCH 4/4] iommu/arm-smmu-v3: Remove cmpxchg() in arm_smmu_cmdq_issue_cmdlist()

I'd say that GENMASK_INPUT_CHECK() should be able to handle a l=0 and h=unsigned value, so I doubt this warn. Using GENMASK((int)cmdq->q.llq.max_n_shift, 0) resolves it, but it looks like GENMASK_INPUT_CHECK() could be improved. That said, I think this particular case might be even better off

Re: [PATCH 4/4] iommu/arm-smmu-v3: Remove cmpxchg() in arm_smmu_cmdq_issue_cmdlist()

On 23/06/2020 10:35, Rikard Falkeborn wrote: I'd say that GENMASK_INPUT_CHECK() should be able to handle a l=0 and h=unsigned value, so I doubt this warn. Using GENMASK((int)cmdq->q.llq.max_n_shift, 0) resolves it, but it looks like GENMASK_INPUT_CHECK() could be improved.

Re: [PATCH 4/4] iommu/arm-smmu-v3: Remove cmpxchg() in arm_smmu_cmdq_issue_cmdlist()

. And when submitting patch, we suggest to use as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/John-Garry/iommu-arm-smmu-v3-Improve-cmdq-lock-efficiency/20200623-013438 base: https://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git

[PATCH 1/4] iommu/arm-smmu-v3: Fix trivial typo

Set "cmq" -> "cmdq". Signed-off-by: John Garry --- drivers/iommu/arm-smmu-v3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index f578677a5c41..a8e814c652fe 100644 --- a/drivers/iommu/arm-

[PATCH 0/4] iommu/arm-smmu-v3: Improve cmdq lock efficiency

] https://lore.kernel.org/linux-iommu/b926444035e5e2439431908e3842afd24b8...@dggemi525-mbs.china.huawei.com/T/#ma02e301c38c3e94b7725e685757c27e39c7cbde3 John Garry (4): iommu/arm-smmu-v3: Fix trivial typo iommu/arm-smmu-v3: Calculate bits for prod and owner iommu/arm-smmu-v3: Always issue

[PATCH 3/4] iommu/arm-smmu-v3: Always issue a CMD_SYNC per batch

amount. Signed-off-by: John Garry --- drivers/iommu/arm-smmu-v3.c | 86 + 1 file changed, 39 insertions(+), 47 deletions(-) diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 4e9677b066f1..45a39ccaf455 100644 --- a/drivers/iommu/arm-smmu

[PATCH 4/4] iommu/arm-smmu-v3: Remove cmpxchg() in arm_smmu_cmdq_issue_cmdlist()

scenario does not occur, as we limit the amount of commands any CPU can issue at any given time, such that we cannot progress prod pointer further. Signed-off-by: John Garry --- drivers/iommu/arm-smmu-v3.c | 101 ++-- 1 file changed, 61 insertions(+), 40 deletions(

[PATCH 2/4] iommu/arm-smmu-v3: Calculate bits for prod and owner

atch - 1 x CMD_SYNC and at least 1 x other. Ignoring limits of HW max_n_shift and HW cmdq memory allocation, approx 32K is the max supported CPUs. For this, max_n_shift would be 15. Signed-off-by: John Garry --- drivers/iommu/arm-smmu-v3.c | 64 ++--- 1 file c

Re: [PATCH v3] driver core: platform: expose numa_node to users in sysfs

On 19/06/2020 04:00, Barry Song wrote: Some platform devices like ARM SMMU are memory-mapped and populated by ACPI/IORT. In this case, NUMA topology of those platform devices are exported by firmware as well. Software might care about the numa_node of those devices in order to achieve NUMA

Re: [PATCH] drivers/perf: hisi: Add identifier sysfs file

On 18/06/2020 02:40, Shaokun Zhang wrote: } + hha_pmu->identifier = readl(hha_pmu->base + HHA_VERSION); Since we are now refactoring the PMU framework, the PMU version offset is always the same except DDRC PMU and other uncore PMU modules will also use this, how about we do it as the common

[PATCH] drivers/perf: hisi: Add identifier sysfs file

To allow userspace to identify the specific implementation of the device, add an "identifier" sysfs file. Encoding is as follows: hi1620: 0x0 (aka hip08) hi1630: 0x30 Signed-off-by: John Garry diff --git a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c b/drivers/perf

[PATCH] MAINTAINERS: Include drivers subdirs for ARM PMU PROFILING AND DEBUGGING entry

Ensure that the ARM PMU PROFILING AND DEBUGGING maintainers are included for the HiSilicon PMU driver. Signed-off-by: John Garry diff --git a/MAINTAINERS b/MAINTAINERS index 68f21d46614c..24f377f1d76c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1425,7 +1425,7 @@ F:arch/arm*/include

[PATCH v2 0/2] perf: Improve list for arm64

This couple of patches provides: - aliases for arm64 CPU core events in perf list, like x86 - ensures that CPU core events are not sparsely listed Differences to v1: - Add ack from Namhyung Kim (thanks) - use more concise logic in patch 2/2 and also add comment John Garry (2): perf pmu: List

[PATCH v2 2/2] perf pmu: Improve CPU core PMU HW event list ordering

Signed-off-by: John Garry --- tools/perf/util/pmu.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c index a375364537cd..faa3e0619740 100644 --- a/tools/perf/util/pmu.c +++ b/tools/perf/util/pmu.c @@ -1400,6 +1400,7 @@ struct sevent {

[PATCH v2 1/2] perf pmu: List kernel supplied event aliases for arm64

generic is_pmu_core() helper which takes account of arm64 to make this feature work for arm64 (and possibly other archs). Sample, before: armv8_pmuv3_0/br_mis_pred/ [Kernel PMU event] after: br_mis_pred OR armv8_pmuv3_0/br_mis_pred/ [Kernel PMU event] Acked-by: Namhyung Kim Signe

[PATCH RFC v2 4/4] iommu/arm-smmu-v3: Remove cmpxchg() in arm_smmu_cmdq_issue_cmdlist()

scenario does not occur, as we limit the amount of commands any CPU can issue at any given time, such that we cannot progress prod pointer further. Signed-off-by: John Garry --- drivers/iommu/arm-smmu-v3.c | 102 +--- 1 file changed, 61 insertions(+), 41 deletions(

[PATCH RFC v2 3/4] iommu/arm-smmu-v3: Always issue a CMD_SYNC per batch

amount. Signed-off-by: John Garry --- drivers/iommu/arm-smmu-v3.c | 87 + 1 file changed, 40 insertions(+), 47 deletions(-) diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index c3562dc35d45..36648163364c 100644 --- a/drivers/iommu/arm-smmu

[PATCH v2 1/4] iommu/arm-smmu-v3: Fix trivial typo

Set "cmq" -> "cmdq". Signed-off-by: John Garry --- drivers/iommu/arm-smmu-v3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index f578677a5c41..a8e814c652fe 100644 --- a/drivers/iommu/arm-

[PATCH RFC v2 2/4] iommu/arm-smmu-v3: Calculate bits for prod and owner

atch - 1 x CMD_SYNC and at least 1 x other. Ignoring limits of HW max_n_shift and HW cmdq memory allocation, approx 16K is the max supported CPUs. For this, max_n_shift would be 14. Signed-off-by: John Garry --- drivers/iommu/arm-smmu-v3.c | 41 - 1 file c

[PATCH RFC v2 0/4] iommu/arm-smmu-v3: Improve cmdq lock efficiency

...@dggemi525-mbs.china.huawei.com/T/#ma02e301c38c3e94b7725e685757c27e39c7cbde3 John Garry (4): iommu/arm-smmu-v3: Fix trivial typo iommu/arm-smmu-v3: Calculate bits for prod and owner iommu/arm-smmu-v3: Always issue a CMD_SYNC per batch iommu/arm-smmu-v3: Remove cmpxchg

Re: [PATCH 2/2] perf pmu: Improve CPU core PMU HW event list ordering

On 15/06/2020 15:36, Namhyung Kim wrote:>> static int cmp_sevent(const void *a, const void *b) @@ -1416,6 +1417,12 @@ static int cmp_sevent(const void *a, const void *b) if (n) return n; } + + if (as->is_cpu && !bs->is_cpu) +

Re: arm64 iommu groups issue

On 12/06/2020 15:30, Lorenzo Pieralisi wrote: On Mon, Feb 17, 2020 at 12:08:48PM +, John Garry wrote: Right, and even worse is that it relies on the port driver even existing at all. All this iommu group assignment should be taken outside device driver probe paths. However we could still

Re: arm64 build issue and mainline crash (was Re: linux-next: Tree for Jun 3)

In addition, the reason I was testing this was because Linus' master (d6f9469a03d8 Merge tag 'erofs-for-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs) was crashing: [ 5.368948] loop: module loaded [ 5.372113] Unable to handle kernel paging request at virtual address

Re: [PATCH 1/1] blk-mq: get ctx in order to handle BLK_MQ_S_INACTIVE in blk_mq_get_tag()

On 02/06/2020 07:17, Dongli Zhang wrote: When scheduler is set, we hit below page fault when we offline cpu. [ 1061.007725] BUG: kernel NULL pointer dereference, address: 0040 [ 1061.008710] #PF: supervisor read access in kernel mode [ 1061.009492] #PF: error_code(0x) -

arm64 build issue and mainline crash (was Re: linux-next: Tree for Jun 3)

On 03/06/2020 12:06, Stephen Rothwell wrote: JFYI, I am finding the vanilla defconfig build broken for arm64: LD vmlinux.o /home/john/gcc-linaro-7.5.0-2019.12-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu-ld: cannot find ./drivers/firmware/efi/libstub/lib.abuilt-in.a: No such file

Re: [PATCH v3] libata: Use per port sync for detach

etach") BugLink: https://bugs.launchpad.net/bugs/1867983 Suggested-by: John Garry Signed-off-by: Kai-Heng Feng thanks, Tested-by: John Garry --- v3: - Move the comment to properly align with the code. v2: - Sync up to cookie + 1. - Squash the synchronization into the same loop.

Re: [PATCH V1 RESEND 1/3] perf/imx_ddr: Add system PMU identifier for userspace

I also really dislike this. What's the preferred way to identify the SoC from userspace? /proc/cpuinfo? ;) The *SoC*! For an non-firmware specific case, I'd say soc_device should be. I'd guess ACPI systems don't use it and for them it's dmidecode typically. The other problem I have with

[PATCH] blk-mq: Explicitly zero-init blk_mq_tags.active_queues

As is good practice, explicitly zero-init atomic_t type blk_mq_tags.active_queues. Signed-off-by: John Garry diff --git a/block/blk-mq-tag.c b/block/blk-mq-tag.c index 586c9d6e904a..cbbd0af9f3b0 100644 --- a/block/blk-mq-tag.c +++ b/block/blk-mq-tag.c @@ -469,6 +469,7 @@ struct blk_mq_tags

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