Hi Cong,
On 01/07/2020 21:58, Cong Wang wrote:
On Wed, Jul 1, 2020 at 9:05 AM Cong Wang wrote:
On Tue, Jun 30, 2020 at 2:08 PM Josh Hunt wrote:
Do either of you know if there's been any development on a fix for this
issue? If not we can propose something.
If you have a reproducer, I can
On 30/06/2020 21:14, Josh Hunt wrote:
On 6/23/20 6:42 AM, Michael Zhivich wrote:
From: Jonas Bonn
To: Paolo Abeni ,
"net...@vger.kernel.org" ,
LKML ,
"David S . Miller" ,
John Fastabend
Subject: Re: Packet gets stuck in NOLOCK pfifo_fast qdisc
Date: Fr
Hi Paolo,
On 09/10/2019 21:14, Paolo Abeni wrote:
Something alike the following code - completely untested - can possibly
address the issue, but it's a bit rough and I would prefer not adding
additonal complexity to the lockless qdiscs, can you please have a spin
a it?
We've tested a couple
Hi Paolo,
On 09/10/2019 21:14, Paolo Abeni wrote:
On Wed, 2019-10-09 at 08:46 +0200, Jonas Bonn wrote:
Hi,
The lockless pfifo_fast qdisc has an issue with packets getting stuck in
the queue. What appears to happen is:
i) Thread 1 holds the 'seqlock' on the qdisc and dequeues packets.
ii
Hi,
The lockless pfifo_fast qdisc has an issue with packets getting stuck in
the queue. What appears to happen is:
i) Thread 1 holds the 'seqlock' on the qdisc and dequeues packets.
ii) Thread 1 dequeues the last packet in the queue.
iii) Thread 1 iterates through the qdisc->dequeue
On 13/06/2019 16:13, Maxim Mikityanskiy wrote:
On 2019-06-13 09:45, Jonas Bonn wrote:
Hi Max,
On 12/06/2019 12:42, Maxim Mikityanskiy wrote:
On 2019-06-11 13:03, Jonas Bonn wrote:
Patch 7dc2bccab0ee37ac28096b8fcdc390a679a15841 introduces a regression
with systemd 241. In that revision
Hi Max,
On 12/06/2019 12:42, Maxim Mikityanskiy wrote:
On 2019-06-11 13:03, Jonas Bonn wrote:
Patch 7dc2bccab0ee37ac28096b8fcdc390a679a15841 introduces a regression
with systemd 241. In that revision, systemd-networkd fails to pass the
required flags early enough. This appears
as intended and
thereby with a warning in the kernel log.
CC: Maxim Mikityanskiy
CC: David S. Miller
CC: Alexey Kuznetsov
CC: Hideaki YOSHIFUJI
Signed-off-by: Jonas Bonn
---
net/ipv6/addrconf.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/net/ipv6/addrconf.c b/net/ipv6
This patch is compile-tested only. I don't have the flash, I need your
help for testing this.
Tested this on my hardware. It works fine in the non-quad case.
Tested-by: Jonas Bonn
/Jonas
Thanks,
ta
drivers/mtd/spi-nor/spi-nor.c | 116 ++
include/linux/mtd
This patch series hooks up proper support for USB suspend and resume to the
Atmel UDC.
Jonas Bonn (3):
usb: gadget: atmel_usba_udc: simplify setting of interrupt-enabled
mask
usb: gadget: atmel: support USB suspend
usb: gadget: atmel: tie wake lock to running clock
drivers/usb/gadget
This patch adds set and clear functions for enabling/disabling
interrupts. This simplifies the implementation a bit as the masking of
previously set bits doesn't need to be so explicit.
Signed-off-by: Jonas Bonn
CC: Cristian Birsan
CC: Felipe Balbi
CC: Greg Kroah-Hartman
CC: Nicolas Ferre
d: in
both these states, the clock is stopped. As such, this patch associates
a "wake lock" with the running clock of the UDC to keep the system awake
as long as the host maintains the USB connection active.
Signed-off-by: Jonas Bonn
CC: Cristian Birsan
CC: Felipe Balbi
CC: Greg Kroah-
g for a wake-up.
This has been tested on a SAMA5D2 board.
Signed-off-by: Jonas Bonn
CC: Cristian Birsan
CC: Felipe Balbi
CC: Greg Kroah-Hartman
CC: Nicolas Ferre
CC: Alexandre Belloni
CC: Ludovic Desroches
CC: linux-arm-ker...@lists.infradead.org
CC: linux-...@vger.kernel.org
---
drivers/u
.
Signed-off-by: Jonas Bonn
CC: Mark Brown
CC: Rob Herring
CC: Mark Rutland
CC: linux-...@vger.kernel.org
CC: devicet...@vger.kernel.org
---
drivers/spi/spi.c | 5 +
include/linux/spi/spi.h | 6 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
at the
SPI controller's lowest available clock frequency. I have such a
configuration where an AVR-based SPI slave is unable to feed the SPI bus
fast enough even the SPI master runs at the lowest possible clock speed.
Jonas Bonn (2):
spi: support inter-word delay requirement for devices
spi
If the SPI slave requires an inter-word delay, configure the DLYBCT
register accordingly.
Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
board).
Signed-off-by: Jonas Bonn
Acked-by: Nicolas Ferre
CC: Nicolas Ferre
CC: Mark Brown
CC: Alexandre Belloni
CC: Ludovic Desroches
Hi Geert,
On 30/01/2019 08:35, Geert Uytterhoeven wrote:
Hi Jonas,
On Tue, Jan 29, 2019 at 9:55 PM Jonas Bonn wrote:
Some devices are slow and cannot keep up with the SPI bus and therefore
require a short delay between words of the SPI transfer.
The example of this that I'm looking
If the SPI slave requires an inter-word delay, configure the DLYBCT
register accordingly.
Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
board).
Signed-off-by: Jonas Bonn
CC: Nicolas Ferre
CC: Mark Brown
CC: Alexandre Belloni
CC: Ludovic Desroches
CC: linux
fast enough even the SPI master runs at the lowest possible clock speed.
Jonas Bonn (2):
spi: support inter-word delay requirement for devices
spi-atmel: support inter-word delay
drivers/spi/spi-atmel.c | 11 ++-
drivers/spi/spi.c | 5 +
include/linux/spi/spi.h | 6 ++
3
.
Signed-off-by: Jonas Bonn
CC: Mark Brown
CC: Rob Herring
CC: Mark Rutland
CC: linux-...@vger.kernel.org
CC: devicet...@vger.kernel.org
---
drivers/spi/spi.c | 5 +
include/linux/spi/spi.h | 6 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
Hi,
On 29/01/2019 15:27, nicolas.fe...@microchip.com wrote:
On 29/01/2019 at 09:38, Jonas Bonn wrote:
+ /* DLYBCT adds delays between words. This is useful for slow devices
+* that need a bit of time to setup the next transfer.
+*/
+ if (spi->word_delay
On 29/01/2019 10:35, Baolin Wang wrote:
On Tue, 29 Jan 2019 at 17:14, Jonas Bonn wrote:
On 29/01/2019 10:04, Baolin Wang wrote:
Hi Jonas,
On Tue, 29 Jan 2019 at 05:28, Jonas Bonn wrote:
Hi,
On 28/01/2019 19:10, Mark Brown wrote:
On Sat, Jan 26, 2019 at 05:32:19PM +0100, Jonas Bonn
On 29/01/2019 10:04, Baolin Wang wrote:
Hi Jonas,
On Tue, 29 Jan 2019 at 05:28, Jonas Bonn wrote:
Hi,
On 28/01/2019 19:10, Mark Brown wrote:
On Sat, Jan 26, 2019 at 05:32:19PM +0100, Jonas Bonn wrote:
@@ -164,6 +166,7 @@ struct spi_device {
charmodalias
If the SPI slave requires an inter-word delay, configure the DLYBCT
register accordingly.
Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
board).
Signed-off-by: Jonas Bonn
CC: Nicolas Ferre
CC: Mark Brown
CC: Alexandre Belloni
CC: Ludovic Desroches
CC: linux
SPI slaves are so slow that they are unable to keep up even at the
SPI controller's lowest available clock frequency. I have such a
configuration where an AVR-based SPI slave is unable to feed the SPI bus
fast enough even the SPI master runs at the lowest possible clock speed.
Jonas Bonn (2):
spi
.
Signed-off-by: Jonas Bonn
CC: Mark Brown
CC: Rob Herring
CC: Mark Rutland
CC: linux-...@vger.kernel.org
CC: devicet...@vger.kernel.org
---
drivers/spi/spi.c | 5 +
include/linux/spi/spi.h | 6 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
Hi,
On 28/01/2019 19:10, Mark Brown wrote:
On Sat, Jan 26, 2019 at 05:32:19PM +0100, Jonas Bonn wrote:
@@ -164,6 +166,7 @@ struct spi_device {
charmodalias[SPI_NAME_SIZE];
const char *driver_override;
int cs_gpio
On 28/01/2019 12:47, Mark Brown wrote:
On Mon, Jan 28, 2019 at 08:41:05AM +0100, Geert Uytterhoeven wrote:
On Sat, Jan 26, 2019 at 4:40 PM Jonas Bonn wrote:
spi-3wire: again, only set by MAXIM DS-1302 which always needs this
setting; driver could set this
For DS1302, this is probable
If the SPI slave requires an inter-word delay, configure the DLYBCT
register accordingly.
Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
board).
Signed-off-by: Jonas Bonn
CC: Nicolas Ferre
CC: Mark Brown
CC: Alexandre Belloni
CC: Ludovic Desroches
CC: linux
enough to keep up with the SoC's SPI controller
even at the lowest bus speed.
This patch introduces the ability to specify a required inter-word
delay for SPI devices. It is up to the controller driver to configure
itself accordingly in order to introduce the requested delay.
Signed-off-by: Jonas
.
Jonas Bonn (2):
spi: support inter-word delay requirement for devices
spi-atmel: support inter-word delay
drivers/spi/spi-atmel.c | 18 +-
include/linux/spi/spi.h | 3 +++
2 files changed, 16 insertions(+), 5 deletions(-)
--
2.19.1
Hi Geert,
On 26/01/2019 11:25, Geert Uytterhoeven wrote:
Hi Jonas,
On Sat, Jan 26, 2019 at 8:53 AM Jonas Bonn wrote:
On 25/01/2019 18:50, Mark Brown wrote:
On Fri, Jan 25, 2019 at 05:47:13PM +, Mark Brown wrote:
On Fri, Jan 25, 2019 at 01:06:45PM +0100, Jonas Bonn wrote:
Having
On 25/01/2019 18:50, Mark Brown wrote:
On Fri, Jan 25, 2019 at 05:47:13PM +, Mark Brown wrote:
On Fri, Jan 25, 2019 at 01:06:45PM +0100, Jonas Bonn wrote:
Having this as device property rather than a transfer property allows this
to be configured one time in setup() rather than having
rrevocable! Whether or not this actually belongs in the
mainline kernel is therefore up for debate...
Signed-off-by: Jonas Bonn
CC: Marek Vasut
CC: David Woodhouse
CC: Brian Norris
CC: Boris Brezillon
CC: Richard Weinberger
CC: linux-...@lists.infradead.org
---
drivers/mtd/mtdchar.c
If the SPI slave requires an inter-word delay, configure the DLYBCT
register accordingly.
Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
board).
Signed-off-by: Jonas Bonn
CC: Nicolas Ferre
CC: Mark Brown
CC: Alexandre Belloni
CC: Ludovic Desroches
CC: linux
SPI slaves are so slow that they are unable to keep up even at the
SPI controller's lowest available clock frequency. I have such a
configuration where an AVR-based SPI slave is unable to feed the SPI bus
fast enough even the SPI master runs at the lowest possible clock speed.
Jonas Bonn (2):
spi
enough to keep up with the SoC's SPI controller
even at the lowest bus speed.
This patch introduces the ability to specify a required inter-word
delay for SPI devices. It is up to the controller driver to configure
itself accordingly in order to introduce the requested delay.
Signed-off-by: Jonas
Hi,
On 25/01/2019 12:53, Baolin Wang wrote:
Hi,
On Fri, 25 Jan 2019 at 19:44, Jonas Bonn wrote:
Some devices are slow and cannot keep up with the SPI bus and therefore
require a short delay between words of the SPI transfer.
The example of this that I'm looking at is a SAMA5D2
On 25/01/2019 12:44, Jonas Bonn wrote:
If the SPI slave requires an inter-word delay, configure the DLYBCT
register accordingly.
Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
board).
Signed-off-by: Jonas Bonn
CC: Nicolas Ferre
CC: Mark Brown
CC: Alexandre Belloni
CC
enough to keep up with the SoC's SPI controller
even at the lowest bus speed.
This patch introduces the ability to specify a required inter-word
delay for SPI devices. It is up to the controller driver to configure
itself accordingly in order to introduce the requested delay.
Signed-off-by: Jonas
If the SPI slave requires an inter-word delay, configure the DLYBCT
register accordingly.
Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
board).
Signed-off-by: Jonas Bonn
CC: Nicolas Ferre
CC: Mark Brown
CC: Alexandre Belloni
CC: Ludovic Desroches
CC: linux
is unable to feed the SPI bus
fast enough even the SPI master runs at the lowest possible clock speed.
Jonas Bonn (2):
spi: support inter-word delay requirement for devices
spi-atmel: support inter-word delay
Documentation/devicetree/bindings/spi/spi-bus.txt | 1 +
drivers/spi/spi-atmel.c
Both the BP0-2 bits and the TBPROT bit are supported on this chip.
Signed-off-by: Jonas Bonn
CC: Marek Vasut
CC: David Woodhouse
CC: Brian Norris
CC: Boris Brezillon
CC: Richard Weinberger
CC: linux-...@lists.infradead.org
---
drivers/mtd/spi-nor/spi-nor.c | 2 +-
1 file changed, 1
# normally won't even have
it connected.
Tested on a Cypress s25fl512s. With this patch, the WP# is always
respected, irregardless of whether any flash protection bits are set.
Signed-off-by: Jonas Bonn
CC: Marek Vasut
CC: David Woodhouse
CC: Brian Norris
CC: Boris Brezillon
CC: Richard
Hi,
On 05/11/2018 14:21, Greg KH wrote:
On Mon, Nov 05, 2018 at 11:35:57AM +0100, Jonas Bonn wrote:
Hi,
I have a question about the ordering of uevents, specifically concerning
complex USB devices that present multiple interfaces/functions.
Before KOBJ_BIND, a USB device would typically
Hi,
On 05/11/2018 14:21, Greg KH wrote:
On Mon, Nov 05, 2018 at 11:35:57AM +0100, Jonas Bonn wrote:
Hi,
I have a question about the ordering of uevents, specifically concerning
complex USB devices that present multiple interfaces/functions.
Before KOBJ_BIND, a USB device would typically
Hi,
I have a question about the ordering of uevents, specifically concerning
complex USB devices that present multiple interfaces/functions.
Before KOBJ_BIND, a USB device would typically present itself as:
add usb_device
add usb_interface-1
add subsystem-device-1.0
add subsystem-device-1.1
Hi,
I have a question about the ordering of uevents, specifically concerning
complex USB devices that present multiple interfaces/functions.
Before KOBJ_BIND, a USB device would typically present itself as:
add usb_device
add usb_interface-1
add subsystem-device-1.0
add subsystem-device-1.1
On 01/17/2018 11:34 PM, Daniel Wagner wrote:
On 01/17/2018 11:20 PM, Hauke Mehrtens wrote:
Do we want to do any changes to the kernel header files? I do not know
of any clean workaround to make this work, we can probably hack
something for connman, but I think it is not worth the trouble.
On 01/17/2018 11:34 PM, Daniel Wagner wrote:
On 01/17/2018 11:20 PM, Hauke Mehrtens wrote:
Do we want to do any changes to the kernel header files? I do not know
of any clean workaround to make this work, we can probably hack
something for connman, but I think it is not worth the trouble.
On 01/17/2018 08:59 AM, Daniel Wagner wrote:
Hi Neil,
On 01/16/2018 07:51 PM, Neil MacLeod wrote:
Since this commit in 4.15-rc8:
https://github.com/torvalds/linux/commit/6926e041a8920c8ec27e4e155efa760aa01551fd
building connman 1.35 with glibc 2.26 now fails as follows:
http://ix.io/EbP
On 01/17/2018 08:59 AM, Daniel Wagner wrote:
Hi Neil,
On 01/16/2018 07:51 PM, Neil MacLeod wrote:
Since this commit in 4.15-rc8:
https://github.com/torvalds/linux/commit/6926e041a8920c8ec27e4e155efa760aa01551fd
building connman 1.35 with glibc 2.26 now fails as follows:
http://ix.io/EbP
On 02/24/2017 11:54 AM, Stefan Kristiansson wrote:
eOn Fri, Feb 24, 2017 at 10:57:19AM +0100, Jonas Bonn wrote:
On 02/24/2017 05:32 AM, Stafford Horne wrote:
From: Stefan Kristiansson <stefan.kristians...@saunalahti.fi>
This brings it inline with the other setup oprations done like the
On 02/24/2017 11:54 AM, Stefan Kristiansson wrote:
eOn Fri, Feb 24, 2017 at 10:57:19AM +0100, Jonas Bonn wrote:
On 02/24/2017 05:32 AM, Stafford Horne wrote:
From: Stefan Kristiansson
This brings it inline with the other setup oprations done like the cache
enables _ic_enable and _dc_enable
On 02/24/2017 05:32 AM, Stafford Horne wrote:
Originally openrisc spec 0 specified that r0 would be wired to ground.
This is no longer the case. r0 is not guaranteed to be 0 at init, so we
need to initialize it to 0 before using it.
Also, if we are clearing r0 we cant use r0 to clear itself.
On 02/24/2017 05:32 AM, Stafford Horne wrote:
Originally openrisc spec 0 specified that r0 would be wired to ground.
This is no longer the case. r0 is not guaranteed to be 0 at init, so we
need to initialize it to 0 before using it.
Also, if we are clearing r0 we cant use r0 to clear itself.
On 02/24/2017 05:32 AM, Stafford Horne wrote:
From: Stefan Kristiansson
This brings it inline with the other setup oprations done like the cache
enables _ic_enable and _dc_enable. Also, this is going to make it
easier to initialize additional cpu's when smp
On 02/24/2017 05:32 AM, Stafford Horne wrote:
From: Stefan Kristiansson
This brings it inline with the other setup oprations done like the cache
enables _ic_enable and _dc_enable. Also, this is going to make it
easier to initialize additional cpu's when smp is introduced.
This patch
On 02/24/2017 05:32 AM, Stafford Horne wrote:
Use execption SR stored in pt_regs for detection, the current SR is not
correct as the handler is running after return from exception.
Also, The code that checks for a delay slot uses a flag bitmask and then
wants to check if the result is not zero.
On 02/24/2017 05:32 AM, Stafford Horne wrote:
Use execption SR stored in pt_regs for detection, the current SR is not
correct as the handler is running after return from exception.
Also, The code that checks for a delay slot uses a flag bitmask and then
wants to check if the result is not zero.
On 02/24/2017 05:32 AM, Stafford Horne wrote:
The strings used during the head/init phase of openrisc bootup were
stored in the executable section of the binary.
This causes compilation to fail when using CONFIG_DEBUG_INFO with
error:
Error: unaligned opcodes detected in executable segment
On 02/24/2017 05:32 AM, Stafford Horne wrote:
The strings used during the head/init phase of openrisc bootup were
stored in the executable section of the binary.
This causes compilation to fail when using CONFIG_DEBUG_INFO with
error:
Error: unaligned opcodes detected in executable segment
Hi Stafford,
Squash this patch into the memcpy patch in order to prevent surprises
for anyone doing a git bisection through here.
/Jonas
On 02/24/2017 05:32 AM, Stafford Horne wrote:
From: Valentin Rothberg
The Kconfig option for OR12000 is OR1K_1200.
Hi Stafford,
Squash this patch into the memcpy patch in order to prevent surprises
for anyone doing a git bisection through here.
/Jonas
On 02/24/2017 05:32 AM, Stafford Horne wrote:
From: Valentin Rothberg
The Kconfig option for OR12000 is OR1K_1200.
Signed-off-by: Valentin Rothberg
On 02/24/2017 05:32 AM, Stafford Horne wrote:
From: Stefan Kristiansson
This adds an emulation layer for implementations
that lack the l.lwa and l.swa instructions.
It handles these instructions both in kernel space and
user space.
Signed-off-by: Stefan
On 02/24/2017 05:32 AM, Stafford Horne wrote:
From: Stefan Kristiansson
This adds an emulation layer for implementations
that lack the l.lwa and l.swa instructions.
It handles these instructions both in kernel space and
user space.
Signed-off-by: Stefan Kristiansson
[sho...@gmail.com: Added
On 02/24/2017 05:32 AM, Stafford Horne wrote:
Cleanups to whitespace and add some comments. Reading through the delay
slot logic I noticed some things:
- Delay slot instructions were not indented
- Some comments are not lined up
- Use tabs and spaces consistent with other code
No
On 02/24/2017 05:32 AM, Stafford Horne wrote:
Cleanups to whitespace and add some comments. Reading through the delay
slot logic I noticed some things:
- Delay slot instructions were not indented
- Some comments are not lined up
- Use tabs and spaces consistent with other code
No
On 12/31/2016 11:50 PM, Stafford Horne wrote:
Hi Jonas,
On Sat, Dec 31, 2016 at 03:10:37PM +0100, Jonas Bonn wrote:
Hi Stafford,
Post-merge window patches should be bug fixes, only. Patch 1/3 probably
qualifies, but the others are far too trivial to be pushing now. Just put
them on your
On 12/31/2016 11:50 PM, Stafford Horne wrote:
Hi Jonas,
On Sat, Dec 31, 2016 at 03:10:37PM +0100, Jonas Bonn wrote:
Hi Stafford,
Post-merge window patches should be bug fixes, only. Patch 1/3 probably
qualifies, but the others are far too trivial to be pushing now. Just put
them on your
Hi Stafford,
On 12/31/2016 12:52 PM, Stafford Horne wrote:
Hello,
These are a few small changes for openrisc I would like to include in 4.10.
The main change is a fix for building with alldefconfig to properly setup
then _text symbol. Others are trivial.
If no complaints I will push to 4.10
architecture fixes this.
Signed-off-by: Stafford Horne <sho...@gmail.com>
Acked-by: Jonas Bonn <jo...@southpole.se>
---
arch/openrisc/kernel/vmlinux.lds.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/openrisc/kernel/vmlinux.lds.S
b/arch/openrisc/kernel/vmlinux.lds.S
i
Hi Stafford,
On 12/31/2016 12:52 PM, Stafford Horne wrote:
Hello,
These are a few small changes for openrisc I would like to include in 4.10.
The main change is a fix for building with alldefconfig to properly setup
then _text symbol. Others are trivial.
If no complaints I will push to 4.10
architecture fixes this.
Signed-off-by: Stafford Horne
Acked-by: Jonas Bonn
---
arch/openrisc/kernel/vmlinux.lds.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/openrisc/kernel/vmlinux.lds.S
b/arch/openrisc/kernel/vmlinux.lds.S
index ef31fc2..5525446 100644
--- a/arch/openrisc
NAK... this breaks other architectures.
The OpenRISC toolchain is broken with regard to this issue. Five years
ago (last I looked) nobody seemed interesting in fixing it. Has anything
changed here?
/Jonas
On 09/16/2016 04:42 PM, Stafford Horne wrote:
..From: Jonas Bonn <jo...@southpole
tafford Horne <sho...@gmail.com>
Acked-by: Jonas Bonn <jo...@southpole.se>
---
arch/openrisc/include/asm/pgtable.h | 2 +-
arch/openrisc/mm/init.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/openrisc/include/asm/pgtable.h
b/arch/openri
On 09/16/2016 04:43 PM, Stafford Horne wrote:
From: Christian Svensson
Historically OpenRISC GCC has reserved r10 which we now use to hold
the thread pointer for thread-local storage (TLS).
I know this was proposed by way of this patch, but we deferred accepting
this until the
NAK... this breaks other architectures.
The OpenRISC toolchain is broken with regard to this issue. Five years
ago (last I looked) nobody seemed interesting in fixing it. Has anything
changed here?
/Jonas
On 09/16/2016 04:42 PM, Stafford Horne wrote:
..From: Jonas Bonn
The syscall
define unveiled a bug in map_ram(),
where PTRS_PER_PGD was used when the intent was to iterate
over a set of page table entries.
This patch corrects that issue as well.
Signed-off-by: Stefan Kristiansson
Signed-off-by: Stafford Horne
Acked-by: Jonas Bonn
---
arch/openrisc/include/asm/pgtable
On 09/16/2016 04:43 PM, Stafford Horne wrote:
From: Christian Svensson
Historically OpenRISC GCC has reserved r10 which we now use to hold
the thread pointer for thread-local storage (TLS).
I know this was proposed by way of this patch, but we deferred accepting
this until the OpenRISC spec
On 09/16/2016 04:43 PM, Stafford Horne wrote:
From: Jonas Bonn <jo...@southpole.se>
Return to userspace via _resume_userspace instead of via syscall return
path for the rt_sigreturn syscall.
I'll rework this comment more later, but this patch needs testing.
This whole patch was re
On 09/16/2016 04:43 PM, Stafford Horne wrote:
From: Jonas Bonn
Return to userspace via _resume_userspace instead of via syscall return
path for the rt_sigreturn syscall.
I'll rework this comment more later, but this patch needs testing.
This whole patch was reworked later... what happened
On 09/18/2016 05:22 PM, Guenter Roeck wrote:
On Wed, Apr 06, 2016 at 07:08:41PM +0900, Stafford Horne wrote:
Clearing out one todo item. This simplifies the boot process by using
the memblock api throughout the init process.
The old logic bootstrapped from memblock -> bootmem -> buddy
On 09/18/2016 05:22 PM, Guenter Roeck wrote:
On Wed, Apr 06, 2016 at 07:08:41PM +0900, Stafford Horne wrote:
Clearing out one todo item. This simplifies the boot process by using
the memblock api throughout the init process.
The old logic bootstrapped from memblock -> bootmem -> buddy
ould be to mark it as Orphaned. Which, for
all > practical purpose,
> would be the correct state right now.
+CC The openrisc list
Understood, I don't think we would want that to happen.
Look at the entry today:
OPENRISC ARCHITECTURE
M: Jonas Bonn <jo...@southpole.se>
W: ht
ich, for
all > practical purpose,
> would be the correct state right now.
+CC The openrisc list
Understood, I don't think we would want that to happen.
Look at the entry today:
OPENRISC ARCHITECTURE
M: Jonas Bonn
W: http://openrisc.net
S: Maintained
T: git git:
r...@kernel.org>
Cc: Jonas Bonn <jo...@southpole.se>
Signed-off-by: Stafford Horne <sho...@gmail.com>
Yes, this is fine, but trivial/generic stuff like this doesn't really
need to go via the OpenRISC repo, anyway.
/Jonas
---
arch/openrisc/kernel/setup.c | 10 --
1 file ch
. The default version will also descend nodes in the
match table such as "simple-bus" which should be fine as openrisc
doesn't have any of these (though it is preferred that memory-mapped
peripherals be grouped under a bus node(s)).
Signed-off-by: Rob Herring
Cc: Jonas Bonn
Signed-off-by
On 09/16/2016 04:43 PM, Stafford Horne wrote:
From: Stefan Kristiansson
OpenRISC was not an SMP architecture last I looked... did the relevant
spec updates get made? If not, NAK.
The issue is, the OpenRISC architecture shouldn't be a moving target
On 09/16/2016 04:43 PM, Stafford Horne wrote:
From: Stefan Kristiansson
OpenRISC was not an SMP architecture last I looked... did the relevant
spec updates get made? If not, NAK.
The issue is, the OpenRISC architecture shouldn't be a moving target
defined by what the kernel supports...
: ONESHOT_STOPPED.
We weren't doing anything in the ->set_mode() callback. So, this patch
doesn't provide any set-state callbacks.
Cc: Jonas Bonn
Cc: li...@lists.openrisc.net
Signed-off-by: Viresh Kumar
Acked-by: Jonas Bonn
/Jonas
--
To unsubscribe from this list: send the line "unsubscribe linu
: ONESHOT_STOPPED.
We weren't doing anything in the -set_mode() callback. So, this patch
doesn't provide any set-state callbacks.
Cc: Jonas Bonn jo...@southpole.se
Cc: li...@lists.openrisc.net
Signed-off-by: Viresh Kumar viresh.ku...@linaro.org
Acked-by: Jonas Bonn jo...@southpole.se
/Jonas
--
To unsubscribe
e to apply. You can put my Acked-by: Jonas
Bonn on it. Unfortunately, I'm not currently in a
position to do anything meaningful with it, so please send it upstream
directly via Andrew Morton's collection of assorted patches.
/Jonas
Thanks,
Paul Bolle
--
To unsubscribe from this
. You can put my Acked-by: Jonas
Bonn jo...@southpole.se on it. Unfortunately, I'm not currently in a
position to do anything meaningful with it, so please send it upstream
directly via Andrew Morton's collection of assorted patches.
/Jonas
Thanks,
Paul Bolle
--
To unsubscribe from
--
Sent from my Android phone with K-9 Mail. Please excuse my brevity.
On September 26, 2014 8:08:13 PM CEST, Guenter Roeck wrote:
>On Fri, Sep 26, 2014 at 01:53:01PM -0400, Eric Paris wrote:
>> Would you like me to carry this in the audit tree, since I'm the one
>who
>> broke it?
>>
>Hi
On 09/26/2014 06:05 PM, Guenter Roeck wrote:
> openrisc:defconfig fails to build in next-20140926 with the following error.
>
> In file included from arch/openrisc/kernel/signal.c:31:0:
> ./arch/openrisc/include/asm/syscall.h: In function 'syscall_get_arch':
>
On 09/26/2014 03:54 PM, Guenter Roeck wrote:
> openrisc:defconfig fails to build in next-20140926 with the following error.
>
> In file included from arch/openrisc/kernel/signal.c:31:0:
> ./arch/openrisc/include/asm/syscall.h: In function 'syscall_get_arch':
>
On 09/26/2014 03:54 PM, Guenter Roeck wrote:
openrisc:defconfig fails to build in next-20140926 with the following error.
In file included from arch/openrisc/kernel/signal.c:31:0:
./arch/openrisc/include/asm/syscall.h: In function 'syscall_get_arch':
On 09/26/2014 06:05 PM, Guenter Roeck wrote:
openrisc:defconfig fails to build in next-20140926 with the following error.
In file included from arch/openrisc/kernel/signal.c:31:0:
./arch/openrisc/include/asm/syscall.h: In function 'syscall_get_arch':
--
Sent from my Android phone with K-9 Mail. Please excuse my brevity.
On September 26, 2014 8:08:13 PM CEST, Guenter Roeck li...@roeck-us.net wrote:
On Fri, Sep 26, 2014 at 01:53:01PM -0400, Eric Paris wrote:
Would you like me to carry this in the audit tree, since I'm the one
who
broke it?
1 - 100 of 285 matches
Mail list logo