implement the
device_synchronize dma engine function, which simply waits for the
worker to finish its execution.
Signed-off-by: Lucas Stach
---
v2: Keep vchan_get_all_descriptors in the terminate_all call, so the
worker doesn't corrupt the next transfer if that's already in
it only allocates memory for a single descriptor, without looking at the
number of descriptors required for the transfer, leading to out-of-bounds
accesses when the descriptors are written.
Signed-off-by: Lucas Stach
---
drivers/dma/imx-sdma.c | 18 ++
1 file changed, 6 insertions
DMA buffer descriptors aren't allocated from atomic context, so they
can use the less heavyweigth GFP_NOWAIT.
Signed-off-by: Lucas Stach
---
drivers/dma/imx-sdma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
Am Dienstag, den 11.09.2018, 07:31 -0700 schrieb jun qian:
> As you are already in ISR, it is unnecessary to call
> spin_lock_irqsave.
As the IRQ in this driver isn't marked with IRQF_NO_THREAD, this is
going to blow up if the kernel is booted with the "threadirqs" command
line argument.
Regards,
Am Montag, den 06.08.2018, 02:34 + schrieb Robin Gong:
> > > > Not all boards follow the reference design, that's a fact of
> > > > life.
> > > >
> > > > Please look at the i.MX6Q reference manual. The sequence
> > > > implemented
> > > > in this patchset can be found as a valid way to power o
Hi Vinod, hi Robin,
this patch is already in your slave-dma tree, but upon closer
inspection this is totally doing the wrong thing and should be dropped,
see inline comments. The patchset in your tree will regress without
this patch, though. So I think we need to delay getting this set
upstream un
driver. Adding hacks, which are
abusing the API, to cram a dma_pool into the sdma driver is not a valid
way to implement things for upstream.
Regards,
Lucas
> > -Original Message-
> > From: Robin Gong
> > Sent: 2018年7月25日 9:25
> > To: 'Lucas Stach'
Hi Robin,
Am Freitag, den 27.07.2018, 01:51 + schrieb Robin Gong:
[...]
> > > > ---
> > > > Documentation/devicetree/bindings/clock/imx6q-clock.txt | 8
> > > > 1 file changed, 8 insertions(+)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt
> > >
x7d implemention using reset
> controls and power domains.
>
> Signed-off-by: Leonard Crestez
Reviewed-by: Lucas Stach
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 97 +--
> 1 file changed, 92 insertions(+), 5 deletions(-)
>
> diff --git a/dr
nally.
>
> Signed-off-by: Leonard Crestez
Acked-by: Lucas Stach
> ---
> arch/arm/boot/dts/imx7d.dtsi | 12
> 1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
> index 7cbc2ffa4b3a.
Am Dienstag, den 24.07.2018, 12:04 + schrieb Leonard Crestez:
> On Tue, 2018-07-24 at 12:09 +0200, Lucas Stach wrote:
> > Am Montag, den 23.07.2018, 12:37 + schrieb Leonard Crestez:
> > > On Mon, 2018-07-23 at 11:38 +0200, Lucas Stach wrote:
> > > > Am Freita
Am Montag, den 23.07.2018, 12:37 + schrieb Leonard Crestez:
> On Mon, 2018-07-23 at 11:38 +0200, Lucas Stach wrote:
> > Hi Leonard,
> >
> > Am Freitag, den 20.07.2018, 15:47 +0300 schrieb Leonard Crestez:
> > > On imx7d the pcie-phy power domain is turn
Am Montag, den 23.07.2018, 13:55 + schrieb Robin Gong:
> > -Original Message-
> > From: Lucas Stach [mailto:l.st...@pengutronix.de]
> > Sent: 2018年7月23日 18:54
> > To: Robin Gong ; vk...@kernel.org;
> > dan.j.willi...@intel.com; s.ha...@pengutronix.de; li.
Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> If multi-bds used in one transfer, all bds should be consisten
> memory.To easily follow it, enlarge the dma pool size into 20 bds,
> and it will report error if the number of bds is over than 20. For
> dmatest, the max count for single
HSICPHY the bits are explicitly
> documented as "1 means assert, 0 means deassert".
>
> The values are still reversed for IMX7_RESET_PCIE_CTRL_APPS_EN.
>
> > Signed-off-by: Leonard Crestez
> > Reviewed-by: Lucas Stach
> ---
> drivers/reset/reset-imx7.c | 2 +-
>
Hi Leonard,
Am Freitag, den 20.07.2018, 15:47 +0300 schrieb Leonard Crestez:
> On imx7d the pcie-phy power domain is turned off in suspend and this can
> make the system hang after resume when attempting any read from PCI.
>
> Fix this by adding minimal suspend/resume code from the nxp internal
>
; the domain is unused and get -EBUSY back. If the domain is marked as
> "always on" instead the pm core won't even attempt to turn it off.
>
> In theory on 6qp it is safe to turn PU off in suspend, however that is
> best accomplished with a new core flag.
>
> Signed-of
Am Mittwoch, den 11.07.2018, 15:21 +0300 schrieb Leonard Crestez:
> On Wed, 2018-07-11 at 14:16 +0200, Lucas Stach wrote:
> > Am Mittwoch, den 11.07.2018, 15:11 +0300 schrieb Leonard Crestez:
> > > Handle this in the safest possible way by keeping the DISP doma
#x27;t work.
>
> Fix this by converting to new gpc bindings by adding pgc nodes and
> referencing the newly-defined &pu_disp domain from &lcdif.
>
> Signed-off-by: Leonard Crestez
Reviewed-by: Lucas Stach
> ---
> arch/arm/boot/dts/imx6sl.dtsi | 35
-on.
>
> Signed-off-by: Leonard Crestez
Reviewed-by: Lucas Stach
Can you send a follow on patch to switch the i.MX6QP errata workaround
to use GENPD_FLAG_ALWAYS_ON and remove the -EBUSY stuff in the power
down path?
Regards,
Lucas
> ---
> drivers/soc/imx/gpc.c | 10 ++
&g
Am Dienstag, den 10.07.2018, 00:27 +0200 schrieb Ulf Hansson:
> > On 6 July 2018 at 18:46, Leonard Crestez wrote:
> > On imx6qp power gating on the PU domain is disabled because of errata
> > ERR009619. However power gating during suspend/resume can still be
> > performed.
>
> Sounds a bit hand w
Am Donnerstag, den 05.07.2018, 18:12 +0300 schrieb Leonard Crestez:
> On imx6qp power gating on the PU domain is disabled because of errata
> ERR009619. However power gating during suspend/resume can still be
> performed.
>
> Enable this by implementing SLEEP_PM_OPS in imx_pgc_power_domain_driver.
Hi Shawn,
Am Dienstag, den 03.07.2018, 15:12 +0800 schrieb Shawn Guo:
> On Mon, May 28, 2018 at 04:37:39PM +0530, Viresh Kumar wrote:
> > Hi Lucas,
> >
> > On 25-05-18, 13:46, Lucas Stach wrote:
> > > This is a lot of duplicate information for what is effectivel
Am Montag, den 02.07.2018, 17:18 + schrieb Leonard Crestez:
> On Fri, 2018-06-08 at 16:33 +0200, Lucas Stach wrote:
> > Am Dienstag, den 29.05.2018, 22:39 +0300 schrieb Leonard Crestez:
> > > On imx7d the phy is turned off in suspend and must be reset on resume.
> > &g
Am Montag, den 02.07.2018, 13:49 + schrieb Leonard Crestez:
> On Mon, 2018-07-02 at 14:15 +0200, Lucas Stach wrote:
> > Am Montag, den 02.07.2018, 14:52 +0300 schrieb Leonard Crestez:
> > > With current code (even without my patches) attempting to dynamically
> > >
Am Montag, den 02.07.2018, 14:52 +0300 schrieb Leonard Crestez:
> Tested by doing `rtcwake -s 5 -m mem` while running glxgears on
> etnaviv.
>
> The first patch is required because otherwise it is not easy to reach
> pgc
> domains from the gpc itself when using new-style bindings. It's also
> easi
Am Montag, den 02.07.2018, 14:52 +0300 schrieb Leonard Crestez:
> On imx6qp power gating on the PU domain is disabled because of errata
> ERR009619. However power gating on suspend/resume can still work.
>
> Enable this by calling the on/off functions directly from suspend code in
> mach-imx.
Sor
; regulator range settings for i.MX6 SoCs.
>
> Signed-off-by: Anson Huang
Reviewed-by: Lucas Stach
> ---
> changes since V1:
> Correct the regulator range according to datasheet's statement.
> arch/arm/boot/dts/imx6sl.dtsi | 8
> arch/arm/boot/dts/i
correct axis.
>
> Tested on Zii RDU1 00-5105-30 rev B
>
> Signed-off-by: Nick Dyer
Reviewed-by: Lucas Stach
> ---
> arch/arm/boot/dts/imx51-zii-rdu1.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/imx51-zii-rdu1.dts
> b/ar
Am Freitag, den 29.06.2018, 08:27 + schrieb Anson Huang:
> Hi, Lucas
>
> Anson Huang
> Best Regards!
>
>
> > -Original Message-----
> > > > From: Lucas Stach [mailto:l.st...@pengutronix.de]
> > Sent: Friday, June 29, 2018 4:15 PM
> &g
Am Freitag, den 29.06.2018, 15:54 +0800 schrieb Anson Huang:
> Correct some i.MX6 SoCs anatop regulators range
> according to reference manual.
>
> Signed-off-by: Anson Huang
NACK.
This is wrong. While the regulator supports this range, the SoC
doesn't. The current settings are derived from the
Feedback is welcome!
Apart from the RDU 1/2 mixup you noticed yourself this looks good to
me. Maybe Shawn can just fix this up while applying.
For the series:
Reviewed-by: Lucas Stach
Regards,
Lucas
Hi Robin,
I've tested this whole series with the SDMA being used for SPI, UART
and SSI with no regressions spotted. As this should cover most common
use-cases, I think this series is good to go in.
Tested-by: Lucas Stach
Regards,
Lucas
Am Mittwoch, den 20.06.2018, 00:56 +0800 schrieb
Hi Nick,
Am Dienstag, den 19.06.2018, 23:07 +0100 schrieb Nick Dyer:
> The pinctrl settings were incorrect for the touchscreen interrupt line,
> causing
> an interrupt storm. This change has been tested with both the atmel_mxt_ts and
> RMI4 drivers on the RDU1 units.
>
> > Signed-off-by: Nick Dy
Hi Abel,
as this series switches back to using the raw padcfg values in DT
instead of generic pinconf (which I think is the right move), we can
drop this patch from the series.
Regards,
Lucas
Am Mittwoch, den 20.06.2018, 10:24 +0300 schrieb Abel Vesa:
> > From: Lucas Stach
>
>
Am Montag, den 18.06.2018, 17:42 +0200 schrieb Emmanuel Vadot:
> The RIoTboard debug uart is connected to serial1.
> Add a chosen property in the DTS so OS knows what serial port to use for
> the console.
>
> > Signed-off-by: Emmanuel Vadot
> ---
> arch/arm/boot/dts/imx6dl-riotboard.dts | 4
splat below was without any changes to your series.
Regards,
Lucas
> On 四, 2018-06-14 at 10:53 +0200, Lucas Stach wrote:
> > Hi Robin,
> >
> > I just gave this series a spin and it seems there is even more
> > locking
> > fun, see the lockdep output below. Aft
Hi Robin,
I just gave this series a spin and it seems there is even more locking
fun, see the lockdep output below. After taking a short look it seems
this is caused by using the wrong spinlock variants in
sdma_int_handler(), those should also use the _irqsave ones. When
fixing this you might want
Hi Robin,
Am Dienstag, den 12.06.2018, 08:58 + schrieb Robin Gong:
> Hi Lucas,
> Is the below DEAD LOCK issue same as your side? If yes, then
> I'm afraid that we have to make another patch for uart to split dma
> functions in uart driver out of the code area which protected by
> port.lo
Hi Robin,
this series breaks serial DMA for me. I wasn't able to dig in deeper
yet. Please let me know if you can test/reproduce at your side, if not
I'll try to find some time to collect some more debug info.
Regards,
Lucas
Am Montag, den 11.06.2018, 22:59 +0800 schrieb Robin Gong:
> The legacy
Am Dienstag, den 29.05.2018, 22:39 +0300 schrieb Leonard Crestez:
> On imx7d the phy is turned off in suspend and must be reset on resume.
> Right now lspci -v fails after a suspend/resume cycle, fix this by
> adding minimal suspend/resume code from the nxp vendor tree.
>
> This is currently only
_APPS_EN.
>
> Signed-off-by: Leonard Crestez
Reviewed-by: Lucas Stach
> ---
> drivers/reset/reset-imx7.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
> index 4db177bc89bc..fdeac1946429
Hi Maciej,
Am Montag, den 04.06.2018, 15:59 +0200 schrieb Maciej Purski:
> Implementing coupled regulators adds a new dependency between
> regulators. Therefore, the current locking model should be changed.
> Coupled regulators should be locked with regulator's supplies at the
> same time.
>
> Ad
Hi Ulf,
Am Donnerstag, den 31.05.2018, 12:59 +0200 schrieb Ulf Hansson:
> To support devices being partitioned across multiple PM domains, let's
> begin with extending genpd to cope with these kind of configurations.
>
> Therefore, add a new exported function genpd_dev_pm_attach_by_id(), which
>
Am Montag, den 28.05.2018, 17:53 +0200 schrieb Stefan Agner:
> On 28.05.2018 09:55, Peter De Schrijver wrote:
> > On Sun, May 27, 2018 at 11:54:40PM +0200, Stefan Agner wrote:
> > > From: Lucas Stach
> > >
> > > Set up the NAND Flash controller clock to run
Hi Souptick,
Am Montag, den 21.05.2018, 22:42 +0530 schrieb Souptick Joarder:
> Use new return type vm_fault_t for fault handler. For
> now, this is just documenting that the function returns
> a VM_FAULT value rather than an errno. Once all instances
> are converted, vm_fault_t will become a dist
d also consumes (a small amount of)
power, if you are after minimizing power consumption, better configure
the pin as output and drive it in the pull direction.
>
> > Cc: Nikita Yushchenko
> > Cc: Shawn Guo
> > Cc: Fabio Estevam
> > Cc: Lucas Stach
> >
Hi Viresh,
Am Freitag, den 25.05.2018, 16:02 +0530 schrieb Viresh Kumar:
> The OPP properties, like "operating-points", should either be present
> for all the CPUs of a cluster or none. If these are present only for a
> subset of CPUs of a cluster then things will start falling apart as soon
> as
ture to limit port to full speed.
>
> Signed-off-by: Nikita Yushchenko
Reviewed-by: Lucas Stach
> ---
> arch/arm/boot/dts/imx51-zii-rdu1.dts | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/boot/dts/imx51-zii-rdu1.dts
> b/arch/arm/boot/dts/imx51-zii-r
Am Dienstag, den 15.05.2018, 13:51 +0800 schrieb Anson Huang:
> Add imx8mq-cpufreq driver for NXP i.MX8MQ SoC to support the
> hardware specific frequency and voltage scaling requirements.
>
> Signed-off-by: Anson Huang
Sorry, but NACK.
This just implements a specific reclocking sequence as a c
ds,
Lucas
>
>
> On Fri, May 11, 2018 at 8:07 PM, Pintu Kumar
> wrote:
> > On Fri, May 11, 2018 at 6:34 PM, Lucas Stach > e> wrote:
> > > Am Freitag, den 11.05.2018, 13:39 +0100 schrieb Russell King -
> > > ARM Linux:
> > > > On Fri, May 11,
Am Freitag, den 11.05.2018, 13:39 +0100 schrieb Russell King - ARM Linux:
> On Fri, May 11, 2018 at 05:07:37PM +0530, Pintu Kumar wrote:
> > Hi,
> >
> > I need one help.
> > I am using i.MX7 Sabre board with kernel version 4.1.15
> >
> > Let's say I am interested in GPIO number: 21
> > I wanted t
Am Mittwoch, den 25.04.2018, 13:44 -0400 schrieb Alex Deucher:
> On Wed, Apr 25, 2018 at 2:41 AM, Christoph Hellwig > wrote:
> > On Wed, Apr 25, 2018 at 02:24:36AM -0400, Alex Deucher wrote:
> > > > It has a non-coherent transaction mode (which the chipset can opt to
> > > > not implement and stil
Hi Georgi,
Am Freitag, den 30.03.2018, 18:24 +0300 schrieb Georgi Djakov:
[...]
> The interconnect core takes requests from consumer drivers for their
> bandwidth needs and configures the hardware to keep the lowest possible
> power profile. I think that the boot constraint patches would be useful
Am Mittwoch, den 04.04.2018, 11:09 +0200 schrieb Michel Dänzer:
> On 2018-03-26 04:36 PM, Lucas Stach wrote:
> > Am Dienstag, den 30.01.2018, 11:28 +0100 schrieb Michal Hocko:
> > > On Tue 30-01-18 10:29:10, Michel Dänzer wrote:
> > > > On 2018-01-24 12:50 PM, Michal
Hi all,
Am Dienstag, den 30.01.2018, 11:28 +0100 schrieb Michal Hocko:
> On Tue 30-01-18 10:29:10, Michel Dänzer wrote:
> > On 2018-01-24 12:50 PM, Michal Hocko wrote:
> > > On Wed 24-01-18 12:23:10, Michel Dänzer wrote:
> > > > On 2018-01-24 12:01 PM, Michal Hocko wrote:
> > > > > On Wed 24-01-18
Hi Lothar,
Am Freitag, den 09.03.2018, 09:37 +0100 schrieb Lothar Waßmann:
> Hi,
>
> On Thu, 8 Mar 2018 16:38:32 +0100 Martin Kaiser wrote:
> > Hi Lothar,
> >
> > > > Thus wrote Lothar Waßmann (l...@karo-electronics.de):
> >
> > > > diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/
in...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> > Cc: Rob Herring
> > Cc: Mark Rutland
> Cc: devicet...@vger.kernel.org
> > Cc: Guenter Roeck
> > Cc: Chris Healy
> > Cc: Lucas Stach
> Signed-off-by: Andrey Smirnov
Acked-by: Lucas Stach
>
; Cc: Mark Rutland
> Cc: devicet...@vger.kernel.org
> > Cc: Guenter Roeck
> > Cc: Chris Healy
> > Cc: Lucas Stach
> Signed-off-by: Andrey Smirnov
Reviewed-by: Lucas Stach
> ---
>
> Changes since [v1]:
>
> - Removed redundant dev.parent assi
Am Montag, den 26.02.2018, 07:07 -0800 schrieb Andrey Smirnov:
> Check received frame length _before_ accepting next byte in order to
> avoid incorrectly rejecting payloads that are RAVE_SP_RX_BUFFER_SIZE
> long.
>
> Cc: linux-kernel@vger.kernel.org
> Cc: cphe...@gmail.com
&
Am Montag, den 26.02.2018, 07:07 -0800 schrieb Andrey Smirnov:
> Convert print_hex_dump() to print_hex_dump_debug() to be able to
> leverage CONFIG_DYNAMIC_DEBUG.
>
> Cc: linux-kernel@vger.kernel.org
> Cc: cphe...@gmail.com
> Cc: Lucas Stach
> Cc: Lee Jones
> Cc: Guente
Am Montag, den 26.02.2018, 07:07 -0800 schrieb Andrey Smirnov:
> Add code that would query and print out bootloader and application
> firmware version info.
>
> Cc: linux-kernel@vger.kernel.org
> Cc: cphe...@gmail.com
> Cc: Lucas Stach
> Cc: Lee Jones
> Cc: Guente
t; corresponding DT node for RDU.
>
> Cc: Rob Herring
> Cc: Mark Rutland
> Cc: Shawn Guo
> Cc: Fabio Estevam
> Cc: Guenter Roeck
> Cc: Chris Healy
> Cc: Lucas Stach
> Cc: devicet...@vger.kernel.org
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: linux-ker
; corresponding DT node for RDU2.
>
> Cc: Rob Herring
> Cc: Mark Rutland
> Cc: Shawn Guo
> Cc: Fabio Estevam
> Cc: Guenter Roeck
> Cc: Chris Healy
> Cc: Lucas Stach
> Cc: devicet...@vger.kernel.org
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: linux-ker
Am Dienstag, den 20.02.2018, 23:55 +0100 schrieb Stefan Agner:
> Add Dong Aisheng, Fabio Estevam, Shawn Guo and myself as maintainer
> and the Pengutronix kernel team as reviewer.
>
> Signed-off-by: Stefan Agner
> Reviewed-by: Fabio Estevam
> Acked-by: Dong Aisheng
Ack
Am Montag, den 12.02.2018, 13:22 +0200 schrieb Baruch Siach:
> Hi Lucas,
>
> On Mon, Feb 12, 2018 at 11:48:22AM +0100, Lucas Stach wrote:
> > Am Samstag, den 10.02.2018, 16:32 +0100 schrieb Stefan Agner:
> > > Add Dong Aisheng, Fabio Estevam, Shawn Guo and myself as
&g
Am Samstag, den 10.02.2018, 16:32 +0100 schrieb Stefan Agner:
> Add Dong Aisheng, Fabio Estevam, Shawn Guo and myself as maintainer
> and Sascha as reviewer.
>
> Signed-off-by: Stefan Agner
> ---
> MAINTAINERS | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/MAINTAINERS b/M
Am Freitag, den 09.02.2018, 14:58 +0100 schrieb Ulf Hansson:
> On 26 January 2018 at 09:38, Jia-Ju Bai
> wrote:
> > After checking all possible call chains to genpd_dev_pm_detach()
> > and
> > genpd_dev_pm_attach() here,
> > my tool finds that these functions are never called in atomic
> > context
Am Dienstag, den 30.01.2018, 21:29 +0100 schrieb Thierry Escande:
> From: Sean Paul
>
> Change the mode for Sharp lq123p1jx31 panel to something more
> rockchip-friendly such that we can use the fixed PLLs to
> generate the pixel clock
This should really switch to a display timing instead of exp
Hi Gustavo,
Am Dienstag, den 23.01.2018, 11:07 -0600 schrieb Gustavo A. R. Silva:
> Fix the following warning by using %zx instead of %x for variable of
> type size_t:
>
> warning: format ‘%x’ expects argument of type ‘unsigned int’, but
> argument 4 has type ‘size_t {aka long unsigned int}’ [-Wf
Hi Peng,
Am Samstag, den 30.12.2017, 21:53 +0800 schrieb Peng Fan:
> There are two states in i.MX6Q cpuidle driver.
> state[1]: ARM WFI mode
> state[2]: i.MX6Q WAIT mode
>
> Take i.MX6DL as example, think out such a case:
> 1. CPU0/1 both run at normal mode
> 2. On CPU0, `sleep 1` is executed. An
Am Mittwoch, den 24.01.2018, 00:42 +0800 schrieb Anson Huang:
> Add ARM power domain in PGC.
>
> Signed-off-by: Anson Huang
Reviewed-by: Lucas Stach
> ---
> this patch should be based on
> 0001-ARM-dts-imx6sx-add-pu-power-domain-support.patch
> arch/arm/boot/dts/imx6s
on
>
> Signed-off-by: Anson Huang
Reviewed-by: Lucas Stach
> ---
> drivers/soc/imx/gpc.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c
> index 53f7275..6cafa9b 100644
> --- a/drivers/soc/imx/g
Am Mittwoch, den 17.01.2018, 16:52 -0500 schrieb Rob Clark:
> On Mon, Jan 15, 2018 at 11:14 AM, Arnd Bergmann
> wrote:
> > When NVMEM is configured as a loadable module, and adreno
> > is built-in, we get a link failure:
> >
> > drivers/gpu/drm/msm/adreno/a5xx_gpu.o: In function `a5xx_gpu_init':
Am Donnerstag, den 11.01.2018, 11:34 + schrieb Wei Yongjun:
> Fixes the following sparse warnings:
>
> drivers/gpu/drm/etnaviv/etnaviv_iommu.c:161:39: warning:
> symbol 'etnaviv_iommuv1_ops' was not declared. Should it be static?
> drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c:239:39: warning:
>
thout the flag the kernel freezes when the timer enters the
> first time ARM power off mode.
>
> Cc: Anson Huang
> Signed-off-by: Stefan Agner
Reviewed-by: Lucas Stach
> ---
> arch/arm/mach-imx/cpuidle-imx6sx.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --gi
mx_gpc_probe initialized them in
> first place.
>
> Fixes: 721cabf6c660 ("soc: imx: move PGC handling to a new GPC
> driver")
> Cc: Lucas Stach
> Signed-off-by: Stefan Agner
Reviewed-by: Lucas Stach
> ---
> drivers/soc/imx/gpc.c | 10 +-
> 1 file
Am Dienstag, den 09.01.2018, 16:43 +0200 schrieb Leonard Crestez:
> On Tue, 2018-01-09 at 02:17 +0100, Rafael J. Wysocki wrote:
> > On Mon, Jan 8, 2018 at 4:51 PM, Leonard Crestez wrote:
> > > On Mon, 2018-01-08 at 15:14 +, Patrick Bellasi wrote:
> > > > On 08-Jan 15:20, Leonard Crestez wrote:
Am Dienstag, den 09.01.2018, 14:37 +0100 schrieb Stefan Agner:
> On 2018-01-09 11:13, Lucas Stach wrote:
> > Am Dienstag, den 09.01.2018, 09:25 + schrieb Anson Huang:
> > >
> > > Best Regards!
> > > Anson Huang
> > >
> > >
> &g
Am Dienstag, den 09.01.2018, 09:25 + schrieb Anson Huang:
>
> Best Regards!
> Anson Huang
>
>
> > -Original Message-
> > From: Dong Aisheng [mailto:donga...@gmail.com]
> > Sent: 2018-01-09 5:23 PM
> > To: Stefan Agner
> > Cc: shawn...@kernel.org; ker...@pengutronix.de; Fabio Estevam
Am Montag, den 08.01.2018, 22:17 +0100 schrieb Stefan Agner:
> On 2018-01-08 11:51, Lucas Stach wrote:
> > Am Montag, den 08.01.2018, 18:28 +0800 schrieb Dong Aisheng:
> > > On Sun, Jan 07, 2018 at 02:49:05PM +0100, Stefan Agner wrote:
> > > > If power domain informa
domains always in the old DT binding case. Only
> > remove power domains when imx_gpc_probe initialized them in
> > first place.
> >
> > Fixes: 721cabf6c660 ("soc: imx: move PGC handling to a new GPC
> > driver")
> > Cc: Lucas Stach
>
Am Donnerstag, den 04.01.2018, 15:52 +0200 schrieb Ilya Ledvich:
> i.MX7D variant of the IP can use either Crystal Oscillator input
> or internal clock input as a Reference Clock input for PCIe PHY.
> Add support for an optional property 'fsl,pcie-phy-refclk-internal'.
> If present then an internal
Am Dienstag, den 19.12.2017, 16:56 +0100 schrieb Stefan Riedmueller:
> Add compatibility for the i.MX 6QuadPlus to make it behave like the
> i.MX 6Quad, as both SOCs use the same operating points. Otherwise the
> i.MX 6QuadPlus tries to run with 1.2 GHz even though it only
> supports 1 GHz.
There
Am Sonntag, den 17.12.2017, 03:34 +0100 schrieb Jonathan Neuschäfer:
> The compatible string for this panel was specified as
> toshiba,lt089ac29000.txt. I believe this is a mistake.
>
> Fixes: 06e733e41f87 ("drm/panel: simple: add Toshiba LT089AC19000")
> > Cc:
Am Freitag, den 15.12.2017, 01:45 +0300 schrieb Dmitry Osipenko:
> On 15.12.2017 00:41, Lucas Stach wrote:
> > Am Montag, den 11.12.2017, 18:26 +0300 schrieb Dmitry Osipenko:
> > > On 11.12.2017 17:27, Thierry Reding wrote:
> > > > On Mon, Dec 11, 2017 at 04:
Am Montag, den 11.12.2017, 18:26 +0300 schrieb Dmitry Osipenko:
> On 11.12.2017 17:27, Thierry Reding wrote:
> > On Mon, Dec 11, 2017 at 04:53:56PM +0300, Dmitry Osipenko wrote:
> > > On 11.12.2017 13:13, Thierry Reding wrote:
> > > > On Mon, Dec 11, 2017 at 02:19:44AM +0300, Dmitry Osipenko
> > >
Am Freitag, den 10.11.2017, 16:03 +0100 schrieb Lucas Stach:
> Since bd8b2441742b (NFS: Store the raw NFS access mask in the inode's
> access cache) the mask already contains the NFS access bits, so it is
> wrong to try to map them from the MAY_* bits to the NFS_MAY_* bits
> in
Lockdep complains that the stats update is trying to register a non-static
key. This is because u64_stats are using a seqlock on 32bit arches, which
needs to be initialized before usage.
Fixes: 041cd640b2f3 (cgroup: Implement cgroup2 basic CPU usage accounting)
Signed-off-by: Lucas Stach
Am Freitag, den 17.11.2017, 16:03 +0100 schrieb Lukasz Majewski:
> Hi Lucas,
>
> > Am Freitag, den 17.11.2017, 15:13 +0100 schrieb Lukasz Majewski:
> > > Hi Shawn,
> > >
> > > > On Fri, Nov 17, 2017 at 11:24:03AM +0100, Lukasz Majewski wrote:
> > > > > This is the support for aa070mc01-ca1 Mi
Am Freitag, den 17.11.2017, 15:13 +0100 schrieb Lukasz Majewski:
> Hi Shawn,
>
> > On Fri, Nov 17, 2017 at 11:24:03AM +0100, Lukasz Majewski wrote:
> > > This is the support for aa070mc01-ca1 Mitsubishi display.
> > >
> > > Signed-off-by: Lukasz Majewski
> > > ---
> > > arch/arm/boot/dts/Makefi
Am Mittwoch, den 15.11.2017, 17:36 + schrieb Alexey Brodkin:
> Hi Lucas,
>
> On Wed, 2017-11-15 at 17:44 +0100, Lucas Stach wrote:
> > Hi Alexey,
> >
> > Am Mittwoch, den 15.11.2017, 16:24 + schrieb Alexey Brodkin:
> > >
> > > Hi Lucas,
>
Hi Alexey,
Am Mittwoch, den 15.11.2017, 16:24 + schrieb Alexey Brodkin:
> Hi Lucas,
>
> As we discussed on ELCE last month in Prague we have Vivante GPU
> built-in our new ARC HSDK development board.
>
> And even though [thanks to your suggestions] I got Etnaviv driver
> working perfectly fi
m the server.
Fix this by using the mask directly, but be careful to not ask for
to broad permissions from the calling nfs_do_access().
CC: sta...@vger.kernel.org #4.13+
Signed-off-by: Lucas Stach
Tested-by: Björn Lässig
---
fs/nfs/dir.c | 8 ++--
fs/nfs/nfs4proc.c | 19 +
Am Dienstag, den 17.10.2017, 12:44 +0200 schrieb Arnd Bergmann:
> lkft found a boot time regression on the Hikey board that has no
> aliases entry for spi buses. of_alias_get_highest_id() here
> returns -ENODEV, which is then used as the initial number for the
> IDR allocation, and that in turn tri
; Signed-off-by: Leonard Crestez
Reviewed-by: Lucas Stach
> ---
>
> Changes since v1: https://www.spinics.net/lists/arm-kernel/msg610461.
> html
> * Clarified comment but kept > instead of >= because that's what the
> old code used. Would be OK to change with furth
t; the module.
>
> Signed-off-by: Martin Kaiser
Reviewed-by: Lucas Stach
> ---
> changes in v3:
> delete__exit qualifier from the remove routine
>
> changes in v2:
> add more details about the crash to the commit message
>
> drivers/mfd/fsl-imx25-tsadc.c | 14 +
Am Dienstag, den 19.09.2017, 08:23 +0200 schrieb Martin Kaiser:
> When fsl-imx25-tsadc is compiled as a module, loading, unloading and
> reloading the module will lead to a crash.
>
> Unable to handle kernel paging request at virtual address bf005430
> [] (irq_find_matching_fwspec)
>from [] (o
Am Dienstag, den 19.09.2017, 08:23 +0200 schrieb Martin Kaiser:
> Replace the two separate calls for setting the irq handler and data with
> a single irq_set_chained_handler_and_data() call.
>
> Signed-off-by: Martin Kaiser
Reviewed-by: Lucas Stach
> ---
> changes in v2:
k, so if PLL1 NOT enabled, this
> bit will never get clear.
>
> Keep pll1_sys explicitly enabled until after the rate is change to deal
> with this. Otherwise from the clk framework perspective pll1_sys is
> unused and gets turned off.
>
> Signed-off-by: Leonard Crestez
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