Use the u64_to_user_ptr helper macro to cast IOCTL argument u64 values
to user pointers instead of writing out the cast manually.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/drm.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/tegra
to the TegraDRM submit path.
Everything was tested on TX1 and TX2 and should be applied on the
previously posted Tegra186 support series.
Cheers,
Mikko
*** BLURB HERE ***
Mikko Perttunen (4):
gpu: host1x: Enable Tegra186 syncpoint protection
gpu: host1x: Enable gather filter
gpu: host1x
since that would require extra work and is unnecessary with
the current channel allocation model.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/host1x/dev.h | 16
drivers/gpu/host1x/hw/channel_hw.c | 3 +++
drivers/gpu/host1x/hw/syncpt_hw.c | 26
Add a node for the Video Image Compositor on the Tegra186.
Signed-off-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index
this commit.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/host1x/Makefile| 3 +-
drivers/gpu/host1x/dev.c | 60 ++-
drivers/gpu/host1x/dev.h | 4 +
drivers/gpu/host1x/hw/cdma_hw.c| 49
Add note that address/size-cells should be 2 on 64-bit systems,
and add Tegra186-specific register range properties.
Signed-off-by: Mikko Perttunen
---
.../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git
a
Add the node for Host1x on the Tegra186, without any subdevices
for now.
Signed-off-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
b/arch/arm64/boot/dts/nvidia
Add #power-domain-cells for the BPMP node on Tegra186 so that the power
domain provider may be used.
Signed-off-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
b/arch/arm64/boot/dts
Add Tegra186 support for VIC - no changes are required except for new
firmware and compatibility string.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/drm.c | 1 +
drivers/gpu/drm/tegra/vic.c | 10 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/tegra
code.
The series has been tested on the Jetson TX1 (T210) and TX2 (T186)
using the host1x_test test suite available at
http://github.com/cyndis/host1x_test
The series itself is available at
http://github.com/cyndis/linux, branch host1x-t186-1
Cheers,
Mikko
Mikko Perttunen (6):
arm64: tegra
help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Mikko-Perttunen/arm64-tegra-Add-BPMP-thermal-sensor-to-Tegra186/20170726-055759
base: https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git for-next
config: arm64-allnoconfig (attached as .config)
compiler: aarch64
This adds the thermal sensor device provided by the BPMP, and the
relevant thermal sensors to the Tegra186 device tree.
Signed-off-by: Mikko Perttunen
---
v2:
- added trips and cooling-maps nodes
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 103 +++
1 file changed, 103
Add static inline stubs to bpmp.h when CONFIG_BPMP is not enabled.
This allows building BPMP-related drivers with COMPILE_TEST.
Signed-off-by: Mikko Perttunen
---
v2:
- added patch
include/soc/tegra/bpmp.h | 42 +++---
1 file changed, 39 insertions(+), 3
: Mikko Perttunen
---
v2:
- don't allocate space for disabled zones
- allow compilation with COMPILE_TEST
drivers/thermal/Makefile | 2 +-
drivers/thermal/tegra/Kconfig| 7 +
drivers/thermal/tegra/Makefile | 3 +-
drivers/thermal/tegra/bpmp-thermal.c
Expose and export the tegra_bpmp_mrq_return function for use of drivers
outside the core BPMP driver. This function is used to reply to
messages originating from the BPMP, which is required in the thermal
driver.
Signed-off-by: Mikko Perttunen
---
drivers/firmware/tegra/bpmp.c | 5
In Tegra186, the BPMP (Boot and Power Management Processor) implements
an interface that is used to read system temperatures, including CPU
cluster and GPU temperatures. This binding describes the thermal sensor
that is exposed by BPMP.
Signed-off-by: Mikko Perttunen
Acked-by: Rob Herring
On 07/11/2017 05:44 PM, Paul Kocialkowski wrote:
On Tue, 2017-07-11 at 14:37 +, Marcel Ziswiler wrote:
On Tue, 2017-07-11 at 11:49 +0300, Paul Kocialkowski wrote:
On Mon, 2017-07-10 at 21:33 +0200, Paul Kocialkowski wrote:
When there is no device to attach to the IOMMU domain, as may be
th
Thanks for the patch, didn't consider this case. I really need to get
together some system to automatically test on multiple platforms.. :)
Reviewed-by: Mikko Perttunen
On 10.07.2017 22:33, Paul Kocialkowski wrote:
When there is no device to attach to the IOMMU domain, as may be the
On 01.07.2017 02:56, Eduardo Valentin wrote:
On Fri, Jun 16, 2017 at 02:28:22PM +0300, Mikko Perttunen wrote:
This adds the thermal sensor device provided by the BPMP, and the
relevant thermal sensors to the Tegra186 device tree.
Signed-off-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia
On 01.07.2017 05:53, Eduardo Valentin wrote:
Hey Mikko,
Sorry for the late answer,
Likewise,
On Fri, Jun 16, 2017 at 02:28:25PM +0300, Mikko Perttunen wrote:
On Tegra186, the BPMP (Boot and Power Management Processor) exposes an
interface to thermal sensors on the system-on-chip. This
Currently genpd installs its own noirq callbacks, but never calls down
to the driver's corresponding callbacks. Add these calls.
Signed-off-by: Mikko Perttunen
---
v3:
- Factored out common code in pm_genpd_{suspend,poweroff}_noirq
- Added pm_generic_* calls to rest of callbacks
drivers
On 20.06.2017 17:18, Ulf Hansson wrote:
On 20 June 2017 at 15:38, Mikko Perttunen wrote:
Currently genpd installs its own suspend_noirq, resume_noirq,
and poweroff_noirq callbacks, but never calls down to the driver's
corresponding callbacks. Add these calls.
Signed-off-by: Mikko Pert
Currently genpd installs its own suspend_noirq, resume_noirq,
and poweroff_noirq callbacks, but never calls down to the driver's
corresponding callbacks. Add these calls.
Signed-off-by: Mikko Perttunen
---
v2:
- Moved pm_generic_suspend_noirq to before pm_runtime_force_suspend,
On 20.06.2017 15:47, Ulf Hansson wrote:
On 20 June 2017 at 14:05, Mikko Perttunen wrote:
Currently genpd installs its own suspend_noirq and resume_noirq
callbacks, but never calls down to the driver's corresponding
callbacks. Add these calls.
Signed-off-by: Mikko Perttunen
---
drivers
Currently genpd installs its own suspend_noirq and resume_noirq
callbacks, but never calls down to the driver's corresponding
callbacks. Add these calls.
Signed-off-by: Mikko Perttunen
---
drivers/base/power/domain.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers
: Mikko Perttunen
---
drivers/thermal/Makefile | 2 +-
drivers/thermal/tegra/Kconfig| 7 +
drivers/thermal/tegra/Makefile | 3 +-
drivers/thermal/tegra/bpmp-thermal.c | 253 +++
4 files changed, 263 insertions(+), 2 deletions(-)
create
In Tegra186, the BPMP (Boot and Power Management Processor) implements
an interface that is used to read system temperatures, including CPU
cluster and GPU temperatures. This binding describes the thermal sensor
that is exposed by BPMP.
Signed-off-by: Mikko Perttunen
---
.../thermal/nvidia
This adds the thermal sensor device provided by the BPMP, and the
relevant thermal sensors to the Tegra186 device tree.
Signed-off-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 48
1 file changed, 48 insertions(+)
diff --git a/arch/arm64
Expose and export the tegra_bpmp_mrq_return function for use of drivers
outside the core BPMP driver. This function is used to reply to
messages originating from the BPMP, which is required in the thermal
driver.
Signed-off-by: Mikko Perttunen
---
drivers/firmware/tegra/bpmp.c | 5
On 13.06.2017 15:46, Mikko Perttunen wrote:
On 13.06.2017 15:42, Thierry Reding wrote:
On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote:
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Mikko
On 13.06.2017 15:42, Thierry Reding wrote:
On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote:
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Mikko Perttunen
Acked-by: Rob Herring
---
.../arm
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Mikko Perttunen
Acked-by: Rob Herring
---
.../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 20
1 file changed, 20 insertions(+)
create
On 09.06.2017 23:54, Rob Herring wrote:
On Thu, Jun 8, 2017 at 2:32 AM, Mikko Perttunen wrote:
On 08.06.2017 01:11, Rob Herring wrote:
On Thu, Jun 01, 2017 at 11:04:04AM +0300, Mikko Perttunen wrote:
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU
On 08.06.2017 01:11, Rob Herring wrote:
On Thu, Jun 01, 2017 at 11:04:04AM +0300, Mikko Perttunen wrote:
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
What the block is should also go in the binding doc. With that,
I don&#
Hi,
these are the device tree and bindings changes for the Tegra186 cpufreq
driver that was recently merged. The patches are the same as those that
were originally posted with the driver.
Mikko Perttunen (2):
dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster
arm64: tegra: Add
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
b
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Mikko Perttunen
---
.../arm/tegra/nvidia,tegra186-ccplex-cluster.txt| 17 +
1 file changed, 17 insertions(+)
create mode 100644
On 20.04.2017 13:02, Arnd Bergmann wrote:
On Thu, Apr 20, 2017 at 11:44 AM, Mikko Perttunen wrote:
On 20.04.2017 11:25, Arnd Bergmann wrote:
On Thu, Apr 20, 2017 at 9:02 AM, Mikko Perttunen wrote:
On 19.04.2017 21:24, Arnd Bergmann wrote:
I don't think this can be a per-platform p
On 20.04.2017 11:25, Arnd Bergmann wrote:
On Thu, Apr 20, 2017 at 9:02 AM, Mikko Perttunen wrote:
On 19.04.2017 21:24, Arnd Bergmann wrote:
When dma_addr_t and phys_addr_t are not the same size, we get a warning
from the dma_alloc_wc function:
drivers/gpu/host1x/cdma.c: In function
On 19.04.2017 21:24, Arnd Bergmann wrote:
When dma_addr_t and phys_addr_t are not the same size, we get a warning
from the dma_alloc_wc function:
drivers/gpu/host1x/cdma.c: In function 'host1x_pushbuffer_init':
drivers/gpu/host1x/cdma.c:94:48: error: passing argument 3 of 'dma_alloc_wc'
from in
Ah, had to forget something :)
Reviewed-by: Mikko Perttunen
On 19.04.2017 21:24, Arnd Bergmann wrote:
When IOMMU_IOVA is not built-in but host1x is, we get a link error:
drivers/gpu/host1x/dev.o: In function `host1x_remove':
dev.c:(.text.host1x_remove+0x50): undefined referen
On 04.04.2017 16:43, Mikko Perttunen wrote:
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Mikko Perttunen
---
v2:
- Only one regs entry
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 7 +++
1 file changed, 7
Rob, Mark,
could you review this and the 3/3 in the series (which I'm sending to
you momentarily)?
Thanks,
Mikko.
On 04.04.2017 16:43, Mikko Perttunen wrote:
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-o
v_err(&pdev->dev, "failed to get reset: %d\n", err);
return err;
}
Reviewed-by: Mikko Perttunen
can be set individually; however,
this is just a hint as all CPUs in a cluster will run at
the maximum rate of non-idle CPUs in the cluster.
Signed-off-by: Mikko Perttunen
Acked-by: Viresh Kumar
---
v3:
- Fixed size parameter of dma_free_coherent
drivers/cpufreq/Kconfig.arm| 6
On 04/11/2017 09:35 AM, Viresh Kumar wrote:
On 04-04-17, 16:43, Mikko Perttunen wrote:
Add a new cpufreq driver for Tegra186 (and likely later).
The CPUs are organized into two clusters, Denver and A57,
with two and four cores respectively. CPU frequency can be
adjusted by writing the desired
On 07.04.2017 10:32, Marc Zyngier wrote:
On 07/04/17 07:49, Mikko Perttunen wrote:
On 06.04.2017 12:26, Marc Zyngier wrote:
On 06/04/17 09:17, Mikko Perttunen wrote:
From: Matt Craighead
According to the GICv2 specification, the GICD_ICFGR0,
or GIC_DIST_CONFIG[0] register is read-only
On 06.04.2017 12:26, Marc Zyngier wrote:
On 06/04/17 09:17, Mikko Perttunen wrote:
From: Matt Craighead
According to the GICv2 specification, the GICD_ICFGR0,
or GIC_DIST_CONFIG[0] register is read-only. Therefore
avoid writing to it.
Have you verified that this also applies to pre-v2 GICs
From: Matt Craighead
According to the GICv2 specification, the GICD_ICFGR0,
or GIC_DIST_CONFIG[0] register is read-only. Therefore
avoid writing to it.
Signed-off-by: Matt Craighead
[mperttu...@nvidia.com: commit message rewritten]
Signed-off-by: Mikko Perttunen
---
drivers/irqchip/irq-gic.c
Signed-off-by: Mikko Perttunen
---
drivers/gpu/host1x/dev.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index f8fda446a6a6..f05ebb14fa63 100644
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -27,6 +27,7 @@
#define
On 05.04.2017 06:36, Stephen Rothwell wrote:
Hi all,
After merging the tip tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
drivers/gpu/built-in.o:(__tracepoints+0x64): multiple definition of
`__tracepoint_remove_device_from_group'
drivers/iommu/built-in.o:(__tracepoin
can be set individually; however,
this is just a hint as all CPUs in a cluster will run at
the maximum rate of non-idle CPUs in the cluster.
Signed-off-by: Mikko Perttunen
---
v2:
- Many cosmetic / restructuring changes
- Only one aperture read from DT now, with a new
structure containing the
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Mikko Perttunen
---
v2:
- Only one regs entry
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Mikko Perttunen
---
v2:
- Only one regs entry.
- s/Phandle/phandle/
.../arm/tegra/nvidia,tegra186-ccplex-cluster.txt| 17 +
1 file changed
On 04/03/2017 05:47 PM, Thierry Reding wrote:
On Mon, Apr 03, 2017 at 03:42:23PM +0300, Mikko Perttunen wrote:
Add a new cpufreq driver for Tegra186 (and likely later).
The CPUs are organized into two clusters, Denver and A57,
with two and four cores respectively. CPU frequency can be
adjusted
On 04/03/2017 05:24 PM, Jon Hunter wrote:
On 03/04/17 13:42, Mikko Perttunen wrote:
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Mikko Perttunen
---
.../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 22
On 04/03/2017 05:06 PM, Thierry Reding wrote:
On Mon, Apr 03, 2017 at 03:42:24PM +0300, Mikko Perttunen wrote:
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Mikko Perttunen
---
.../arm/tegra/nvidia,tegra186
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Mikko Perttunen
---
.../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 22 ++
1 file changed, 22 insertions(+)
create mode 100644
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Mikko Perttunen
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
b
can be set individually; however,
this is just a hint as all CPUs in a cluster will run at
the maximum rate of non-idle CPUs in the cluster.
Signed-off-by: Mikko Perttunen
---
drivers/cpufreq/Kconfig.arm| 7 +
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/tegra186
Series,
Reviewed-by: Mikko Perttunen
Tested-by: Mikko Perttunen
On 02/23/2017 12:44 PM, Peter De Schrijver wrote:
A number of bug fixes for the Tegra210 clock implementation.
Changelog:
v2: add better description for 'remove non-existing pll_m_out1 clock'
Peter De Schrijver
;i2s1_sync", "i2s2_sync", "i2s3_sync", "i2s4_sync", "pll_a_out0",
+ "vimclk_sync",
};
My GCC spews a bunch of warnings because these are "const char * const"
and are passed to tegra_audio_sync_clk_init which takes "const
On 23.02.2017 19:24, Thierry Reding wrote:
From: Thierry Reding
The NVIDIA Tegra186 SoC contains an instance of the Synopsys DWC
ethernet QOS IP core. The binding that it uses is slightly different
from existing ones because of the integration (clocks, resets, ...).
Signed-off-by: Thierry Redi
On 23.02.2017 19:24, Thierry Reding wrote:
From: Thierry Reding
Program the receive queue size based on the RX FIFO size and enable
hardware flow control for large FIFOs.
Signed-off-by: Thierry Reding
---
drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 12 +++
drivers/net/ethernet/stm
move platform: %d\n", err);
+
+ err = data->remove(pdev);
+ if (err < 0)
+ dev_err(&pdev->dev, "failed to remove subdriver: %d\n", err);
+
+ stmmac_remove_config_dt(pdev, priv->plat);
+
+ return err;
}
static const struct of_device_id dwc_eth_dwmac_match[] = {
- { .compatible = "snps,dwc-qos-ethernet-4.10", },
+ { .compatible = "snps,dwc-qos-ethernet-4.10", .data = &dwc_qos_data },
{ }
};
MODULE_DEVICE_TABLE(of, dwc_eth_dwmac_match);
Reviewed-by: Mikko Perttunen
On 23.02.2017 19:24, Thierry Reding wrote:
From: Thierry Reding
clk_prepare_enable() and clk_disable_unprepare() for this clock aren't
properly balanced, which can trigger a WARN_ON() in the common clock
framework.
Signed-off-by: Thierry Reding
---
drivers/net/ethernet/stmicro/stmmac/stmmac_
On 23.02.2017 19:24, Thierry Reding wrote:
From: Thierry Reding
When DMA mapping an SKB fragment, the mapping must be checked for
errors, otherwise the DMA debug code will complain upon unmap.
Signed-off-by: Thierry Reding
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 2 ++
1 file
gt;plat->force_thresh_dma_mode)
priv->hw->dma->dma_mode(priv->ioaddr, tc, tc, rxfifosz);
else if (priv->plat->force_sf_dma_mode || priv->plat->tx_coe) {
Reviewed-by: Mikko Perttunen
Reviewed-by: Mikko Perttunen
On 22.02.2017 17:14, Peter De Schrijver wrote:
Return the actually achieved rate in cfg->output_rate rather than just the
requested rate. This is important to make clk_round_rate return the correct
result.
Signed-off-by: Peter De Schrijver
---
drivers/clk/te
Reviewed-by: Mikko Perttunen
On 22.02.2017 17:14, Peter De Schrijver wrote:
When used as part of fractional ndiv calculations, the current range is not
enough because the denominator of the fraction is multiplied with m.
Signed-off-by: Peter De Schrijver
---
drivers/clk/tegra/clk.h | 2
Reviewed-by: Mikko Perttunen
On 22.02.2017 17:14, Peter De Schrijver wrote:
If the PLL is on, only warn if the defaults are not yet set. Otherwise be
silent.
Signed-off-by: Peter De Schrijver
---
drivers/clk/tegra/clk-tegra210.c | 18 --
1 file changed, 12 insertions(+), 6
Reviewed-by: Mikko Perttunen
On 22.02.2017 17:13, Peter De Schrijver wrote:
The parent for afi is actually mselect, not clk_m.
Signed-off-by: Peter De Schrijver
---
drivers/clk/tegra/clk-tegra-periph.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/tegra/clk
Reviewed-by: Mikko Perttunen
On 22.02.2017 17:13, Peter De Schrijver wrote:
Signed-off-by: Peter De Schrijver
---
drivers/clk/tegra/clk-tegra210.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
index 7bda8ba
Whoops, that is, after a commit message is added.
On 23.02.2017 10:17, Mikko Perttunen wrote:
Reviewed-by: Mikko Perttunen
On 22.02.2017 17:13, Peter De Schrijver wrote:
Signed-off-by: Peter De Schrijver
---
drivers/clk/tegra/clk-tegra210.c | 5 -
1 file changed, 5 deletions(-)
diff
The TRM shows a CLK_SOURCE_ISPB register, but after some discussion, it
seems like that is a documentation generation bug, so this should be
correct.
Reviewed-by: Mikko Perttunen
On 22.02.2017 17:13, Peter De Schrijver wrote:
The 2 isp clocks (ispa and ispb) share a mux/divider control. So
Reviewed-by: Mikko Perttunen
On 02/22/2017 05:13 PM, Peter De Schrijver wrote:
pll_a1 was using CLK_RST_CONTROLLER_PLLA1_MISC_0 for IDDQ control rather
than the correct register CLK_RST_CONTROLLER_PLLA1_MISC_1. Also add pll_a1
to the set of clocks defined for Tegra210.
Signed-off-by: Peter De
Missing commit message
Cheers,
Mikko.
On 02/22/2017 05:13 PM, Peter De Schrijver wrote:
Signed-off-by: Peter De Schrijver
---
drivers/clk/tegra/clk-tegra210.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
index 7bda
On 07/25/16 18:23, Mikko Perttunen wrote:
On 07/25/16 14:05, Antonio Ospite wrote:
You can also find out the length of the raw output report with trial and
error, start with a line like this:
$ sudo hexdump -v -e '49/1 "%02x " "\n"' /dev/hidraw0
and increase/dec
On 07/25/16 14:05, Antonio Ospite wrote:
On Mon, 25 Jul 2016 11:14:04 +0200
Benjamin Tissoires wrote:
On Jul 21 2016 or thereabouts, Antonio Ospite wrote:
[...]
It would be interesting to understand why some (supposedly) compatible
devices break, maybe they rely on the fact that the PS3 woul
Reviewed-by: Benjamin Tissoires
Acked-by: Antonio Ospite
Thanks!
Mikko
From: Mikko Perttunen
The FutureMax Dance Mat claims to be a SixAxis controller
but breaks if descriptor fixups are applied. Detect the
device using its USB product string and disable fixups
when it is detected.
Signed-off-by: Mikko Perttunen
---
v2: don't use usb device properties
dr
On 07/18/16 17:28, Benjamin Tissoires wrote:
On Jul 17 2016 or thereabouts, Mikko Perttunen wrote:
From: Mikko Perttunen
...
#include
#include
#include
+#include
+
+#include "usbhid/usbhid.h"
I spent a lot of effort 2 years ago to remove the usb dependency, I'd
pref
From: Mikko Perttunen
The FutureMax Dance Mat claims to be a SixAxis controller
but breaks if descriptor fixups are applied. Detect the
device using its USB product string and disable fixups
when it is detected.
Signed-off-by: Mikko Perttunen
---
drivers/hid/hid-sony.c | 15 ++-
1
On 10/20/2015 06:56 PM, Stephen Warren wrote:
...
In drivers/pci/host/pci-tegra.c tegra_pcie_get_resources() I see a call
to devm_phy_optional_get().
The SATA driver doesn't seem to do anything with phys at the moment,
although tegra124.dtsi does put phy-related properties into the SATA DT
node
The new determine_rate prototype allows for clock rates exceeding
2^31-1 Hz to be used. Switch the DFLL clock to use determine_rate
instead of round_rate and unlock the top rates supported by the
Tegra124.
Signed-off-by: Mikko Perttunen
---
drivers/clk/tegra/clk-dfll.c | 15
*hardware_vsel* regulator APIs.
Signed-off-by: Mikko Perttunen
---
This was just compile-tested as I don't have a board with this regulator.
drivers/regulator/max8973-regulator.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/regulator/max8973-regulator.c
b/drivers/regulator/ma
On 05/21/2015 06:10 PM, Arto Merilainen wrote:
...
+
+vic->rst = devm_reset_control_get(dev, "vic03");
I might prefer just "vic" as the clock/reset name. The name is often
used as a sort of "role" for the clock/reset for the device, not
necessarily the raw name of the "correct" clock/reset
Hi, very good patch!
Here are a few small comments. Aside those, you should also add a
section to
Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt in a
separate patch.
Thanks,
Mikko.
On 05/21/2015 04:20 PM, Arto Merilainen wrote:
> This patch adds support for Video Image Composito
On 05/20/15 11:34, Sascha Hauer wrote:
On Wed, May 20, 2015 at 10:12:44AM +0300, Mikko Perttunen wrote:
On 05/13/15 11:52, Sascha Hauer wrote:
The thermal code uses int, long and unsigned long for temperatures
in different places. Using an unsigned type limits the thermal framework
to positive
rs were
updated before but aren't now. But I don't know why that would matter.
Reviewed-by: Mikko Perttunen
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; crit_temp)
*temp = tz->emul_temperature;
}
Reviewed-by: Mikko Perttunen
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On 05/13/15 11:52, Sascha Hauer wrote:
The thermal code uses int, long and unsigned long for temperatures
in different places. Using an unsigned type limits the thermal framework
to positive temperatures without need. 'long' is 64bit on several
architectures which is not needed. Consistently use
ile.
Signed-off-by: Mikko Perttunen
Acked-by: Michael Turquette
---
drivers/clk/tegra/clk.c | 39 +++
drivers/clk/tegra/clk.h | 3 +++
2 files changed, 34 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c
index 41cd
On 05/19/2015 05:59 PM, Thierry Reding wrote:
On Tue, May 19, 2015 at 02:39:27PM +0300, Mikko Perttunen wrote:
This patch allows SoC-specific CAR initialization routines to register
their own reset_assert and reset_deassert callbacks with the common Tegra
CAR code. If defined, the common code
On 05/19/15 16:58, Sascha Hauer wrote:
On Mon, May 18, 2015 at 02:09:44PM +0200, Sascha Hauer wrote:
Hi Mikko,
On Mon, May 18, 2015 at 12:06:50PM +0300, Mikko Perttunen wrote:
+ for (i = 0; i < tz->trips; i++) {
+ int trip_low;
+
+ tz->ops->get_
On 05/18/15 23:28, Brian Norris wrote:
On Mon, May 18, 2015 at 10:13:46PM +0300, Mikko Perttunen wrote:
On 05/18/2015 09:44 PM, Brian Norris wrote:
On Mon, May 18, 2015 at 02:09:44PM +0200, Sascha Hauer wrote:
On Mon, May 18, 2015 at 12:06:50PM +0300, Mikko Perttunen wrote:
One interesting
Thierry for the idea.
Mikko
On 05/19/15 14:39, Mikko Perttunen wrote:
This patch allows SoC-specific CAR initialization routines to register
their own reset_assert and reset_deassert callbacks with the common Tegra
CAR code. If defined, the common code will call these callbacks when a
reset
block will complete.
Thanks to Aleksandr Frid for identifying this and
saving hours of debugging time.
Signed-off-by: Paul Walmsley
[ttynkkynen: ported to tegra124 from tegra114]
Signed-off-by: Tuomas Tynkkynen
[mikko.perttunen: ported to special reset callback]
Signed-off-by: Mikko Perttunen
ile.
Signed-off-by: Mikko Perttunen
Acked-by: Michael Turquette
---
drivers/clk/tegra/clk.c | 39 +++
drivers/clk/tegra/clk.h | 3 +++
2 files changed, 34 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c
index 41cd
On 05/18/2015 09:44 PM, Brian Norris wrote:
On Mon, May 18, 2015 at 02:09:44PM +0200, Sascha Hauer wrote:
On Mon, May 18, 2015 at 12:06:50PM +0300, Mikko Perttunen wrote:
One interesting thing I noticed was that at least the bang-bang
governor only acts if the temperature is properly smaller
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