Add QSPI controller support for Intel LGM SoC.
Note from Vignesh(mtd subsystem maintainer):
This series is a subset of "[PATCH v12 0/4] spi: cadence-quadspi: Add
support for the Cadence QSPI controller" by Ramuthevar,Vadivel MuruganX
that intended to move
cadence-quadspi driver
From: Ramuthevar Vadivel Murugan
Add multiple chipselect support for Intel LGM SoCs,
currently QSPI-NOR and QSPI-NAND supported.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/spi/spi-cadence-quadspi.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/spi/spi-
From: Ramuthevar Vadivel Murugan
Add compatible string for Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
---
Documentation/devicetree/bindings/spi/cadence-quadspi.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
b/
From: Ramuthevar Vadivel Murugan
On Intel Lightning Mountain(LGM) SoCs QSPI controller do not use
Direct Access Controller(DAC).
This patch adds a quirk to disable the Direct Access Controller
for data transfer instead it uses indirect data transfer.
Signed-off-by: Ramuthevar Vadivel Murugan
From: Ramuthevar Vadivel Murugan
Convert the cadence-quadspi.txt documentation to cadence-quadspi.yaml
remove the cadence-quadspi.txt from Documentation/devicetree/bindings/spi/
Signed-off-by: Ramuthevar Vadivel Murugan
---
.../devicetree/bindings/spi/cadence-quadspi.txt| 67 --
From: Ramuthevar Vadivel Murugan
Move the Documentation/devicetree/bindings/mtd/cadence-quadspi.txt to
Documentation/devicetree/bindings/spi/
Signed-off-by: Ramuthevar Vadivel Murugan
---
Documentation/devicetree/bindings/{mtd => spi}/cadence-quadspi.txt | 0
1 file changed, 0 insertions(+),
From: Ramuthevar Vadivel Murugan
Add QSPI controller support for Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/spi/Kconfig | 2 +-
drivers/spi/spi-cadence-quadspi.c | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/Kconfig
From: Ramuthevar Vadivel Murugan
This patch adds the new IP of Nand Flash Controller(NFC) support
on Intel's Lightning Mountain(LGM) SoC.
DMA is used for burst data transfer operation, also DMA HW supports
aligned 32bit memory address and aligned data access by default.
DMA burst of 8 supported.
This patch adds the new IP of Nand Flash Controller(NFC) support
on Intel's Lightning Mountain(LGM) SoC.
DMA is used for burst data transfer operation, also DMA HW supports
aligned 32bit memory address and aligned data access by default.
DMA burst of 8 supported. Data register used to support the
From: Ramuthevar Vadivel Murugan
Add YAML file for dt-bindings to support NAND Flash Controller
on Intel's Lightning Mountain SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Rob Herring
---
.../devicetree/bindings/mtd/intel,lgm-nand.yaml| 99 ++
1 file cha
Hi Miquel,
On 28/9/2020 10:25 pm, Miquel Raynal wrote:
Hello,
"Ramuthevar,Vadivel MuruganX"
wrote on Thu, 24 Sep 2020
16:48:40 +0800:
This patch adds the new IP of Nand Flash Controller(NFC) support
on Intel's Lightning Mountain(LGM) SoC.
DMA is used for burst data transfer
From: Ramuthevar Vadivel Murugan
Add YAML file for dt-bindings to support NAND Flash Controller
on Intel's Lightning Mountain SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Rob Herring
---
.../devicetree/bindings/mtd/intel,lgm-nand.yaml| 99 ++
1 file cha
This patch adds the new IP of Nand Flash Controller(NFC) support
on Intel's Lightning Mountain(LGM) SoC.
DMA is used for burst data transfer operation, also DMA HW supports
aligned 32bit memory address and aligned data access by default.
DMA burst of 8 supported. Data register used to support the
From: Ramuthevar Vadivel Murugan
Add YAML file for dt-bindings to support NAND Flash Controller
on Intel's Lightning Mountain SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
---
.../devicetree/bindings/mtd/intel,lgm-nand.yaml| 99 ++
1 file changed, 99 insertions(+)
cr
Hi Randy,
Thank you for the report, surely will fix it.
Regards
Vadivel
On 21/9/2020 11:45 pm, Randy Dunlap wrote:
Ping. Still seeing this in linux-next.
On 9/17/20 10:51 AM, Randy Dunlap wrote:
From: Randy Dunlap
Fix a Kconfig warning that is causing lots of build errors
when USB_SUPPO
Hi Andy,
Thank you for the review comments...
On 17/9/2020 9:05 pm, Andy Shevchenko wrote:
On Thu, Sep 17, 2020 at 08:33:08AM +0800, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
This patch adds the new IP of Nand Flash Controller(NFC) support
on Intel's Ligh
This patch adds the new IP of Nand Flash Controller(NFC) support
on Intel's Lightning Mountain(LGM) SoC.
DMA is used for burst data transfer operation, also DMA HW supports
aligned 32bit memory address and aligned data access by default.
DMA burst of 8 supported. Data register used to support the
From: Ramuthevar Vadivel Murugan
Add YAML file for dt-bindings to support NAND Flash Controller
on Intel's Lightning Mountain SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Rob Herring
---
.../devicetree/bindings/mtd/intel,lgm-nand.yaml| 99 ++
1 file cha
Hi Miquel,
Thank you for your review comments...
On 7/9/2020 9:20 pm, Miquel Raynal wrote:
Hi Murugan,
A few more comments below, but I guess the driver looks better now.
+struct ebu_nand_controller {
+ struct nand_controller controller;
+ struct nand_chip chip;
+ struct de
23 am, Ramuthevar,Vadivel MuruganX wrote:
The USB PHY provides the optimized for low power dissipation while active,
idle, or on standby.
Requires minimal external components, a single resistor, for best operation.
Supports 10/5-Gbps high-speed data transmission rates through 3-m USB 3.x cable
---
v9:
-
Hi,
On 21/8/2020 7:37 pm, Wan Ahmad Zainie wrote:
Rename phy-intel-{combo,emmc}.c to phy-intel-lgm-{combo,emmc}.c
to make drivers/phy/intel directory more generic for future use.
Signed-off-by: Wan Ahmad Zainie
---
drivers/phy/intel/Kconfig | 10 +-
driv
From: Ramuthevar Vadivel Murugan
Add support for USB PHY on Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Philipp Zabel
---
drivers/phy/Kconfig | 10 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-lgm-usb.c | 284 +
From: Ramuthevar Vadivel Murugan
Add the dt-schema to support USB PHY on Intel LGM SoC
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Rob Herring
---
.../devicetree/bindings/phy/intel,lgm-usb-phy.yaml | 58 ++
1 file changed, 58 insertions(+)
create mode 100644 D
The USB PHY provides the optimized for low power dissipation while active,
idle, or on standby.
Requires minimal external components, a single resistor, for best operation.
Supports 10/5-Gbps high-speed data transmission rates through 3-m USB 3.x cable
---
v9:
- Vinod review comments update
-
Hi,
On 27/8/2020 4:11 pm, Chanwoo Choi wrote:
On 8/27/20 4:53 PM, Ramuthevar, Vadivel MuruganX wrote:
Hi,
On 27/8/2020 3:56 pm, Chanwoo Choi wrote:
On 8/27/20 3:51 PM, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Set the capability value of property for VBUS and
Hi,
On 27/8/2020 3:56 pm, Chanwoo Choi wrote:
On 8/27/20 3:51 PM, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Set the capability value of property for VBUS and POLARITY.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/extcon/extcon-ptn5150.c | 7 +++
1
From: Ramuthevar Vadivel Murugan
Set the capability value of property for VBUS and POLARITY.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/extcon/extcon-ptn5150.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/extcon/extcon-ptn5150.c b/drivers/extcon/extcon-ptn5150
Add usb-typec detection support for the Intel LGM SoC based boards.
Original driver is not supporting usb detection on Intel LGM SoC based boards
then we debugged and fixed the issue, but before sending our patches Mr.Krzyszto
has sent the same kind of patches, so I have rebased over his latest pa
Hi,
On 27/8/2020 1:35 pm, Chanwoo Choi wrote:
Hi,
On 8/27/20 2:17 PM, Ramuthevar, Vadivel MuruganX wrote:
Hi,
On 27/8/2020 12:51 pm, Chanwoo Choi wrote:
Hi,
You better to change the 'state' word to 'capability'.
Actually, this patch doesn't change the valu
Hi,
On 27/8/2020 1:26 pm, Chanwoo Choi wrote:
-
+ vendor_id = FIELD_GET(PTN5150_REG_DEVICE_ID_VENDOR, reg_data);
+ version_id = FIELD_GET(PTN5150_REG_DEVICE_ID_VERSION, reg_data);
dev_dbg(info->dev, "Device type: version: 0x%x, vendor: 0x%x\n",
version_id, ven
Thank you for the review comments, sure will update.
On 8/27/20 12:56 PM, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Set the VBUS and POLARITY property state.
ditto. Need to change the work from 'state' and 'capability'.
Noted.
Signed-off-by: R
From: Ramuthevar Vadivel Murugan
Set the VBUS and POLARITY property state.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/extcon/extcon-ptn5150.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/extcon/extcon-ptn5150.c b/drivers/extcon/extcon-ptn5150.c
index 8b930050a3
Add usb-typec detection support for the Intel LGM SoC based boards.
Original driver is not supporting usb detection on Intel LGM SoC based boards
then we debugged and fixed the issue, but before sending our patches Mr.Krzyszto
has sent the same kind of patches, so I have rebased over his latest pa
From: Ramuthevar Vadivel Murugan
Switch to GENMASK() and BIT() macros.
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Krzysztof Kozlowski
---
drivers/extcon/extcon-ptn5150.c | 43 +++--
1 file changed, 11 insertions(+), 32 deletions(-)
diff --git
Hi Andy,
On 26/8/2020 5:18 pm, Andy Shevchenko wrote:
On Wed, Aug 26, 2020 at 10:51:37AM +0800, Ramuthevar, Vadivel MuruganX wrote:
On 25/8/2020 4:19 pm, Heikki Krogerus wrote:
On Wed, Aug 19, 2020 at 04:45:38PM +0800, Ramuthevar, Vadivel MuruganX wrote:
On 19/8/2020 3:55 pm, Andy Shevchenko
Hi,
On 26/8/2020 2:59 pm, Krzysztof Kozlowski wrote:
On Tue, Aug 18, 2020 at 02:57:21PM +0800, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Switch to BIT() macro for the cable attach.
Squash it.
Sure, will squash it and rebase over your patches then send it, thanks
Hi,
On 26/8/2020 2:59 pm, Krzysztof Kozlowski wrote:
On Tue, Aug 18, 2020 at 02:57:20PM +0800, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Switch to GENMASK() for VBUS detection macro.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/extcon/extcon-ptn5150.c
Hi,
Thank you very much for the review comments...
On 25/8/2020 6:46 pm, Chanwoo Choi wrote:
Hi,
On 8/25/20 5:31 PM, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Add usb-typec detection support for Intel LGM SoC based
boards.
Signed-off-by: Ramuthevar Vadivel
Hi Heikki,
Thank you very much for the review comment...
On 25/8/2020 4:19 pm, Heikki Krogerus wrote:
On Wed, Aug 19, 2020 at 04:45:38PM +0800, Ramuthevar, Vadivel MuruganX wrote:
Hi Andy,
On 19/8/2020 3:55 pm, Andy Shevchenko wrote:
On Wed, Aug 19, 2020 at 8:38 AM Ramuthevar, Vadivel
Hi,
Thank you for the review comments...
On 25/8/2020 4:40 pm, Krzysztof Kozlowski wrote:
On Tue, Aug 25, 2020 at 04:31:47PM +0800, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Add usb-typec detection support for Intel LGM SoC based
boards.
Signed-off-by
Add usb-typec detection support for the Intel LGM SoC based boards.
Original driver is not supporting usb detection on Intel LGM SoC based boards
then we debugged and fixed the issue, but before sending our patches Mr.Krzyszto
has sent the same kind of patches, so I have rebased over his latest pa
From: Ramuthevar Vadivel Murugan
Add usb-typec detection support for Intel LGM SoC based
boards.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/extcon/extcon-ptn5150.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/extcon/extcon-ptn5150.c b/drivers/extcon/extcon-ptn5150.
Hi Vinod,
Thank you for the review comments...
On 24/8/2020 12:06 am, Vinod Koul wrote:
On 17-08-20, 15:05, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Add support for USB PHY on Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Philipp Zabel
Hi,
On 24/8/2020 6:38 pm, Krzysztof Kozlowski wrote:
On Mon, Aug 24, 2020 at 06:36:04PM +0800, Ramuthevar, Vadivel MuruganX wrote:
Hi,
Thank you for the patches and optimized the code as well.
I have applied your patches and tested, it's working fine
with few minor changes a
Hi,
Thank you for the patches and optimized the code as well.
I have applied your patches and tested, it's working fine
with few minor changes as per Intel's LGM board.
can I send the patches along with patches or we need to wait until
your patch get merge?
Please suggest to me go further
Hi Kishon, Vinod,
Gentle reminder!, kindly can you please merge this series of patches, as
those patches got Reviewed-By Philipp Zabel and Rob Herring, Thanks!
Please do the needful.
Regards
Vadivel
On 17/8/2020 11:12 am, Ramuthevar,Vadivel MuruganX wrote:
The USB PHY provides the
Hi Andy,
On 19/8/2020 3:55 pm, Andy Shevchenko wrote:
On Wed, Aug 19, 2020 at 8:38 AM Ramuthevar, Vadivel MuruganX
wrote:
On 18/8/2020 4:40 pm, Andy Shevchenko wrote:
On Tue, Aug 18, 2020 at 02:57:18PM +0800, Ramuthevar,Vadivel MuruganX wrote:
USB external connector chip PTN5150 used on the
Hi Andy,
On 18/8/2020 4:40 pm, Andy Shevchenko wrote:
On Tue, Aug 18, 2020 at 02:57:18PM +0800, Ramuthevar,Vadivel MuruganX wrote:
USB external connector chip PTN5150 used on the Intel LGM SoC
boards to detect the USB type and connection.
Internally I meant you can send cleanups, but couple
From: Ramuthevar Vadivel Murugan
Switch to GENMASK() for VBUS detection macro.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/extcon/extcon-ptn5150.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/extcon/extcon-ptn5150.c b/drivers/extcon/extcon-ptn
From: Ramuthevar Vadivel Murugan
Switch to BIT() macro for the cable attach.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/extcon/extcon-ptn5150.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/extcon/extcon-ptn5150.c b/drivers/extcon/extcon-ptn5150.c
i
From: Ramuthevar Vadivel Murugan
Set and get the VBUS and POLARITY property state.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/extcon/extcon-ptn5150.c | 75 ++---
1 file changed, 55 insertions(+), 20 deletions(-)
diff --git a/drivers/extcon/extco
From: Ramuthevar Vadivel Murugan
Add USB debug accessory support.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/extcon/extcon-ptn5150.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/extcon/extcon-ptn5150.c b/drivers/extcon/extcon-ptn5150.c
index 5612dc0ef2af..b985
From: Ramuthevar Vadivel Murugan
Remove the unused variable and extra space.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/extcon/extcon-ptn5150.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/extcon/extcon-ptn5150.c b/drivers/extcon/extcon-ptn5150.c
index 140994ac43ed
From: Ramuthevar Vadivel Murugan
Switch to GENMASK() macro for the port attachment.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/extcon/extcon-ptn5150.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/extcon/extcon-ptn5150.c b/drivers/extcon/extco
From: Ramuthevar Vadivel Murugan
Add USB analog audio accessory attached and detection support.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/extcon/extcon-ptn5150.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/extcon/extcon-ptn5150.c b/drivers/extcon/extcon-ptn5
From: Ramuthevar Vadivel Murugan
Switch to GENMASK() for vendor_id and device_id macros.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/extcon/extcon-ptn5150.c | 16 +---
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/drivers/extcon/extcon-ptn5150.c b/driver
From: Ramuthevar Vadivel Murugan
Switch to BIT() macro for the cable detach.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/extcon/extcon-ptn5150.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/extcon/extcon-ptn5150.c b/drivers/extcon/extcon-ptn5150.c
USB external connector chip PTN5150 used on the Intel LGM SoC
boards to detect the USB type and connection.
---
v1:
- Initial version
Ramuthevar Vadivel Murugan (9):
extcon: extcon-ptn5150: Switch to GENMASK() for vendor and device ID's
extcon: extcon-ptn5150: Switch to GENMASK() for VBUS de
The USB PHY provides the optimized for low power dissipation while active,
idle, or on standby.
Requires minimal external components, a single resistor, for best operation.
Supports 10/5-Gbps high-speed data transmission rates through 3-m USB 3.x cable
---
v8-resend:
- Correct the typo error in m
From: Ramuthevar Vadivel Murugan
Add the dt-schema to support USB PHY on Intel LGM SoC
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Rob Herring
---
.../devicetree/bindings/phy/intel,lgm-usb-phy.yaml | 58 ++
1 file changed, 58 insertions(+)
create mode 100644 D
From: Ramuthevar Vadivel Murugan
Add support for USB PHY on Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Philipp Zabel
---
drivers/phy/Kconfig | 11 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-lgm-usb.c | 278 +
Hi Felipe,
On 17/8/2020 2:08 pm, Felipe Balbi wrote:
Hi
On Mon, Aug 17, 2020 at 6:13 AM Ramuthevar,Vadivel MuruganX
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index c27408e4daae..90030ff299eb 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -1,4 +1,4 @@
-# SPDX
From: Ramuthevar Vadivel Murugan
This patch adds the new IP of Nand Flash Controller(NFC) support
on Intel's Lightning Mountain(LGM) SoC.
DMA is used for burst data transfer operation, also DMA HW supports
aligned 32bit memory address and aligned data access by default.
DMA burst of 8 supported.
From: Ramuthevar Vadivel Murugan
Add YAML file for dt-bindings to support NAND Flash Controller
on Intel's Lightning Mountain SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Rob Herring
---
.../devicetree/bindings/mtd/intel,lgm-nand.yaml| 99 ++
1 file cha
This patch adds the new IP of Nand Flash Controller(NFC) support
on Intel's Lightning Mountain(LGM) SoC.
DMA is used for burst data transfer operation, also DMA HW supports
aligned 32bit memory address and aligned data access by default.
DMA burst of 8 supported. Data register used to support the
The USB PHY provides the optimized for low power dissipation while active,
idle, or on standby.
Requires minimal external components, a single resistor, for best operation.
Supports 10/5-Gbps high-speed data transmission rates through 3-m USB 3.x cable
---
v8:
- Rebase to V5.9-rc1
v7:
- No Cha
From: Ramuthevar Vadivel Murugan
Add support for USB PHY on Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Philipp Zabel
---
drivers/phy/Kconfig | 11 ++
drivers/phy/Makefile | 3 +-
drivers/phy/phy-lgm-usb.c | 278
From: Ramuthevar Vadivel Murugan
Add the dt-schema to support USB PHY on Intel LGM SoC
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Rob Herring
---
.../devicetree/bindings/phy/intel,lgm-usb-phy.yaml | 58 ++
1 file changed, 58 insertions(+)
create mode 100644 D
Hi Andy,
On 27/7/2020 7:09 pm, Andy Shevchenko wrote:
On Mon, Jul 27, 2020 at 1:08 PM Ramuthevar,Vadivel MuruganX
wrote:
The USB PHY provides the optimized for low power dissipation while active,
idle, or on standby.
Requires minimal external components, a single resistor, for best
From: Ramuthevar Vadivel Murugan
Add support for USB PHY on Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Philipp Zabel
---
drivers/phy/Kconfig | 11 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-lgm-usb.c | 278 +
From: Ramuthevar Vadivel Murugan
Add the dt-schema to support USB PHY on Intel LGM SoC
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Rob Herring
---
.../devicetree/bindings/phy/intel,lgm-usb-phy.yaml | 58 ++
1 file changed, 58 insertions(+)
create mode 100644 D
The USB PHY provides the optimized for low power dissipation while active,
idle, or on standby.
Requires minimal external components, a single resistor, for best operation.
Supports 10/5-Gbps high-speed data transmission rates through 3-m USB 3.x cable
---
v7:
- No Change
v6:
- No Change
v5:
Hi Rob,
On 15/7/2020 2:01 am, Rob Herring wrote:
On Tue, 14 Jul 2020 12:26:20 +0800, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Add the dt-schema to support USB PHY on Intel LGM SoC
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Rob Herring
From: Ramuthevar Vadivel Murugan
Add the dt-schema to support USB PHY on Intel LGM SoC
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Rob Herring
---
.../devicetree/bindings/phy/intel,lgm-usb-phy.yaml | 53 ++
1 file changed, 53 insertions(+)
create mode 100644 D
From: Ramuthevar Vadivel Murugan
Add support for USB PHY on Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Philipp Zabel
---
drivers/phy/Kconfig | 11 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-lgm-usb.c | 278 +
The USB PHY provides the optimized for low power dissipation while active,
idle, or on standby.
Requires minimal external components, a single resistor, for best operation.
Supports 10/5-Gbps high-speed data transmission rates through 3-m USB 3.x cable
---
v6:
- No Change
v5:
- As per Felipe a
Hi Rob,
On 13/7/2020 11:07 pm, Rob Herring wrote:
On Mon, 13 Jul 2020 16:54:52 +0800, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Add the dt-schema to support USB PHY on Intel LGM SoC
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Rob Herring
Hi Rob,
On 13/7/2020 11:08 pm, Rob Herring wrote:
On Mon, Jul 13, 2020 at 04:54:52PM +0800, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Add the dt-schema to support USB PHY on Intel LGM SoC
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Rob Herring
The USB PHY provides the optimized for low power dissipation while active,
idle, or on standby.
Requires minimal external components, a single resistor, for best operation.
Supports 10/5-Gbps high-speed data transmission rates through 3-m USB 3.x cable
---
v5:
- As per Felipe and Greg's suggesti
From: Ramuthevar Vadivel Murugan
Add support for USB PHY on Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Philipp Zabel
---
drivers/phy/Kconfig | 11 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-lgm-usb.c | 278 +
From: Ramuthevar Vadivel Murugan
Add the dt-schema to support USB PHY on Intel LGM SoC
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Rob Herring
---
.../devicetree/bindings/phy/intel,lgm-usb-phy.yaml | 53 ++
1 file changed, 53 insertions(+)
create mode 100644 D
Hi,
On 10/7/2020 2:08 pm, Felipe Balbi wrote:
Hi,
"Ramuthevar,Vadivel MuruganX"
writes:
From: Ramuthevar Vadivel Murugan
Add support for USB PHY on Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/usb/phy/Kconfig | 11 ++
drivers/usb/ph
From: Ramuthevar Vadivel Murugan
This patch adds the new IP of Nand Flash Controller(NFC) support
on Intel's Lightning Mountain(LGM) SoC.
DMA is used for burst data transfer operation, also DMA HW supports
aligned 32bit memory address and aligned data access by default.
DMA burst of 8 supported.
From: Ramuthevar Vadivel Murugan
Add YAML file for dt-bindings to support NAND Flash Controller
on Intel's Lightning Mountain SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Rob Herring
---
.../devicetree/bindings/mtd/intel,lgm-nand.yaml| 99 ++
1 file cha
This patch adds the new IP of Nand Flash Controller(NFC) support
on Intel's Lightning Mountain(LGM) SoC.
DMA is used for burst data transfer operation, also DMA HW supports
aligned 32bit memory address and aligned data access by default.
DMA burst of 8 supported. Data register used to support the
Hi Miquel,
Thank you very much for the review comments and your time...
On 26/6/2020 3:09 pm, Miquel Raynal wrote:
Hello,
"Ramuthevar,Vadivel MuruganX"
wrote on Tue, 16 Jun 2020
17:33:32 +0800:
From: Ramuthevar Vadivel Murugan
This patch adds the new IP of Nand Flash Cont
The USB PHY provides the optimized for low power dissipation while active,
idle, or on standby.
Requires minimal external components, a single resistor, for best operation.
Supports 10/5-Gbps high-speed data transmission rates through 3-m USB 3.x cable
---
v4:
- Andy's review comments addressed
From: Ramuthevar Vadivel Murugan
Add support for USB PHY on Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/usb/phy/Kconfig | 11 ++
drivers/usb/phy/Makefile | 1 +
drivers/usb/phy/phy-lgm-usb.c | 275 ++
3 files chang
From: Ramuthevar Vadivel Murugan
Add the dt-schema to support USB PHY on Intel LGM SoC
Signed-off-by: Ramuthevar Vadivel Murugan
---
.../devicetree/bindings/usb/intel,lgm-usb-phy.yaml | 53 ++
1 file changed, 53 insertions(+)
create mode 100644 Documentation/devicetree/bi
Hi Andy,
Thank you very much for the review comments and your time...
On 12/6/2020 9:18 pm, Andy Shevchenko wrote:
On Fri, Jun 12, 2020 at 10:59:41AM +0800, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Add support for USB PHY on Intel LGM SoC.
Thank you for an
From: Ramuthevar Vadivel Murugan
This patch adds the new IP of Nand Flash Controller(NFC) support
on Intel's Lightning Mountain(LGM) SoC.
DMA is used for burst data transfer operation, also DMA HW supports
aligned 32bit memory address and aligned data access by default.
DMA burst of 8 supported.
From: Ramuthevar Vadivel Murugan
Add YAML file for dt-bindings to support NAND Flash Controller
on Intel's Lightning Mountain SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Rob Herring
---
.../devicetree/bindings/mtd/intel,lgm-nand.yaml| 99 ++
1 file cha
This patch adds the new IP of Nand Flash Controller(NFC) support
on Intel's Lightning Mountain(LGM) SoC.
DMA is used for burst data transfer operation, also DMA HW supports
aligned 32bit memory address and aligned data access by default.
DMA burst of 8 supported. Data register used to support the
From: Ramuthevar Vadivel Murugan
Add support for USB PHY on Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/usb/phy/Kconfig | 11 ++
drivers/usb/phy/Makefile | 1 +
drivers/usb/phy/phy-lgm-usb.c | 278 ++
3 files chang
From: Ramuthevar Vadivel Murugan
Add the dt-schema to support USB PHY on Intel LGM SoC
Signed-off-by: Ramuthevar Vadivel Murugan
---
.../devicetree/bindings/usb/intel,lgm-usb-phy.yaml | 53 ++
1 file changed, 53 insertions(+)
create mode 100644 Documentation/devicetree/bi
The USB PHY provides the optimized for low power dissipation while active,
idle, or on standby.
Requires minimal external components, a single resistor, for best operation.
Supports 10/5-Gbps high-speed data transmission rates through 3-m USB 3.x cable
---
v3:
- Andy's review comments update
-
Hi Andy,
Thank you very much for prompt review comments...
On 11/6/2020 4:57 pm, Andy Shevchenko wrote:
On Thu, Jun 11, 2020 at 04:36:29PM +0800, Ramuthevar, Vadivel MuruganX wrote:
On 11/6/2020 4:12 pm, Andy Shevchenko wrote:
On Thu, Jun 11, 2020 at 10:12:46AM +0800, Ramuthevar,Vadivel
Hi Andy,
Thank you so much for the review comments...
On 11/6/2020 4:12 pm, Andy Shevchenko wrote:
On Thu, Jun 11, 2020 at 10:12:46AM +0800, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Add support for USB PHY on Intel LGM SoC.
...
+static int get_flipped(struct
From: Ramuthevar Vadivel Murugan
Add the dt-schema to support USB PHY on Intel LGM SoC
Signed-off-by: Ramuthevar Vadivel Murugan
---
.../devicetree/bindings/usb/intel,lgm-usb-phy.yaml | 53 ++
1 file changed, 53 insertions(+)
create mode 100644 Documentation/devicetree/bi
From: Ramuthevar Vadivel Murugan
Add support for USB PHY on Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/usb/phy/Kconfig | 11 ++
drivers/usb/phy/Makefile | 1 +
drivers/usb/phy/phy-lgm-usb.c | 280 ++
3 files chang
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