[v0 0/2] Add support for QCOM cpufreq FW driver

The CPUfreq FW present in some QCOM chipsets offloads the steps necessary for hanging the frequency of CPUs. The driver implements the cpufreq driver interface for this firmware. Taniya Das (2): dt-bindings: clock: Introduce QCOM CPUFREQ FW bindings cpufreq: qcom-fw: Add support for QCOM

[v0 0/2] Add support for QCOM cpufreq FW driver

The CPUfreq FW present in some QCOM chipsets offloads the steps necessary for hanging the frequency of CPUs. The driver implements the cpufreq driver interface for this firmware. Taniya Das (2): dt-bindings: clock: Introduce QCOM CPUFREQ FW bindings cpufreq: qcom-fw: Add support for QCOM

[v0 1/2] dt-bindings: clock: Introduce QCOM CPUFREQ FW bindings

Add QCOM cpufreq firmware device bindings for Qualcomm Technology Inc's SoCs. This is required for managing the cpu frequency transitions which are controlled by firmware. Signed-off-by: Taniya Das --- .../bindings/cpufreq/cpufreq-qcom-fw.txt | 68 ++ 1 file

[v9] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

iver [2] which are both still undergoing review. Thanks, Taniya [1]: https://lkml.org/lkml/2018/3/9/979 [2]: https://lkml.org/lkml/2018/3/14/787 Taniya Das (1): clk: qcom: clk-rpmh: Add QCOM RPMh clock driver drivers/clk/qcom/Kconfig| 9 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/q

[v9] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

iver [2] which are both still undergoing review. Thanks, Taniya [1]: https://lkml.org/lkml/2018/3/9/979 [2]: https://lkml.org/lkml/2018/3/14/787 Taniya Das (1): clk: qcom: clk-rpmh: Add QCOM RPMh clock driver drivers/clk/qcom/Kconfig| 9 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/q

[v9] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: Taniya Das <t...@codeaurora.org> --- drivers/clk/qcom/Kconfig| 9 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-rpmh.c

[v9] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: Taniya Das --- drivers/clk/qcom/Kconfig| 9 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-rpmh.c | 333

Re: [v8] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Hello Stephen, Thanks for your review comments, please check my comments below, so that I could submit the next patch series. On 5/8/2018 5:58 AM, Stephen Boyd wrote: Quoting Taniya Das (2018-05-07 03:48:06) Hello Stephen, Could you please let me know your comments on the below. On 5/4

Re: [v8] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Hello Stephen, Thanks for your review comments, please check my comments below, so that I could submit the next patch series. On 5/8/2018 5:58 AM, Stephen Boyd wrote: Quoting Taniya Das (2018-05-07 03:48:06) Hello Stephen, Could you please let me know your comments on the below. On 5/4

Re: [v8] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Hello Stephen, Could you please let me know your comments on the below. On 5/4/2018 10:21 PM, Stephen Boyd wrote: Quoting Taniya Das (2018-05-04 03:02:38) diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c new file mode 100644 index 000..944fe04 --- /dev/null +++ b

Re: [v8] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Hello Stephen, Could you please let me know your comments on the below. On 5/4/2018 10:21 PM, Stephen Boyd wrote: Quoting Taniya Das (2018-05-04 03:02:38) diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c new file mode 100644 index 000..944fe04 --- /dev/null +++ b

Re: [PATCH v1] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

Yeah sure Stephen. On 5/5/2018 8:21 AM, Stephen Boyd wrote: Quoting Taniya Das (2018-05-03 02:09:57) Hello Stephen, I have tested the below patch & didn't see any issues. Alright. Thanks! Can I take that as a "Tested-by"? -- QUALCOMM INDIA, on behalf of Qualcomm Innovati

Re: [PATCH v1] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

Yeah sure Stephen. On 5/5/2018 8:21 AM, Stephen Boyd wrote: Quoting Taniya Das (2018-05-03 02:09:57) Hello Stephen, I have tested the below patch & didn't see any issues. Alright. Thanks! Can I take that as a "Tested-by"? -- QUALCOMM INDIA, on behalf of Qualcomm Innovati

[v8] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: Taniya Das <t...@codeaurora.org> --- drivers/clk/qcom/Kconfig| 9 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-rpmh.c

[v8] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: Taniya Das --- drivers/clk/qcom/Kconfig| 9 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-rpmh.c | 334

[v8] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

send requests for the RPMh managed clock resources. The RPMh clock driver depends upon the RPMh driver [1] and command DB driver [2] which are both still undergoing review. Thanks, Taniya [1]: https://lkml.org/lkml/2018/3/9/979 [2]: https://lkml.org/lkml/2018/3/14/787 Taniya Das (1): clk: qcom: clk-

[v8] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

send requests for the RPMh managed clock resources. The RPMh clock driver depends upon the RPMh driver [1] and command DB driver [2] which are both still undergoing review. Thanks, Taniya [1]: https://lkml.org/lkml/2018/3/9/979 [2]: https://lkml.org/lkml/2018/3/14/787 Taniya Das (1): clk: qcom: clk-

[v7 0/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

both still undergoing review. Thanks, Taniya [1]: https://lkml.org/lkml/2018/3/9/979 [2]: https://lkml.org/lkml/2018/3/14/787 Taniya Das (1): clk: qcom: clk-rpmh: Add QCOM RPMh clock driver drivers/clk/qcom/Kconfig| 9 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-rpmh.c |

[v7] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: Taniya Das <t...@codeaurora.org> --- drivers/clk/qcom/Kconfig| 9 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-rpmh.c

[v7 0/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

both still undergoing review. Thanks, Taniya [1]: https://lkml.org/lkml/2018/3/9/979 [2]: https://lkml.org/lkml/2018/3/14/787 Taniya Das (1): clk: qcom: clk-rpmh: Add QCOM RPMh clock driver drivers/clk/qcom/Kconfig| 9 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-rpmh.c |

[v7] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: Taniya Das --- drivers/clk/qcom/Kconfig| 9 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-rpmh.c | 368

Re: [PATCH 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Hello Stephen, Thanks for review. On 5/2/2018 9:00 PM, Stephen Boyd wrote: Quoting Taniya Das (2018-05-02 03:51:17) + ret = devm_clk_hw_register(>dev, hw_clks[i]); + if (ret) { + dev_err(>dev, "failed to re

Re: [PATCH 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Hello Stephen, Thanks for review. On 5/2/2018 9:00 PM, Stephen Boyd wrote: Quoting Taniya Das (2018-05-02 03:51:17) + ret = devm_clk_hw_register(>dev, hw_clks[i]); + if (ret) { + dev_err(>dev, "failed to re

Re: [PATCH v1] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

Hello Stephen, I have tested the below patch & didn't see any issues. On 5/2/2018 12:27 PM, Stephen Boyd wrote: Quoting Taniya Das (2018-04-30 22:03:33) @@ -45,15 +50,28 @@ #define domain_to_gdsc(domain) container_of(domain, struct gdsc, pd) -static int gdsc_is_enabled(struct gdsc

Re: [PATCH v1] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

Hello Stephen, I have tested the below patch & didn't see any issues. On 5/2/2018 12:27 PM, Stephen Boyd wrote: Quoting Taniya Das (2018-04-30 22:03:33) @@ -45,15 +50,28 @@ #define domain_to_gdsc(domain) container_of(domain, struct gdsc, pd) -static int gdsc_is_enabled(struct gdsc

[PATCH] clk: qcom: Add support for RCG to register for DFS

In the cases where a RCG requires a Dynamic Frequency switch support requires to register which would at runtime read the clock perf level registers to identify the frequencies supported and update the frequency table accordingly. Signed-off-by: Taniya Das <t...@codeaurora.org> --- drive

[PATCH] clk: qcom: Add support for RCG to register for DFS

In the cases where a RCG requires a Dynamic Frequency switch support requires to register which would at runtime read the clock perf level registers to identify the frequencies supported and update the frequency table accordingly. Signed-off-by: Taniya Das --- drivers/clk/qcom/clk-rcg.h | 7

[PATCH 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: Taniya Das <t...@codeaurora.org> --- drivers/clk/qcom/Kconfig| 9 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-rpmh.c

[PATCH 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: Taniya Das --- drivers/clk/qcom/Kconfig| 9 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-rpmh.c | 366

[v6 0/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

/3/9/979 [2]: https://lkml.org/lkml/2018/3/14/787 Taniya Das (2): dt-bindings: clock: Introduce QCOM RPMh clock bindings clk: qcom: clk-rpmh: Add QCOM RPMh clock driver .../devicetree/bindings/clock/qcom,rpmh-clk.txt| 53 +++ drivers/clk/qcom/Kconfig | 9 + dri

[v6 0/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

/3/9/979 [2]: https://lkml.org/lkml/2018/3/14/787 Taniya Das (2): dt-bindings: clock: Introduce QCOM RPMh clock bindings clk: qcom: clk-rpmh: Add QCOM RPMh clock driver .../devicetree/bindings/clock/qcom,rpmh-clk.txt| 53 +++ drivers/clk/qcom/Kconfig | 9 + dri

[PATCH 1/2] dt-bindings: clock: Introduce QCOM RPMh clock bindings

Add RPMh clock device bindings for Qualcomm Technology Inc's SoCs. These devices would be used for communicating resource state requests to control the clocks managed by RPMh. Signed-off-by: Taniya Das <t...@codeaurora.org> Reviewed-by: Rob Herring <r...@kernel.org> --- .../devicet

[PATCH 1/2] dt-bindings: clock: Introduce QCOM RPMh clock bindings

Add RPMh clock device bindings for Qualcomm Technology Inc's SoCs. These devices would be used for communicating resource state requests to control the clocks managed by RPMh. Signed-off-by: Taniya Das Reviewed-by: Rob Herring --- .../devicetree/bindings/clock/qcom,rpmh-clk.txt| 46

Re: [v5 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Thanks Stephen for the comments. On 5/2/2018 2:57 AM, Stephen Boyd wrote: Quoting Taniya Das (2018-05-01 01:41:33) Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: Amit Nischal <anisc...@codeaurora.

Re: [v5 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Thanks Stephen for the comments. On 5/2/2018 2:57 AM, Stephen Boyd wrote: Quoting Taniya Das (2018-05-01 01:41:33) Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: Amit Nischal Signed-off-by: Taniya Das

Re: [v5 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

On 5/1/2018 6:13 PM, Rob Herring wrote: On Tue, May 01, 2018 at 02:11:33PM +0530, Taniya Das wrote: Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: Amit Nischal <anisc...@codeaurora.org> Sign

Re: [v5 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

On 5/1/2018 6:13 PM, Rob Herring wrote: On Tue, May 01, 2018 at 02:11:33PM +0530, Taniya Das wrote: Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: Amit Nischal Signed-off-by: Taniya Das --- drivers/clk

[v5 1/2] dt-bindings: clock: Introduce QCOM RPMh clock bindings

Add RPMh clock device bindings for Qualcomm Technology Inc's SoCs. These devices would be used for communicating resource state requests to control the clocks managed by RPMh. Signed-off-by: Amit Nischal <anisc...@codeaurora.org> Signed-off-by: Taniya Das <t...@codeaurora.org> Revi

[v5 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: Amit Nischal <anisc...@codeaurora.org> Signed-off-by: Taniya Das <t...@codeaurora.org> --- drivers/clk/qcom/Kconfig | 9 + driv

[v5 1/2] dt-bindings: clock: Introduce QCOM RPMh clock bindings

Add RPMh clock device bindings for Qualcomm Technology Inc's SoCs. These devices would be used for communicating resource state requests to control the clocks managed by RPMh. Signed-off-by: Amit Nischal Signed-off-by: Taniya Das Reviewed-by: Rob Herring --- .../devicetree/bindings/clock/qcom

[v5 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: Amit Nischal Signed-off-by: Taniya Das --- drivers/clk/qcom/Kconfig | 9 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk

[v5 0/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

send requests for the RPMh managed clock resources. The RPMh clock driver depends upon the RPMh driver [1] and command DB driver [2] which are both still undergoing review. Thanks, Taniya [1]: https://lkml.org/lkml/2018/3/9/979 [2]: https://lkml.org/lkml/2018/3/14/787 Taniya Das (2): dt-bind

[v5 0/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

send requests for the RPMh managed clock resources. The RPMh clock driver depends upon the RPMh driver [1] and command DB driver [2] which are both still undergoing review. Thanks, Taniya [1]: https://lkml.org/lkml/2018/3/9/979 [2]: https://lkml.org/lkml/2018/3/14/787 Taniya Das (2): dt-bind

Re: [v4 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Hello Stephen, Thanks for the review comments. On 4/27/2018 5:10 AM, Stephen Boyd wrote: Quoting Taniya Das (2018-04-24 05:23:19) diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c new file mode 100644 index 000..907a73f --- /dev/null +++ b/drivers/clk/qcom/clk-rpmh.c

Re: [v4 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Hello Stephen, Thanks for the review comments. On 4/27/2018 5:10 AM, Stephen Boyd wrote: Quoting Taniya Das (2018-04-24 05:23:19) diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c new file mode 100644 index 000..907a73f --- /dev/null +++ b/drivers/clk/qcom/clk-rpmh.c

[PATCH v1] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

ischal <anisc...@codeaurora.org> Signed-off-by: Taniya Das <t...@codeaurora.org> --- drivers/clk/qcom/gdsc.c | 42 ++ drivers/clk/qcom/gdsc.h | 1 + 2 files changed, 27 insertions(+), 16 deletions(-) diff --git a/drivers/clk/qcom/gdsc.c b/drive

[PATCH v1] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

, especially in the disable sequence, where the status bit will be cleared even before the core is completely power collapsed. On targets with this issue, poll the power on/off bits in the CFG_GDSCR register instead to correctly determine the GDSC state. Signed-off-by: Amit Nischal Signed-off-by: Taniya

Re: [PATCH] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

Hello Doug, Thanks for the comments, I have based my latest patch on top of the earlier patches (clk-qcom-sdm845 branch of clk-next). On 5/1/2018 12:12 AM, Doug Anderson wrote: Hi, On Fri, Apr 27, 2018 at 1:19 AM, Taniya Das <t...@codeaurora.org> wrote: -static int gdsc_is_enabled(

Re: [PATCH] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

Hello Doug, Thanks for the comments, I have based my latest patch on top of the earlier patches (clk-qcom-sdm845 branch of clk-next). On 5/1/2018 12:12 AM, Doug Anderson wrote: Hi, On Fri, Apr 27, 2018 at 1:19 AM, Taniya Das wrote: -static int gdsc_is_enabled(struct gdsc *sc, unsigned

[PATCH] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

ischal <anisc...@codeaurora.org> Signed-off-by: Taniya Das <t...@codeaurora.org> --- drivers/clk/qcom/gdsc.c | 42 ++ drivers/clk/qcom/gdsc.h | 1 + 2 files changed, 27 insertions(+), 16 deletions(-) diff --git a/drivers/clk/qcom/gdsc.c b/drive

[PATCH] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

, especially in the disable sequence, where the status bit will be cleared even before the core is completely power collapsed. On targets with this issue, poll the power on/off bits in the CFG_GDSCR register instead to correctly determine the GDSC state. Signed-off-by: Amit Nischal Signed-off-by: Taniya

[v4 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: Amit Nischal <anisc...@codeaurora.org> Signed-off-by: Taniya Das <t...@codeaurora.org> --- drivers/clk/qcom/Kconfig| 9 ++ drivers/clk/qcom/Make

[v4 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: Amit Nischal Signed-off-by: Taniya Das --- drivers/clk/qcom/Kconfig| 9 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-rpmh.c | 364

[v4 1/2] dt-bindings: clock: Introduce QCOM RPMh clock bindings

Add RPMh clock device bindings for Qualcomm Technology Inc's SoCs. These devices would be used for communicating resource state requests to control the clocks managed by RPMh. Signed-off-by: Amit Nischal <anisc...@codeaurora.org> Signed-off-by: Taniya Das <t...@codeaurora.org> Revi

[v4 1/2] dt-bindings: clock: Introduce QCOM RPMh clock bindings

Add RPMh clock device bindings for Qualcomm Technology Inc's SoCs. These devices would be used for communicating resource state requests to control the clocks managed by RPMh. Signed-off-by: Amit Nischal Signed-off-by: Taniya Das Reviewed-by: Rob Herring --- .../devicetree/bindings/clock/qcom

[v4 0/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

RPMh driver [1] and command DB driver [2] which are both still undergoing review. Thanks, Taniya [1]: https://lkml.org/lkml/2018/3/9/979 [2]: https://lkml.org/lkml/2018/3/14/787 Taniya Das (2): dt-bindings: clock: Introduce QCOM RPMh clock bindings clk: qcom: clk-rpmh: Add QCOM RPMh clock dr

[v4 0/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

RPMh driver [1] and command DB driver [2] which are both still undergoing review. Thanks, Taniya [1]: https://lkml.org/lkml/2018/3/9/979 [2]: https://lkml.org/lkml/2018/3/14/787 Taniya Das (2): dt-bindings: clock: Introduce QCOM RPMh clock bindings clk: qcom: clk-rpmh: Add QCOM RPMh clock dr

Re: [PATCH v3 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Thanks Stephen for the review comments. On 4/16/2018 11:08 PM, Stephen Boyd wrote: Quoting Taniya Das (2018-04-13 19:36:41) Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: David Collins <co

Re: [PATCH v3 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Thanks Stephen for the review comments. On 4/16/2018 11:08 PM, Stephen Boyd wrote: Quoting Taniya Das (2018-04-13 19:36:41) Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: David Collins Signed-off-by: Amit

[PATCH v3 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: David Collins Signed-off-by: Amit Nischal --- drivers/clk/qcom/Kconfig| 9 ++ drivers/clk/qcom/Makefile

[PATCH v3 2/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: David Collins Signed-off-by: Amit Nischal --- drivers/clk/qcom/Kconfig| 9 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-rpmh.c | 367

[PATCH v3 0/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

hich are both still undergoing review. Thanks, Taniya [1]: https://lkml.org/lkml/2018/3/9/979 [2]: https://lkml.org/lkml/2018/3/14/787 Taniya Das (2): dt-bindings: clock: Introduce QCOM RPMh clock bindings clk: qcom: clk-rpmh: Add QCOM RPMh clock driver .../devicetree/bindings/clock/qcom,

[PATCH v3 1/2] dt-bindings: clock: Introduce QCOM RPMh clock bindings

Add RPMh clock device bindings for Qualcomm Technology Inc's SoCs. These devices would be used for communicating resource state requests to control the clocks managed by RPMh. Signed-off-by: Amit Nischal <anisc...@codeaurora.org> Signed-off-by: Taniya Das <t...@codeaurora.org> --- ..

[PATCH v3 1/2] dt-bindings: clock: Introduce QCOM RPMh clock bindings

Add RPMh clock device bindings for Qualcomm Technology Inc's SoCs. These devices would be used for communicating resource state requests to control the clocks managed by RPMh. Signed-off-by: Amit Nischal Signed-off-by: Taniya Das --- .../devicetree/bindings/clock/qcom,rpmh-clk.txt| 22

[PATCH v3 0/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

hich are both still undergoing review. Thanks, Taniya [1]: https://lkml.org/lkml/2018/3/9/979 [2]: https://lkml.org/lkml/2018/3/14/787 Taniya Das (2): dt-bindings: clock: Introduce QCOM RPMh clock bindings clk: qcom: clk-rpmh: Add QCOM RPMh clock driver .../devicetree/bindings/clock/qcom,

Re: [[PATCH v2] 1/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Hello Bjorn, Thank you for the review comments. On 4/10/2018 11:09 PM, Bjorn Andersson wrote: On Sun 08 Apr 03:32 PDT 2018, Taniya Das wrote: From: Amit Nischal <anisc...@codeaurora.org> Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qu

Re: [[PATCH v2] 1/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Hello Bjorn, Thank you for the review comments. On 4/10/2018 11:09 PM, Bjorn Andersson wrote: On Sun 08 Apr 03:32 PDT 2018, Taniya Das wrote: From: Amit Nischal Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed

Re: [[PATCH v2] 2/2] dt-bindings: clock: Introduce QCOM RPMh clock bindings

Hello Bjorn, Thanks for your review comments. On 4/10/2018 4:28 AM, Bjorn Andersson wrote: On Sun 08 Apr 03:32 PDT 2018, Taniya Das wrote: From: Amit Nischal <anisc...@codeaurora.org> Add RPMh clock device bindings for Qualcomm Technology Inc's SoCs. These devices would b

Re: [[PATCH v2] 1/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Hello Rob, Thank you for the review comments. On 4/13/2018 10:07 PM, Rob Herring wrote: On Sun, Apr 08, 2018 at 04:02:12PM +0530, Taniya Das wrote: From: Amit Nischal <anisc...@codeaurora.org> Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qu

Re: [[PATCH v2] 2/2] dt-bindings: clock: Introduce QCOM RPMh clock bindings

Hello Bjorn, Thanks for your review comments. On 4/10/2018 4:28 AM, Bjorn Andersson wrote: On Sun 08 Apr 03:32 PDT 2018, Taniya Das wrote: From: Amit Nischal Add RPMh clock device bindings for Qualcomm Technology Inc's SoCs. These devices would be used for communicating resource state

Re: [[PATCH v2] 1/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

Hello Rob, Thank you for the review comments. On 4/13/2018 10:07 PM, Rob Herring wrote: On Sun, Apr 08, 2018 at 04:02:12PM +0530, Taniya Das wrote: From: Amit Nischal Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs

Re: [PATCH 3/3] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

Hello Stephen, Thanks for the review comments. On 4/6/2018 10:10 PM, Stephen Boyd wrote: Quoting Taniya Das (2018-04-02 03:45:45) diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index e89584e..e0c83ba 100644 --- a/drivers/clk/qcom/gdsc.c +++ b/drivers/clk/qcom/gdsc.c @@ -83,6

Re: [PATCH 3/3] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

Hello Stephen, Thanks for the review comments. On 4/6/2018 10:10 PM, Stephen Boyd wrote: Quoting Taniya Das (2018-04-02 03:45:45) diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index e89584e..e0c83ba 100644 --- a/drivers/clk/qcom/gdsc.c +++ b/drivers/clk/qcom/gdsc.c @@ -83,6

Re: [PATCH 2/3] clk: qcom: gdsc: Add support to poll for higher timeout value

Hello Stephen, Thanks for the review comments. On 4/6/2018 4:54 AM, Stephen Boyd wrote: Quoting Taniya Das (2018-04-02 03:45:44) From: Amit Nischal <anisc...@codeaurora.org> For some gdscs, it might take longer time up to 500us for updating their status. So add support for th

Re: [PATCH 2/3] clk: qcom: gdsc: Add support to poll for higher timeout value

Hello Stephen, Thanks for the review comments. On 4/6/2018 4:54 AM, Stephen Boyd wrote: Quoting Taniya Das (2018-04-02 03:45:44) From: Amit Nischal For some gdscs, it might take longer time up to 500us for updating their status. So add support for the same by defining a new flag

[PATCH v2 1/3] clk: qcom: gdsc: Add support to reset AON and block reset logic

nd AON reset requires to be asserted for at least 1us before being de-asserted. Signed-off-by: Taniya Das <t...@codeaurora.org> Signed-off-by: Amit Nischal <anisc...@codeaurora.org> --- drivers/clk/qcom/gdsc.c | 22 -- drivers/clk/qcom/gdsc.h | 4 +++- 2 files chan

[PATCH v2 1/3] clk: qcom: gdsc: Add support to reset AON and block reset logic

for at least 1us before being de-asserted. Signed-off-by: Taniya Das Signed-off-by: Amit Nischal --- drivers/clk/qcom/gdsc.c | 22 -- drivers/clk/qcom/gdsc.h | 4 +++- 2 files changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom

[PATCH v2 2/3] clk: qcom: gdsc: Add support to poll for higher timeout value

From: Amit Nischal <anisc...@codeaurora.org> For some gdscs, it might take longer time up to 500us for updating their status. Update the timeout value for all GDSC polling status. Signed-off-by: Amit Nischal <anisc...@codeaurora.org> Signed-off-by: Taniya Das <t...@codeaurora.or

[PATCH v2 2/3] clk: qcom: gdsc: Add support to poll for higher timeout value

From: Amit Nischal For some gdscs, it might take longer time up to 500us for updating their status. Update the timeout value for all GDSC polling status. Signed-off-by: Amit Nischal Signed-off-by: Taniya Das --- drivers/clk/qcom/gdsc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion

[PATCH v2 0/3] Update reset and poll logic for GDSCs

[v2] * Addressed review comments given in v1 series This series implements the below logic for the GDSCs 1. logic to reset the AON logic before or assert/deassert the block control reset removing the clamp io for few GDSCs on SDM845 SoC. 2. It also introduces the requirement to poll for

[PATCH v2 3/3] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

ischal <anisc...@codeaurora.org> Signed-off-by: Taniya Das <t...@codeaurora.org> --- drivers/clk/qcom/gdsc.c | 39 +++ drivers/clk/qcom/gdsc.h | 1 + 2 files changed, 36 insertions(+), 4 deletions(-) diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk

[PATCH v2 3/3] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

, especially in the disable sequence, where the status bit will be cleared even before the core is completely power collapsed. On targets with this issue, poll the power on/off bits in the CFG_GDSCR register instead to correctly determine the GDSC state. Signed-off-by: Amit Nischal Signed-off-by: Taniya

[PATCH v2 0/3] Update reset and poll logic for GDSCs

[v2] * Addressed review comments given in v1 series This series implements the below logic for the GDSCs 1. logic to reset the AON logic before or assert/deassert the block control reset removing the clamp io for few GDSCs on SDM845 SoC. 2. It also introduces the requirement to poll for

[PATCH v2 0/3] Update reset and poll logic for GDSCs

[v2] * Addressed review comments given in v1 series This series implements the below logic for the GDSCs 1. logic to reset the AON logic before or assert/deassert the block control reset removing the clamp io for few GDSCs on SDM845 SoC. 2. It also introduces the requirement to poll for

[PATCH v2 0/3] Update reset and poll logic for GDSCs

[v2] * Addressed review comments given in v1 series This series implements the below logic for the GDSCs 1. logic to reset the AON logic before or assert/deassert the block control reset removing the clamp io for few GDSCs on SDM845 SoC. 2. It also introduces the requirement to poll for

[[PATCH v2] 2/2] dt-bindings: clock: Introduce QCOM RPMh clock bindings

From: Amit Nischal <anisc...@codeaurora.org> Add RPMh clock device bindings for Qualcomm Technology Inc's SoCs. These devices would be used for communicating resource state requests to control the clocks managed by RPMh. Signed-off-by: Amit Nischal <anisc...@codeaurora.org> Signed-of

[[PATCH v2] 2/2] dt-bindings: clock: Introduce QCOM RPMh clock bindings

From: Amit Nischal Add RPMh clock device bindings for Qualcomm Technology Inc's SoCs. These devices would be used for communicating resource state requests to control the clocks managed by RPMh. Signed-off-by: Amit Nischal Signed-off-by: Taniya Das --- .../devicetree/bindings/clock/qcom,rpmh

[PATCH v2 0/2] Add QCOM RPMh Clock driver

[v2] * Addressed comments from Stephen * Addressed comments from Evan This patch series adds a driver and device tree documentation binding for the clock control via Resource Power Manager-hardened (RPMh) on some Qualcomm Technologies, Inc, SoCs such as SDM845. The clock RPMh driver would

[[PATCH v2] 1/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

From: Amit Nischal <anisc...@codeaurora.org> Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: David Collins <colli...@codeaurora.org> Signed-off-by: Amit Nischal <anisc...@codeaurora.org> Sig

[PATCH v2 0/2] Add QCOM RPMh Clock driver

[v2] * Addressed comments from Stephen * Addressed comments from Evan This patch series adds a driver and device tree documentation binding for the clock control via Resource Power Manager-hardened (RPMh) on some Qualcomm Technologies, Inc, SoCs such as SDM845. The clock RPMh driver would

[[PATCH v2] 1/2] clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

From: Amit Nischal Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: David Collins Signed-off-by: Amit Nischal Signed-off-by: Taniya Das --- drivers/clk/qcom/Kconfig | 9 + drivers/clk/qcom

Re: [PATCH 2/2] dt-bindings: clock: Introduce QCOM RPMh clock bindings

Thanks Stephen for the review. On 4/6/2018 4:50 AM, Stephen Boyd wrote: Quoting Taniya Das (2018-03-28 23:17:53) diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmh.txt b/Documentation/devicetree/bindings/clock/qcom,rpmh.txt new file mode 100644 index 000..8222c88 --- /dev/null

Re: [PATCH 2/2] dt-bindings: clock: Introduce QCOM RPMh clock bindings

Thanks Stephen for the review. On 4/6/2018 4:50 AM, Stephen Boyd wrote: Quoting Taniya Das (2018-03-28 23:17:53) diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmh.txt b/Documentation/devicetree/bindings/clock/qcom,rpmh.txt new file mode 100644 index 000..8222c88 --- /dev/null

[PATCH 3/3] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

ischal <anisc...@codeaurora.org> Signed-off-by: Taniya Das <t...@codeaurora.org> --- drivers/clk/qcom/gdsc.c | 48 ++-- drivers/clk/qcom/gdsc.h | 1 + 2 files changed, 47 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/gdsc.c

[PATCH 0/3] Update reset and poll logic for GDSCs

This series implements the below logic for the GDSCs 1. logic to reset the AON logic before or assert/deassert the block control reset removing the clamp io for few GDSCs on SDM845 SoC. 2. It also introduces the requirement to poll for higher timeout values for few of the GDSCs. 3. There is

[PATCH 0/3] Update reset and poll logic for GDSCs

This series implements the below logic for the GDSCs 1. logic to reset the AON logic before or assert/deassert the block control reset removing the clamp io for few GDSCs on SDM845 SoC. 2. It also introduces the requirement to poll for higher timeout values for few of the GDSCs. 3. There is

[PATCH 3/3] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state

, especially in the disable sequence, where the status bit will be cleared even before the core is completely power collapsed. On targets with this issue, poll the power on/off bits in the CFG_GDSCR register instead to correctly determine the GDSC state. Signed-off-by: Amit Nischal Signed-off-by: Taniya

[PATCH 2/3] clk: qcom: gdsc: Add support to poll for higher timeout value

ischal <anisc...@codeaurora.org> Signed-off-by: Taniya Das <t...@codeaurora.org> --- drivers/clk/qcom/gdsc.c | 9 +++-- drivers/clk/qcom/gdsc.h | 1 + 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index 266fe

[PATCH 1/3] clk: qcom: gdsc: Add support to reset AON and block reset logic

nd AON reset requires to be asserted for at least 1us before being de-asserted. Signed-off-by: Taniya Das <t...@codeaurora.org> Signed-off-by: Amit Nischal <anisc...@codeaurora.org> --- drivers/clk/qcom/gdsc.c | 22 -- drivers/clk/qcom/gdsc.h | 4 +++- 2 files chan

[PATCH 1/3] clk: qcom: gdsc: Add support to reset AON and block reset logic

for at least 1us before being de-asserted. Signed-off-by: Taniya Das Signed-off-by: Amit Nischal --- drivers/clk/qcom/gdsc.c | 22 -- drivers/clk/qcom/gdsc.h | 4 +++- 2 files changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom

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