The following commit has been merged into the timers/core branch of tip:
Commit-ID: 2f71078e7753b2fbba62999aa46c2fad16df9d98
Gitweb:
https://git.kernel.org/tip/2f71078e7753b2fbba62999aa46c2fad16df9d98
Author:Zhen Lei
AuthorDate:Fri, 18 Sep 2020 21:22:32 +08:00
Committer
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 65f4d7ddc7b681001246f60c22a3cf650864da35
Gitweb:
https://git.kernel.org/tip/65f4d7ddc7b681001246f60c22a3cf650864da35
Author:Zhen Lei
AuthorDate:Fri, 18 Sep 2020 21:22:30 +08:00
Committer
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 549437a43f45ce70cf5012317633c635c43ba4f4
Gitweb:
https://git.kernel.org/tip/549437a43f45ce70cf5012317633c635c43ba4f4
Author:Zhen Lei
AuthorDate:Fri, 18 Sep 2020 21:22:36 +08:00
Committer
Convert the Hisilicon Hi6220 Power Always ON domain controller binding to
DT schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../controller/hi3620/hisilicon,hi6220-aoctrl.txt | 18 --
.../controller/hi3620/hisilicon,hi6220-aoctrl.yaml | 42 ++
2 files
Convert the Hisilicon Hi3798CV200 Peripheral Controller binding to DT
schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../controller/hisilicon,hi3798cv200-perictrl.txt | 21 --
.../controller/hisilicon,hi3798cv200-perictrl.yaml | 45 ++
2 files changed
Convert the Hisilicon HiP05/HiP06 PCIe-SAS subsystem controller binding
to DT schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../controller/hisilicon,pcie-sas-subctrl.txt | 15 -
.../controller/hisilicon,pcie-sas-subctrl.yaml | 37 ++
2 files
Convert the Hisilicon peripheral misc control register binding to DT
schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../arm/hisilicon/controller/hisilicon,pctrl.txt | 13 -
.../arm/hisilicon/controller/hisilicon,pctrl.yaml | 34 ++
2 files changed
quot; and "size" may occupy one or
two cells respectively. Use "minItems: 1" and "maxItems: 2" to allow it
can be written in "" or ", "
format.
Signed-off-by: Zhen Lei
---
.../hipxx/hisilicon,hip04-bootwrapper.txt | 9 --
.../hipxx/h
Convert the Hisilicon Hi6220 Media domain controller binding to DT schema
format using json-schema.
Signed-off-by: Zhen Lei
---
.../hi3620/hisilicon,hi6220-mediactrl.txt | 18 --
.../hi3620/hisilicon,hi6220-mediactrl.yaml | 42 ++
2 files changed, 42
Convert the Hisilicon HiP05/HiP06 DSA subsystem controller binding to DT
schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../hisilicon/controller/hisilicon,dsa-subctrl.txt | 15 -
.../controller/hisilicon,dsa-subctrl.yaml | 37 ++
2 files
From: Kefeng Wang
Add sd5203.dts for Hisilicon SD5203 SoC platform.
Signed-off-by: Kefeng Wang
Signed-off-by: Zhen Lei
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/sd5203.dts | 96
2 files changed, 98 insertions(+)
create mode
From: Kefeng Wang
Enable support for the Hisilicon SD5203 SoC. The core is ARM926EJ-S.
Signed-off-by: Kefeng Wang
Signed-off-by: Zhen Lei
---
arch/arm/mach-hisi/Kconfig | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm
Convert Hisilicon SoC bindings to DT schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../bindings/arm/hisilicon/hisilicon.txt | 57
.../bindings/arm/hisilicon/hisilicon.yaml | 77 ++
2 files changed, 77 insertions(+), 57
Convert the Hisilicon Hi6220 SRAM controller binding to DT schema format
using json-schema.
Signed-off-by: Zhen Lei
---
.../hi3620/hisilicon,hi6220-sramctrl.txt | 16 -
.../hi3620/hisilicon,hi6220-sramctrl.yaml | 38 ++
2 files changed, 38
ouped into subdirectory "hipxx"
Signed-off-by: Zhen Lei
---
.../controller/hi3620/hisilicon,hi6220-aoctrl.txt | 18 ++
.../hi3620/hisilicon,hi6220-mediactrl.txt | 18 ++
.../controller/hi3620/hisilicon,hi6220-pmctrl.txt | 18 ++
.../hi3620/hisilicon,hi6220-sramctrl
Convert the Hisilicon CPU controller binding to DT schema format using
json-schema.
Signed-off-by: Zhen Lei
---
.../arm/hisilicon/controller/hisilicon,cpuctrl.txt | 8 ---
.../hisilicon/controller/hisilicon,cpuctrl.yaml| 28 ++
2 files changed, 28 insertions(+), 8
Convert the Hisilicon system controller and its variants binding to DT
schema format using json-schema. All of them are grouped into one yaml
file, to help users understand differences and avoid repeated
descriptions.
Signed-off-by: Zhen Lei
---
.../controller/hi3620/hisilicon,hi6220
Convert the Hisilicon Hip06 SoCs implement a Low Pin Count (LPC)
controller binding to DT schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../arm/hisilicon/hisilicon-low-pin-count.txt | 33
.../arm/hisilicon/hisilicon-low-pin-count.yaml | 63
The compatible name "hisilicon,hip01" does not exist in any C file, and
it is not mentioned in the description file "hisilicon.txt". Delete it.
Fixes: 56a9c909d88a ("ARM: dts: Add hip01-ca9x2 dts file")
Signed-off-by: Zhen Lei
---
arch/arm/boot/dts/hip01-ca9x2
Convert the Hisilicon Fabric controller binding to DT schema format using
json-schema.
Signed-off-by: Zhen Lei
---
.../controller/hipxx/hisilicon,hip04-fabric.txt| 5 -
.../controller/hipxx/hisilicon,hip04-fabric.yaml | 26 ++
2 files changed, 26 insertions(+), 5
Convert the Hisilicon Hi6220 Power Management domain controller binding
to DT schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../controller/hi3620/hisilicon,hi6220-pmctrl.txt | 18 --
.../controller/hi3620/hisilicon,hi6220-pmctrl.yaml | 42 ++
2 files
Convert the Hisilicon HiP05/HiP06 PERI subsystem controller binding to DT
schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../controller/hisilicon,peri-subctrl.txt | 16 --
.../controller/hisilicon,peri-subctrl.yaml | 34 ++
2 files
Add devicetree binding for Hisilicon SD5203 SoC.
Signed-off-by: Zhen Lei
---
Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml
b/Documentation/devicetree/bindings
From: Kefeng Wang
Add support of early console for SD5203.
Signed-off-by: Kefeng Wang
Signed-off-by: Zhen Lei
---
arch/arm/Kconfig.debug | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 8a66a4e3549
nps,dw-apb-uart".
v1:
Add SD5203 SoC config option and devicetree file, also enable its debug UART.
Kefeng Wang (3):
ARM: hisi: add support for SD5203 SoC
ARM: debug: add UART early console support for SD5203
ARM: dts: add SD5203 dts
Zhen Lei (18):
ARM: dts: remove a unused compatib
ctor interrupt controller), it's
based on Synopsys DesignWare APB interrupt controller (dw_apb_ictl) IP, but it
can not directly use dw_apb_ictl driver. The main reason is that VIC is used as
primary interrupt controller and dw_apb_ictl driver worked for secondary
interrupt controller. So add a new
nterrupt-controller" instead of "dw-apb-ictl".
Signed-off-by: Zhen Lei
---
arch/arc/boot/dts/axc001.dtsi | 2 +-
arch/arc/boot/dts/axc003.dtsi | 2 +-
arch/arc/boot/dts/axc003_idu.dtsi | 2 +-
arch/arc/boot/dts/vdk_axc003.dtsi | 2 +-
arch/arc/boot/dts/vdk
Add support to use dw-apb-ictl as primary interrupt controller.
Signed-off-by: Zhen Lei
Reviewed-by: Rob Herring
---
.../bindings/interrupt-controller/snps,dw-apb-ictl.txt | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings
irq to parent_irq.
2. add "const struct irq_domain_ops *domain_ops = &irq_generic_chip_ops",
then replace &irq_generic_chip_ops in other places with domain_ops.
No functional change.
Signed-off-by: Zhen Lei
Tested-by: Haoyu Lv
---
drivers/irqchip/irq-dw-apb-ictl.c | 17 +---
Add support to use dw-apb-ictl as primary interrupt controller.
Suggested-by: Marc Zyngier
Signed-off-by: Zhen Lei
Tested-by: Haoyu Lv
---
drivers/irqchip/Kconfig | 2 +-
drivers/irqchip/irq-dw-apb-ictl.c | 74 ++-
2 files changed, 67 insertions
Convert the Synopsys DesignWare APB interrupt controller (dw_apb_ictl)
binding to DT schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../interrupt-controller/snps,dw-apb-ictl.txt | 43 -
.../interrupt-controller/snps,dw-apb-ictl.yaml | 74
meter "handle_irq" maybe defined as static and only
set_handle_irq() references it. This will trigger "defined but not used"
warning. So add "(void)handle_irq" to suppress it.
Signed-off-by: Zhen Lei
---
include/linux/irq.h | 6 ++
1 file changed, 6 insertions(+)
ed by "arm,sp804.yaml". Add "oneOf" into "select"
to require one of them.
select:
properties:
compatible:
contains:
-const: arm,sp804
+oneOf:
+ - const: arm,sp804
+ - const: hisilicon,sp804
required:
- compatible
Some Hisilicon SoCs, such as Hi1212, use the Hisilicon extended sp804
timer.
Signed-off-by: Zhen Lei
---
Documentation/devicetree/bindings/timer/arm,sp804.yaml | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/timer/arm,sp804.yaml
The type of "nfree" is u32, so "nfree - 1" can only be overflowed when
"nfree" is zero. Replace "if (nfree - 1 > nfree)" with "if (nfree == 0)"
seems more clear. And remove the assignment "nfree = 0", no need for it.
Signed-off-b
Move EXPORT_SYMBOL_GPL(nvdimm_flush) close to nvdimm_flush(), currently
it's near to generic_nvdimm_flush().
Signed-off-by: Zhen Lei
Reviewed-by: Pankaj Gupta
---
v1 --> v2
1. add "Reviewed-by: Pankaj Gupta "
v1:
https://lkml.org/lkml/2020/8/20/904
drivers/nvdimm/region
th "ndr_desc->flush" at 2), we will find that
it becomes the same to 1).
So the above code snippet can be reduced to one statement:
nd_region->flush = ndr_desc->flush;
No functional change.
Signed-off-by: Zhen Lei
---
v1 --> v2:
1. Only the title and description are modi
b196 drivers/nvdimm/namespace_devs.o
After:
textdata bss dec hex filename
416533697 16 45366 b136 drivers/nvdimm/namespace_devs.o
Signed-off-by: Zhen Lei
---
v1 --> v2:
1. Only the title and description are modified.
v1:
https://lore.kernel.org/patch
Fixes: b3b454f694db ("libnvdimm: fix clear poison locking with spinlock ...")
Signed-off-by: Zhen Lei
---
drivers/nvdimm/badrange.c | 22 --
1 file changed, 8 insertions(+), 14 deletions(-)
diff --git a/drivers/nvdimm/badrange.c b/drivers/nvdimm/badrange.c
index 9fdb
()
do things-B //can only be entered if !list_empty()
3) do things-A
return Y;
It's very clear that, the processing result after deleting 1) is the same
as that before deleting 1).
So delete 1) to simplify code.
Signed-off-by: Zhen Lei
---
drivers/nvdimm/badrange.c
v1 --> v2:
1. Only the titles and descriptions are modified.
v1:
https://lore.kernel.org/patchwork/cover/1292582/Patch 1-2
Zhen Lei (2):
libnvdimm/badrange: remove two redundant list_empty() branches
libnvdimm/badrange: eliminate a meaningless spinlock operation
drivers/nvd
b196 drivers/nvdimm/namespace_devs.o
After:
textdata bss dec hex filename
416533697 16 45366 b136 drivers/nvdimm/namespace_devs.o
Signed-off-by: Zhen Lei
---
v1 --> v2:
1. Only the title and description are modified.
v1:
https://lore.kernel.org/patch
pport for SD5203
ARM: dts: add SD5203 dts
Zhen Lei (1):
dt-bindings: arm: hisilicon: add binding for SD5203 SoC
.../bindings/arm/hisilicon/hisilicon.txt | 5 ++
arch/arm/Kconfig.debug | 11 ++-
arch/arm/boot/dts/Makefile
From: Kefeng Wang
Enable support for the Hisilicon SD5203 SoC. The core is ARM926EJ-S.
Signed-off-by: Kefeng Wang
Signed-off-by: Zhen Lei
---
arch/arm/mach-hisi/Kconfig | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm
Add devicetree binding for Hisilicon SD5203 SoC.
Signed-off-by: Zhen Lei
---
Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
b/Documentation/devicetree/bindings
From: Kefeng Wang
Add support of early console for SD5203.
Signed-off-by: Kefeng Wang
Signed-off-by: Zhen Lei
---
arch/arm/Kconfig.debug | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 8a66a4e3549
From: Kefeng Wang
Add sd5203.dts for Hisilicon SD5203 SoC platform.
Signed-off-by: Kefeng Wang
Signed-off-by: Zhen Lei
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/sd5203.dts | 96
2 files changed, 98 insertions(+)
create mode
Delete the leading "__" of __sp804_clocksource_and_sched_clock_init() and
__sp804_clockevents_init(), make it looks a little more comfortable.
Signed-off-by: Zhen Lei
---
drivers/clocksource/timer-sp804.c | 27 +++
1 file changed, 15 insertions(+), 12 deletion
Add two local variables: timer1_base and timer2_base in sp804_of_init(),
to avoid repeatedly calculate the base address of timer2, and make it
easier to recognize timer1. Hope to make the next patch looks more clear.
No functional change.
Signed-off-by: Zhen Lei
---
drivers/clocksource/timer
Since commit 7484c727b636 ("ARM: realview: delete the RealView board
files") and commit 16956fed35fe ("ARM: versatile: switch to DT only
booting and remove legacy code"), there's no one to use the functions
defined or declared in include/clocksource/timer-sp804.h. Delete
--
Additional information:
These patch series are the V2 of https://lore.kernel.org/patchwork/cover/681876/
And many of the main ideas in https://lore.kernel.org/patchwork/patch/681875/
have been considered.
Thanks for Daniel Lezcano's review comments.
Kefeng Wang (1):
clocks
From: Kefeng Wang
Move the clk_get_sys() part into sp804_get_clock_rate(), cleanup the same
code.
Signed-off-by: Kefeng Wang
Signed-off-by: Zhen Lei
---
drivers/clocksource/timer-sp804.c | 30 ++
1 file changed, 10 insertions(+), 20 deletions(-)
diff --git a
{
.ctrl = TIMER_CTRL,
};
struct sp804_clkevt clkevt;
clkevt.ctrl = base + arm_sp804_timer.ctrl.
- writel(0, base + TIMER_CTRL);
+ writel(0, clkevt->ctrl);
Signed-off-by: Zhen Lei
---
drivers/clocksource/timer-sp.h| 26 +
drivers/cloc
Some Hisilicon SoCs, such as Hi1212, use the Hisilicon extended sp804
timer.
Signed-off-by: Zhen Lei
---
Documentation/devicetree/bindings/timer/arm,sp804.yaml | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/timer/arm,sp804.yaml
b
is different.
Use compatible = "hisilicon,sp804" mark as Hisilicon sp804 timer.
Signed-off-by: Zhen Lei
---
drivers/clocksource/timer-sp804.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/drivers/clocksource/timer-sp804.c
b/drivers/clocksource/tim
A 100MHZ 32-bit timer will be wrapped up less than 43s. Although the
kernel maintains a software high 32-bit count in the tick IRQ. But it's
not applicable to the user mode APPs.
Note: The kernel still uses the lower 32 bits of the timer.
Signed-off-by: Zhen Lei
---
drivers/clocksource/
mode (default)
1 = Timer module is in periodic mode.
Signed-off-by: Zhen Lei
---
drivers/clocksource/timer-sp804.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/clocksource/timer-sp804.c
b/drivers/clocksource/timer-sp804.c
index 097f5a83163c6e1..a443f392a8e7d63 100644
--- a/drivers
Add support to use dw-apb-ictl as primary interrupt controller.
Signed-off-by: Zhen Lei
---
.../bindings/interrupt-controller/snps,dw-apb-ictl.txt | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/interrupt-controller/snps
Convert the Synopsys DesignWare APB interrupt controller (dw_apb_ictl)
binding to DT schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../interrupt-controller/snps,dw-apb-ictl.txt | 43 -
.../interrupt-controller/snps,dw-apb-ictl.yaml | 75
pt controller (dw_apb_ictl) IP, but it
can not directly use dw_apb_ictl driver. The main reason is that VIC is used as
primary interrupt controller and dw_apb_ictl driver worked for secondary
interrupt controller. So add a new driver: "hisilicon,sd5203-vic".
Zhen Lei (6):
genirq: define an em
nterrupt-controller" instead of "dw-apb-ictl".
Signed-off-by: Zhen Lei
---
arch/arc/boot/dts/axc001.dtsi | 2 +-
arch/arc/boot/dts/axc003.dtsi | 2 +-
arch/arc/boot/dts/axc003_idu.dtsi | 2 +-
arch/arc/boot/dts/vdk_axc003.dtsi | 2 +-
arch/arc/boot/dts/vdk
Add support to use dw-apb-ictl as primary interrupt controller.
Suggested-by: Marc Zyngier
Signed-off-by: Zhen Lei
Tested-by: Haoyu Lv
---
drivers/irqchip/Kconfig | 2 +-
drivers/irqchip/irq-dw-apb-ictl.c | 74 ++-
2 files changed, 67 insertions
irq to parent_irq.
2. add "const struct irq_domain_ops *domain_ops = &irq_generic_chip_ops",
then replace &irq_generic_chip_ops in other places with domain_ops.
No functional change.
Signed-off-by: Zhen Lei
Tested-by: Haoyu Lv
---
drivers/irqchip/irq-dw-apb-ictl.c | 17 +---
meter "handle_irq" maybe defined as static and only
set_handle_irq() references it. This will trigger "defined but not used"
warning. So add "(void)handle_irq" to suppress it.
Signed-off-by: Zhen Lei
---
include/linux/irq.h | 6 ++
1 file changed, 6 insertions(+)
in the scope of CONFIG_ARM_PATCH_PHYS_VIRT_RADICAL are all passed "t"
(above y).
Signed-off-by: Zhen Lei
---
arch/arm/Kconfig | 17 -
arch/arm/include/asm/memory.h | 16 +---
arch/arm/kernel/head.S| 25 +++--
3 files
unrotated value. But we can use one more "add/sub" instructions to handle
bits 23-16, to support PHYS_OFFSET minimum aligned at 64KiB boundary.
This function is required at least by some Huawei boards, such as Hi1380
board. Becuase the kernel Image is loaded at 2MiB boundary.
Zhen Lei (
PFN_OFFSET (__pv_phys_pfn_offset)
Fixes: f52bb722547f ("ARM: mm: Correct virt_to_phys patching for 64 bit
physical addresses")
Fixes: e26a9e00afc4 ("ARM: Better virt_to_page() handling")
Signed-off-by: Zhen Lei
---
arch/arm/kernel/head.S | 6 +++---
1 file changed, 3 insertions(+)
ons to handle
bits 23-16, to support PHYS_OFFSET minimum aligned at 64KiB boundary.
This function is required at least by some Huawei boards, such as Hi1380
board. Becuase the kernel Image is loaded at 2MiB boundary.
Zhen Lei (2):
ARM: fix trivial comments in head.S
ARM: support PHYS_OFFSET mi
PFN_OFFSET (__pv_phys_pfn_offset)
Fixes: f52bb722547f ("ARM: mm: Correct virt_to_phys patching for 64 bit
physical addresses")
Fixes: e26a9e00afc4 ("ARM: Better virt_to_page() handling")
Signed-off-by: Zhen Lei
---
arch/arm/kernel/head.S | 6 +++---
1 file changed, 3 insertions(+)
in the scope of CONFIG_ARM_PATCH_PHYS_VIRT_RADICAL are all passed "t"
(above y).
Signed-off-by: Zhen Lei
---
arch/arm/Kconfig | 18 +-
arch/arm/include/asm/memory.h | 16 +---
arch/arm/kernel/head.S| 25 +++--
3 files
irq to parent_irq.
2. add "const struct irq_domain_ops *domain_ops = &irq_generic_chip_ops",
then replace &irq_generic_chip_ops in other places with domain_ops.
No functional change.
Signed-off-by: Zhen Lei
Tested-by: Haoyu Lv
---
drivers/irqchip/irq-dw-apb-ictl.c | 17 +---
Add support to use dw-apb-ictl as primary interrupt controller.
Signed-off-by: Zhen Lei
---
.../bindings/interrupt-controller/snps,dw-apb-ictl.txt | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/interrupt-controller/snps
meter "handle_irq" maybe defined as static and only
set_handle_irq() references it. This will trigger "defined but not used"
warning. So add "(void)handle_irq" to suppress it.
Signed-off-by: Zhen Lei
---
include/linux/irq.h | 2 ++
1 file changed, 2 insertions(+)
diff --
ller), it's
based on Synopsys DesignWare APB interrupt controller (dw_apb_ictl) IP, but it
can not directly use dw_apb_ictl driver. The main reason is that VIC is used as
primary interrupt controller and dw_apb_ictl driver worked for secondary
interrupt controller. So add a new
Add support to use dw-apb-ictl as primary interrupt controller.
Suggested-by: Marc Zyngier
Signed-off-by: Zhen Lei
Tested-by: Haoyu Lv
---
drivers/irqchip/Kconfig | 2 +-
drivers/irqchip/irq-dw-apb-ictl.c | 74 ++-
2 files changed, 67 insertions
ary.
This function is required at least by some Huawei boards, such as Hi1380
board. Becuase the kernel Image is loaded at 2MiB boundary.
Zhen Lei (2):
ARM: fix trivial comments in head.S
ARM: support PHYS_OFFSET minimum aligned at 64KiB boundary
arch/arm/Kconfig
in the scope of CONFIG_ARM_PATCH_PHYS_VIRT_RADICAL are all passed "t"
(above y).
Signed-off-by: Zhen Lei
---
arch/arm/Kconfig | 18 +-
arch/arm/include/asm/memory.h | 16 +---
arch/arm/kernel/head.S| 25 +++--
3 files
PFN_OFFSET (__pv_phys_pfn_offset)
Fixes: f52bb722547f ("ARM: mm: Correct virt_to_phys patching for 64 bit
physical addresses")
Fixes: e26a9e00afc4 ("ARM: Better virt_to_page() handling")
Signed-off-by: Zhen Lei
---
arch/arm/kernel/head.S | 6 +++---
1 file changed, 3 insertions(+)
mode (default)
1 = Timer module is in periodic mode.
Signed-off-by: Zhen Lei
---
drivers/clocksource/timer-sp804.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/clocksource/timer-sp804.c
b/drivers/clocksource/timer-sp804.c
index 097f5a83163c..a443f392a8e7 100644
--- a/drivers
A 100MHZ 32-bit timer will be wrapped up less than 43s. Although the
kernel maintains a software high 32-bit count in the tick IRQ. But it's
not applicable to the user mode APPs.
Note: The kernel still uses the lower 32 bits of the timer.
Signed-off-by: Zhen Lei
---
drivers/clocksource/
Since commit 7484c727b636 ("ARM: realview: delete the RealView board
files") and commit 16956fed35fe ("ARM: versatile: switch to DT only
booting and remove legacy code"), there's no one to use the functions
defined or declared in include/clocksource/timer-sp804.h. Delete
From: Kefeng Wang
Move the clk_get_sys() part into sp804_get_clock_rate(), cleanup the same
code.
Signed-off-by: Kefeng Wang
Signed-off-by: Zhen Lei
---
drivers/clocksource/timer-sp804.c | 30 ++
1 file changed, 10 insertions(+), 20 deletions(-)
diff --git a
Some Hisilicon SoCs, such as Hi1212, use the Hisilicon extended sp804
timer.
Signed-off-by: Zhen Lei
---
Documentation/devicetree/bindings/timer/arm,sp804.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/timer/arm,sp804.txt
b/Documentation/devicetree
{
.ctrl = TIMER_CTRL,
};
struct sp804_clkevt clkevt;
clkevt.ctrl = base + arm_sp804_timer.ctrl.
- writel(0, base + TIMER_CTRL);
+ writel(0, clkevt->ctrl);
Signed-off-by: Zhen Lei
---
drivers/clocksource/timer-sp.h| 26 +++
drivers/cl
Add two local variables: timer1_base and timer2_base in sp804_of_init(),
to avoid repeatedly calculate the base address of timer2, and make it
easier to recognize timer1. Hope to make the next patch looks more clear.
No functional change.
Signed-off-by: Zhen Lei
---
drivers/clocksource/timer
h/681875/
have been considered.
Thanks for Daniel Lezcano's review comments.
Kefeng Wang (1):
clocksource: sp804: cleanup clk_get_sys()
Zhen Lei (8):
clocksource: sp804: remove unused sp804_timer_disable() and
timer-sp804.h
clocksource: sp804: delete the leading "__" of some f
is different.
Use compatible = "hisilicon,sp804" mark as Hisilicon sp804 timer.
Signed-off-by: Zhen Lei
---
drivers/clocksource/timer-sp.h| 12
drivers/clocksource/timer-sp804.c | 15 +++
2 files changed, 27 insertions(+)
diff --git a/drivers/clocksource/ti
Delete the leading "__" of __sp804_clocksource_and_sched_clock_init() and
__sp804_clockevents_init(), make it looks a little more comfortable.
Signed-off-by: Zhen Lei
---
drivers/clocksource/timer-sp804.c | 27 +++
1 file changed, 15 insertions(+), 12 deletion
Since commit 7484c727b636 ("ARM: realview: delete the RealView board
files") and commit 16956fed35fe ("ARM: versatile: switch to DT only
booting and remove legacy code"), there's no one to use the functions
defined or declared in include/clocksource/timer-sp804.h. Delete
From: Kefeng Wang
Move the clk_get_sys() part into sp804_get_clock_rate(), cleanup the same
code.
Signed-off-by: Kefeng Wang
Signed-off-by: Zhen Lei
---
drivers/clocksource/timer-sp804.c | 30 ++
1 file changed, 10 insertions(+), 20 deletions(-)
diff --git a
{
.ctrl = TIMER_CTRL,
};
struct sp804_clkevt clkevt;
clkevt.ctrl = base + arm_sp804_timer.ctrl;
- writel(0, base + TIMER_CTRL);
+ writel(0, clkevt.ctrl);
Signed-off-by: Zhen Lei
---
drivers/clocksource/timer-sp.h| 26 +++
drivers/clock
is different.
Use compatible = "hisi,sp804" mark as Hisilicon sp804 timer.
Signed-off-by: Zhen Lei
---
drivers/clocksource/timer-sp.h| 12
drivers/clocksource/timer-sp804.c | 15 +++
2 files changed, 27 insertions(+)
diff --git a/drivers/clocksource/ti
s in https://lore.kernel.org/patchwork/patch/681875/
have been considered.
Thanks for Daniel Lezcano's review comments.
Kefeng Wang (1):
clocksource: sp804: cleanup clk_get_sys()
Zhen Lei (5):
clocksource: sp804: remove unused sp804_timer_disable() and
timer-sp804.h
clocksource: sp804: prepare
avoid repeatedly calculate the base address of
timer2, and make it easier to recognize timer1.
3. Delete the leading "__" of __sp804_clocksource_and_sched_clock_init()
and __sp804_clockevents_init().
No functional change.
Signed-off-by: Zhen Lei
---
drivers/clocksource/timer-sp
A 100MHZ 32-bit timer will be wrapped up less than 43s. Although the
kernel maintains a software high 32-bit count in the tick IRQ. But it's
not applicable to the user mode APPs.
Note: The kernel still uses the lower 32 bits of the timer.
Signed-off-by: Zhen Lei
---
drivers/clocksource/
irq to parent_irq.
2. add "const struct irq_domain_ops *domain_ops = &irq_generic_chip_ops",
then replace &irq_generic_chip_ops in other places with domain_ops.
No functional change.
Signed-off-by: Zhen Lei
Tested-by: Haoyu Lv
---
drivers/irqchip/irq-dw-apb-ictl.c | 17 +---
Add support to use dw-apb-ictl as primary interrupt controller.
Suggested-by: Marc Zyngier
Signed-off-by: Zhen Lei
Tested-by: Haoyu Lv
---
drivers/irqchip/Kconfig | 2 +-
drivers/irqchip/irq-dw-apb-ictl.c | 76 +++
2 files changed, 69 insertions(+), 9
e APB interrupt controller (dw_apb_ictl) IP, but it
can not directly use dw_apb_ictl driver. The main reason is that VIC is used as
primary interrupt controller and dw_apb_ictl driver worked for secondary
interrupt controller. So add a new driver: "hisilicon,sd5203-vic".
Zhen Lei (3):
irq
Add support to use dw-apb-ictl as primary interrupt controller.
Signed-off-by: Zhen Lei
---
.../interrupt-controller/snps,dw-apb-ictl.txt | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb
ictl) IP, but it
can not directly use dw_apb_ictl driver. The main reason is that VIC is used as
primary interrupt controller and dw_apb_ictl driver worked for secondary
interrupt controller. So add a new driver: "hisilicon,sd5203-vic".
Zhen Lei (3):
irqchip: dw-apb-ictl: prepare for sup
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