Hi, Boris,
On 12/11/2018 04:40 PM, Boris Brezillon wrote:
> On Mon, 10 Dec 2018 17:15:29 +
> wrote:
>
>> From: Cyrille Pitchen
>>
>> This patch configures the QSPI0 controller pin muxing and declares
>> a jedec,spi-nor memory.
>>
>> sama5d2 Xplained RevB and RevC use the Macronix
On Tue, Dec 11, 2018 at 03:35:45PM +0100, Alexandre Belloni wrote:
> On 11/12/2018 12:32:40+, tudor.amba...@microchip.com wrote:
> > Hi, Alexandre,
> >
> > On 12/10/2018 11:35 PM, Alexandre Belloni wrote:
> > > Hi,
> > >
> > > On 10/12/2018 17:15:29+, tudor.amba...@microchip.com wrote:
>
On Tue, Dec 11, 2018 at 03:40:33PM +0100, Boris Brezillon wrote:
> On Mon, 10 Dec 2018 17:15:29 +
> wrote:
>
> > From: Cyrille Pitchen
> >
> > This patch configures the QSPI0 controller pin muxing and declares
> > a jedec,spi-nor memory.
> >
> > sama5d2 Xplained RevB and RevC use the
On Mon, 10 Dec 2018 17:15:29 +
wrote:
> From: Cyrille Pitchen
>
> This patch configures the QSPI0 controller pin muxing and declares
> a jedec,spi-nor memory.
>
> sama5d2 Xplained RevB and RevC use the Macronix MX25L25673G flash
> memory which advertises a maximum frequency of 80MHz for
On 11/12/2018 12:32:40+, tudor.amba...@microchip.com wrote:
> Hi, Alexandre,
>
> On 12/10/2018 11:35 PM, Alexandre Belloni wrote:
> > Hi,
> >
> > On 10/12/2018 17:15:29+, tudor.amba...@microchip.com wrote:
> >> From: Cyrille Pitchen
> >>
> >> This patch configures the QSPI0 controller
Hi, Alexandre,
On 12/10/2018 11:35 PM, Alexandre Belloni wrote:
> Hi,
>
> On 10/12/2018 17:15:29+, tudor.amba...@microchip.com wrote:
>> From: Cyrille Pitchen
>>
>> This patch configures the QSPI0 controller pin muxing and declares
>> a jedec,spi-nor memory.
>>
>> sama5d2 Xplained RevB and
Hi,
On 10/12/2018 17:15:29+, tudor.amba...@microchip.com wrote:
> From: Cyrille Pitchen
>
> This patch configures the QSPI0 controller pin muxing and declares
> a jedec,spi-nor memory.
>
> sama5d2 Xplained RevB and RevC use the Macronix MX25L25673G flash
> memory which advertises a maximum
From: Cyrille Pitchen
This patch configures the QSPI0 controller pin muxing and declares
a jedec,spi-nor memory.
sama5d2 Xplained RevB and RevC use the Macronix MX25L25673G flash
memory which advertises a maximum frequency of 80MHz for Quad IO
Fast Read. Set the spi-max-frequency to 80MHz
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