Re: [PATCH] ARM: dts: at91: sama5d2 Xplained: add QSPI0 + SPI NOR memory nodes

2018-12-11 Thread Tudor.Ambarus
Hi, Boris, On 12/11/2018 04:40 PM, Boris Brezillon wrote: > On Mon, 10 Dec 2018 17:15:29 + > wrote: > >> From: Cyrille Pitchen >> >> This patch configures the QSPI0 controller pin muxing and declares >> a jedec,spi-nor memory. >> >> sama5d2 Xplained RevB and RevC use the Macronix

Re: [PATCH] ARM: dts: at91: sama5d2 Xplained: add QSPI0 + SPI NOR memory nodes

2018-12-11 Thread Ludovic Desroches
On Tue, Dec 11, 2018 at 03:35:45PM +0100, Alexandre Belloni wrote: > On 11/12/2018 12:32:40+, tudor.amba...@microchip.com wrote: > > Hi, Alexandre, > > > > On 12/10/2018 11:35 PM, Alexandre Belloni wrote: > > > Hi, > > > > > > On 10/12/2018 17:15:29+, tudor.amba...@microchip.com wrote: >

Re: [PATCH] ARM: dts: at91: sama5d2 Xplained: add QSPI0 + SPI NOR memory nodes

2018-12-11 Thread Ludovic Desroches
On Tue, Dec 11, 2018 at 03:40:33PM +0100, Boris Brezillon wrote: > On Mon, 10 Dec 2018 17:15:29 + > wrote: > > > From: Cyrille Pitchen > > > > This patch configures the QSPI0 controller pin muxing and declares > > a jedec,spi-nor memory. > > > > sama5d2 Xplained RevB and RevC use the

Re: [PATCH] ARM: dts: at91: sama5d2 Xplained: add QSPI0 + SPI NOR memory nodes

2018-12-11 Thread Boris Brezillon
On Mon, 10 Dec 2018 17:15:29 + wrote: > From: Cyrille Pitchen > > This patch configures the QSPI0 controller pin muxing and declares > a jedec,spi-nor memory. > > sama5d2 Xplained RevB and RevC use the Macronix MX25L25673G flash > memory which advertises a maximum frequency of 80MHz for

Re: [PATCH] ARM: dts: at91: sama5d2 Xplained: add QSPI0 + SPI NOR memory nodes

2018-12-11 Thread Alexandre Belloni
On 11/12/2018 12:32:40+, tudor.amba...@microchip.com wrote: > Hi, Alexandre, > > On 12/10/2018 11:35 PM, Alexandre Belloni wrote: > > Hi, > > > > On 10/12/2018 17:15:29+, tudor.amba...@microchip.com wrote: > >> From: Cyrille Pitchen > >> > >> This patch configures the QSPI0 controller

Re: [PATCH] ARM: dts: at91: sama5d2 Xplained: add QSPI0 + SPI NOR memory nodes

2018-12-11 Thread Tudor.Ambarus
Hi, Alexandre, On 12/10/2018 11:35 PM, Alexandre Belloni wrote: > Hi, > > On 10/12/2018 17:15:29+, tudor.amba...@microchip.com wrote: >> From: Cyrille Pitchen >> >> This patch configures the QSPI0 controller pin muxing and declares >> a jedec,spi-nor memory. >> >> sama5d2 Xplained RevB and

Re: [PATCH] ARM: dts: at91: sama5d2 Xplained: add QSPI0 + SPI NOR memory nodes

2018-12-10 Thread Alexandre Belloni
Hi, On 10/12/2018 17:15:29+, tudor.amba...@microchip.com wrote: > From: Cyrille Pitchen > > This patch configures the QSPI0 controller pin muxing and declares > a jedec,spi-nor memory. > > sama5d2 Xplained RevB and RevC use the Macronix MX25L25673G flash > memory which advertises a maximum

[PATCH] ARM: dts: at91: sama5d2 Xplained: add QSPI0 + SPI NOR memory nodes

2018-12-10 Thread Tudor.Ambarus
From: Cyrille Pitchen This patch configures the QSPI0 controller pin muxing and declares a jedec,spi-nor memory. sama5d2 Xplained RevB and RevC use the Macronix MX25L25673G flash memory which advertises a maximum frequency of 80MHz for Quad IO Fast Read. Set the spi-max-frequency to 80MHz