Re: [PATCH] clk: sunxi: Fix mod0 clock calculation to return stable results and check divisor size limits

Hi, On Thu, Jan 14, 2016 at 11:40:15AM +0100, Marcus Weseloh wrote: > > On Mon, Dec 28, 2015 at 06:31:32PM +0100, Marcus Weseloh wrote: > >> This patch fixes some problems in the mod0 clock calculation. It has > >> the potential to break stuff, as the issues explained below had the > >> effect

Re: [PATCH] clk: sunxi: Fix mod0 clock calculation to return stable results and check divisor size limits

Hi, On Thu, Jan 14, 2016 at 11:40:15AM +0100, Marcus Weseloh wrote: > > On Mon, Dec 28, 2015 at 06:31:32PM +0100, Marcus Weseloh wrote: > >> This patch fixes some problems in the mod0 clock calculation. It has > >> the potential to break stuff, as the issues explained below had the > >> effect

[PATCH] clk: sunxi: Fix mod0 clock calculation to return stable results and check divisor size limits

This patch fixes some problems in the mod0 clock calculation. It has the potential to break stuff, as the issues explained below had the effect that clk_set_rate would always return successfully, sometimes setting a frequency that is higher than the requested value. Code that "accidentally worked"

[PATCH] clk: sunxi: Fix mod0 clock calculation to return stable results and check divisor size limits

This patch fixes some problems in the mod0 clock calculation. It has the potential to break stuff, as the issues explained below had the effect that clk_set_rate would always return successfully, sometimes setting a frequency that is higher than the requested value. Code that "accidentally worked"