On Fri, 2014-05-02 at 17:04 +0200, Denys Vlasenko wrote:
> On 05/02/2014 02:48 AM, Jim Keniston wrote:
> > On Thu, 2014-05-01 at 19:09 +0200, Denys Vlasenko wrote:
> >> +#define VEX2_(insn) X86_VEX_V((insn)->vex_prefix.bytes[1])
> >> +#define VEX3_(insn)
On Fri, 2014-05-02 at 17:04 +0200, Denys Vlasenko wrote:
On 05/02/2014 02:48 AM, Jim Keniston wrote:
On Thu, 2014-05-01 at 19:09 +0200, Denys Vlasenko wrote:
+#define VEX2_(insn) X86_VEX_V((insn)-vex_prefix.bytes[1])
+#define VEX3_(insn)
On 05/02/2014 02:48 AM, Jim Keniston wrote:
> On Thu, 2014-05-01 at 19:09 +0200, Denys Vlasenko wrote:
>> +#define VEX2_(insn) X86_VEX_V((insn)->vex_prefix.bytes[1])
>> +#define VEX3_(insn) X86_VEX_V((insn)->vex_prefix.bytes[2])
>
> I disclaim any knowledge about
On 05/02/2014 02:48 AM, Jim Keniston wrote:
On Thu, 2014-05-01 at 19:09 +0200, Denys Vlasenko wrote:
+#define VEX2_(insn) X86_VEX_V((insn)-vex_prefix.bytes[1])
+#define VEX3_(insn) X86_VEX_V((insn)-vex_prefix.bytes[2])
I disclaim any knowledge about VEX*
On Thu, 2014-05-01 at 19:09 +0200, Denys Vlasenko wrote:
> Before this patch, instructions such as div, mul,
> shifts with count in CL, cmpxchg are mishandled.
>
> This patch adds vex prefix handling. In particular,
> it avoids colliding with register operand encoded
> in vex. field.
>
>
On 05/01, Denys Vlasenko wrote:
>
> Before this patch, instructions such as div, mul,
> shifts with count in CL, cmpxchg are mishandled.
Thanks. I'll try to read this patch tomorrow, but you do know that I can't
review (or even understand ;) the change in riprel_analyze().
As for other changes,
Before this patch, instructions such as div, mul,
shifts with count in CL, cmpxchg are mishandled.
This patch adds vex prefix handling. In particular,
it avoids colliding with register operand encoded
in vex. field.
Since we need to avoid two possible register operands,
the selection of
Before this patch, instructions such as div, mul,
shifts with count in CL, cmpxchg are mishandled.
This patch adds vex prefix handling. In particular,
it avoids colliding with register operand encoded
in vex. field.
Since we need to avoid two possible register operands,
the selection of
On 05/01, Denys Vlasenko wrote:
Before this patch, instructions such as div, mul,
shifts with count in CL, cmpxchg are mishandled.
Thanks. I'll try to read this patch tomorrow, but you do know that I can't
review (or even understand ;) the change in riprel_analyze().
As for other changes,
On Thu, 2014-05-01 at 19:09 +0200, Denys Vlasenko wrote:
Before this patch, instructions such as div, mul,
shifts with count in CL, cmpxchg are mishandled.
This patch adds vex prefix handling. In particular,
it avoids colliding with register operand encoded
in vex. field.
Since we
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