kernel.org
> Subject: Re: [PATCH 2/2] x86/MCE: Always save MCA_{ADDR,MISC,SYND}
> register contents
>
> On Mon, Mar 26, 2018 at 10:09:55PM +0200, Borislav Petkov wrote:
> > On Mon, Mar 26, 2018 at 08:05:37PM +, Ghannam, Yazen wrote:
> > > Sure, I can do that. But I
> -Original Message-
> From: Luck, Tony
> Sent: Monday, March 26, 2018 4:28 PM
> To: Borislav Petkov
> Cc: Ghannam, Yazen ; linux-
> e...@vger.kernel.org; linux-kernel@vger.kernel.org; x...@kernel.org
> Subject: Re: [PATCH 2/2] x86/MCE: Always save MCA_{ADDR,
On Mon, Mar 26, 2018 at 10:09:55PM +0200, Borislav Petkov wrote:
> On Mon, Mar 26, 2018 at 08:05:37PM +, Ghannam, Yazen wrote:
> > Sure, I can do that. But I didn't think it was necessary because it doesn't
> > hurt
> > to read the registers whether or not the valid bits are set.
>
> No,
On Mon, Mar 26, 2018 at 10:09:55PM +0200, Borislav Petkov wrote:
> On Mon, Mar 26, 2018 at 08:05:37PM +, Ghannam, Yazen wrote:
> > Sure, I can do that. But I didn't think it was necessary because it doesn't
> > hurt
> > to read the registers whether or not the valid bits are set.
>
> No,
On Mon, Mar 26, 2018 at 08:05:37PM +, Ghannam, Yazen wrote:
> Sure, I can do that. But I didn't think it was necessary because it doesn't
> hurt
> to read the registers whether or not the valid bits are set.
No, this needs to be AMD-specific because it will confuse people using
Intel
On Mon, Mar 26, 2018 at 08:05:37PM +, Ghannam, Yazen wrote:
> Sure, I can do that. But I didn't think it was necessary because it doesn't
> hurt
> to read the registers whether or not the valid bits are set.
No, this needs to be AMD-specific because it will confuse people using
Intel
> tony.l...@intel.com; x...@kernel.org
> Subject: Re: [PATCH 2/2] x86/MCE: Always save MCA_{ADDR,MISC,SYND}
> register contents
>
> On Mon, Mar 26, 2018 at 02:15:26PM -0500, Yazen Ghannam wrote:
> > From: Yazen Ghannam <yazen.ghan...@amd.com>
> >
> > The Intel
@kernel.org
> Subject: Re: [PATCH 2/2] x86/MCE: Always save MCA_{ADDR,MISC,SYND}
> register contents
>
> On Mon, Mar 26, 2018 at 02:15:26PM -0500, Yazen Ghannam wrote:
> > From: Yazen Ghannam
> >
> > The Intel SDM and AMD APM both state that the contents of the
> MCA
On Mon, Mar 26, 2018 at 02:15:26PM -0500, Yazen Ghannam wrote:
> From: Yazen Ghannam
>
> The Intel SDM and AMD APM both state that the contents of the MCA_ADDR
> register should be saved if MCA_STATUS[ADDRV] is set. The same applies
> to MCA_MISC and MCA_SYND (on SMCA
On Mon, Mar 26, 2018 at 02:15:26PM -0500, Yazen Ghannam wrote:
> From: Yazen Ghannam
>
> The Intel SDM and AMD APM both state that the contents of the MCA_ADDR
> register should be saved if MCA_STATUS[ADDRV] is set. The same applies
> to MCA_MISC and MCA_SYND (on SMCA systems) and their
From: Yazen Ghannam
The Intel SDM and AMD APM both state that the contents of the MCA_ADDR
register should be saved if MCA_STATUS[ADDRV] is set. The same applies
to MCA_MISC and MCA_SYND (on SMCA systems) and their respective valid
bits.
However, the Fam17h Processor
From: Yazen Ghannam
The Intel SDM and AMD APM both state that the contents of the MCA_ADDR
register should be saved if MCA_STATUS[ADDRV] is set. The same applies
to MCA_MISC and MCA_SYND (on SMCA systems) and their respective valid
bits.
However, the Fam17h Processor Programming Reference
12 matches
Mail list logo