sts.infradead.org
> Subject: Re: [PATCH v2] RISC-V: Implement ASID allocator
>
> Hi Anup,
>
> On Thu, Mar 28, 2019 at 06:32:36AM +, Anup Patel wrote:
> > This patch is tested on QEMU/virt machine and SiFive Unleashed board.
> > On QEMU/virt machine, we see 10% (appro
Hi Anup,
On Thu, Mar 28, 2019 at 06:32:36AM +, Anup Patel wrote:
> This patch is tested on QEMU/virt machine and SiFive Unleashed board.
> On QEMU/virt machine, we see 10% (approx) performance improvement with
> SW emulated TLBs provided by QEMU. Unfortunately, ASID bits of SATP CSR
> are not
On Fri, Mar 29, 2019 at 10:34 AM Paul Walmsley wrote:
>
>
> On Thu, 28 Mar 2019, Anup Patel wrote:
>
> > Signed-off-by: Gary Guo
> > Signed-off-by: Anup Patel
> > ---
> > Changes since v1:
> > - We adapt good aspects from Gary Guo's ASID allocator implementation
> > and provide due credit to
On Thu, 28 Mar 2019, Anup Patel wrote:
> Signed-off-by: Gary Guo
> Signed-off-by: Anup Patel
> ---
> Changes since v1:
> - We adapt good aspects from Gary Guo's ASID allocator implementation
> and provide due credit to him by adding his SoB.
This isn't the right way to use Signed-off-by:
On Thu, Mar 28, 2019 at 8:03 PM Gary Guo wrote:
>
>
>
> On 28/03/2019 14:13, Anup Patel wrote:
> > On Thu, Mar 28, 2019 at 7:07 PM Gary Guo wrote:
> >>
> >> Hi Anup,
> >>
> >> The code still does not use ASID in TLB flush routines. Without this
> >> added the code does not boot on systems with
On Thu, Mar 28, 2019 at 8:00 PM Gary Guo wrote:
>
>
>
> On 28/03/2019 14:09, Anup Patel wrote:
> > On Thu, Mar 28, 2019 at 7:07 PM Gary Guo wrote:
> >>
> >> Hi Anup,
> >>
> >> The code still does not use ASID in TLB flush routines. Without this
> >> added the code does not boot on systems with
On 28/03/2019 14:13, Anup Patel wrote:
> On Thu, Mar 28, 2019 at 7:07 PM Gary Guo wrote:
>>
>> Hi Anup,
>>
>> The code still does not use ASID in TLB flush routines. Without this
>> added the code does not boot on systems with true ASID support.
>>
>> We also need to consider the case of
On 28/03/2019 14:09, Anup Patel wrote:
> On Thu, Mar 28, 2019 at 7:07 PM Gary Guo wrote:
>>
>> Hi Anup,
>>
>> The code still does not use ASID in TLB flush routines. Without this
>> added the code does not boot on systems with true ASID support.
>
> Can you elaborate why flush by ASID is need
On Thu, Mar 28, 2019 at 7:07 PM Gary Guo wrote:
>
> Hi Anup,
>
> The code still does not use ASID in TLB flush routines. Without this
> added the code does not boot on systems with true ASID support.
>
> We also need to consider the case of CONTEXTID overflow on 32-bit
> systems. 32-bit CONTEXTID
On Thu, Mar 28, 2019 at 7:07 PM Gary Guo wrote:
>
> Hi Anup,
>
> The code still does not use ASID in TLB flush routines. Without this
> added the code does not boot on systems with true ASID support.
Can you elaborate why flush by ASID is need and flush_tlb_all() will
not work?
>
> We also need
Hi Anup,
The code still does not use ASID in TLB flush routines. Without this
added the code does not boot on systems with true ASID support.
We also need to consider the case of CONTEXTID overflow on 32-bit
systems. 32-bit CONTEXTID may overflow in a month time.
Please all see my inline
Currently, we do local TLB flush on every MM switch. This is very harsh
on performance because we are forcing page table walks after every MM
switch.
This patch implements ASID allocator for assigning an ASID to every MM
context. The number of ASIDs are limited in HW so we create a logical
entity
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