On 01/26/2015 03:35 PM, Maxime Ripard wrote:
Hi Daniel,
On Mon, Jan 26, 2015 at 12:22:16PM +0100, Daniel Lezcano wrote:
On 01/26/2015 10:50 AM, Maxime Ripard wrote:
The parent clock of the sun5i timer is the AHB clock, which rate might change
because of other devices requirements.
This is for
On 03/04/2015 10:32 AM, Maxime Ripard wrote:
On Tue, Mar 03, 2015 at 12:16:57PM +0100, Daniel Lezcano wrote:
On 03/03/2015 09:52 AM, Maxime Ripard wrote:
On Mon, Jan 26, 2015 at 03:35:41PM +0100, Maxime Ripard wrote:
+static int sun5i_rate_cb_clksrc(struct notifier_block *nb,
+
On Tue, Mar 03, 2015 at 12:16:57PM +0100, Daniel Lezcano wrote:
> On 03/03/2015 09:52 AM, Maxime Ripard wrote:
> >On Mon, Jan 26, 2015 at 03:35:41PM +0100, Maxime Ripard wrote:
> +static int sun5i_rate_cb_clksrc(struct notifier_block *nb,
> + unsigned long event, voi
On 03/03/2015 09:52 AM, Maxime Ripard wrote:
On Mon, Jan 26, 2015 at 03:35:41PM +0100, Maxime Ripard wrote:
+static int sun5i_rate_cb_clksrc(struct notifier_block *nb,
+ unsigned long event, void *data)
+{
+ struct clk_notifier_data *ndata = data;
+ stru
On Mon, Jan 26, 2015 at 03:35:41PM +0100, Maxime Ripard wrote:
> > >+static int sun5i_rate_cb_clksrc(struct notifier_block *nb,
> > >+ unsigned long event, void *data)
> > >+{
> > >+ struct clk_notifier_data *ndata = data;
> > >+ struct sun5i_timer *timer = to_sun5i_timer
Hi Daniel,
On Mon, Jan 26, 2015 at 12:22:16PM +0100, Daniel Lezcano wrote:
> On 01/26/2015 10:50 AM, Maxime Ripard wrote:
> >The parent clock of the sun5i timer is the AHB clock, which rate might change
> >because of other devices requirements.
> >
> >This is for example the case on the Allwinner
On 01/26/2015 10:50 AM, Maxime Ripard wrote:
The parent clock of the sun5i timer is the AHB clock, which rate might change
because of other devices requirements.
This is for example the case on the Allwinner A31, where the DMA controller
needs a minimum rate higher than the default, that is enfo
The parent clock of the sun5i timer is the AHB clock, which rate might change
because of other devices requirements.
This is for example the case on the Allwinner A31, where the DMA controller
needs a minimum rate higher than the default, that is enforced after the timer
driver has probed.
Add cl
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