On Mon, Feb 03, 2014 at 04:57:18PM +, Will Deacon wrote:
> > mov[tw]: why?
> > Then we end up battling different available immediate fields in A32/T32
> > instruction sets and v5/v6/v7 architecture versions.
>
> I was making the assumption that UEFI was going to be v7 only... is this not
>
On Mon, Feb 03, 2014 at 04:46:36PM +, Leif Lindholm wrote:
> On Mon, Feb 03, 2014 at 04:00:51PM +, Will Deacon wrote:
> > > > > With the two call sites in uefi_phys.S as:
> > > > >
> > > > > ldr r5, =(CR_M)
> > > > > update_sctlrr12, , r5
> > > > > and
> > > > >
On Mon, Feb 03, 2014 at 04:00:51PM +, Will Deacon wrote:
> > > > With the two call sites in uefi_phys.S as:
> > > >
> > > > ldr r5, =(CR_M)
> > > > update_sctlrr12, , r5
> > > > and
> > > > ldr r4, =(CR_I | CR_C | CR_M)
> > > > update_sctlrr12,
On Mon, Feb 3, 2014 at 10:00 AM, Will Deacon wrote:
> On Mon, Feb 03, 2014 at 03:55:42PM +, Leif Lindholm wrote:
>> On Mon, Feb 03, 2014 at 10:34:15AM +, Will Deacon wrote:
>> > On Thu, Jan 30, 2014 at 01:12:47PM +, Leif Lindholm wrote:
>> > > Oh, that's neat - thanks!
>> > >
>> > >
On Mon, Feb 03, 2014 at 03:55:42PM +, Leif Lindholm wrote:
> On Mon, Feb 03, 2014 at 10:34:15AM +, Will Deacon wrote:
> > On Thu, Jan 30, 2014 at 01:12:47PM +, Leif Lindholm wrote:
> > > Oh, that's neat - thanks!
> > >
> > > Well, given that, I can think of two less horrible options:
On Mon, Feb 03, 2014 at 10:34:15AM +, Will Deacon wrote:
> On Thu, Jan 30, 2014 at 01:12:47PM +, Leif Lindholm wrote:
> > Oh, that's neat - thanks!
> >
> > Well, given that, I can think of two less horrible options:
> > 1)
> > .macro update_sctlr, tmp:req, set=, clear=
> >
On Thu, Jan 30, 2014 at 01:12:47PM +, Leif Lindholm wrote:
> Oh, that's neat - thanks!
>
> Well, given that, I can think of two less horrible options:
> 1)
> .macro update_sctlr, tmp:req, set=, clear=
> mrc p15, 0, \tmp, c1, c0, 0
> .ifnc \set,
> orr \tmp,
On Thu, Jan 30, 2014 at 01:12:47PM +, Leif Lindholm wrote:
Oh, that's neat - thanks!
Well, given that, I can think of two less horrible options:
1)
.macro update_sctlr, tmp:req, set=, clear=
mrc p15, 0, \tmp, c1, c0, 0
.ifnc \set,
orr \tmp, \set
On Mon, Feb 03, 2014 at 10:34:15AM +, Will Deacon wrote:
On Thu, Jan 30, 2014 at 01:12:47PM +, Leif Lindholm wrote:
Oh, that's neat - thanks!
Well, given that, I can think of two less horrible options:
1)
.macro update_sctlr, tmp:req, set=, clear=
mrc p15, 0,
On Mon, Feb 03, 2014 at 03:55:42PM +, Leif Lindholm wrote:
On Mon, Feb 03, 2014 at 10:34:15AM +, Will Deacon wrote:
On Thu, Jan 30, 2014 at 01:12:47PM +, Leif Lindholm wrote:
Oh, that's neat - thanks!
Well, given that, I can think of two less horrible options:
1)
On Mon, Feb 3, 2014 at 10:00 AM, Will Deacon will.dea...@arm.com wrote:
On Mon, Feb 03, 2014 at 03:55:42PM +, Leif Lindholm wrote:
On Mon, Feb 03, 2014 at 10:34:15AM +, Will Deacon wrote:
On Thu, Jan 30, 2014 at 01:12:47PM +, Leif Lindholm wrote:
Oh, that's neat - thanks!
On Mon, Feb 03, 2014 at 04:00:51PM +, Will Deacon wrote:
With the two call sites in uefi_phys.S as:
ldr r5, =(CR_M)
update_sctlrr12, , r5
and
ldr r4, =(CR_I | CR_C | CR_M)
update_sctlrr12, r4
These ldr= could
On Mon, Feb 03, 2014 at 04:46:36PM +, Leif Lindholm wrote:
On Mon, Feb 03, 2014 at 04:00:51PM +, Will Deacon wrote:
With the two call sites in uefi_phys.S as:
ldr r5, =(CR_M)
update_sctlrr12, , r5
and
ldr r4, =(CR_I | CR_C |
On Mon, Feb 03, 2014 at 04:57:18PM +, Will Deacon wrote:
mov[tw]: why?
Then we end up battling different available immediate fields in A32/T32
instruction sets and v5/v6/v7 architecture versions.
I was making the assumption that UEFI was going to be v7 only... is this not
true?
On Wed, Jan 29, 2014 at 03:58:44PM -0500, Mark Salter wrote:
> > (i.e. conditionalise on whether an optional parameter was provided),
> > so my attempt of refactoring actually ends up using an additional
> > register:
> >
>
> Register parameters are just strings, so how about this:
>
>
On Wed, Jan 29, 2014 at 03:58:44PM -0500, Mark Salter wrote:
(i.e. conditionalise on whether an optional parameter was provided),
so my attempt of refactoring actually ends up using an additional
register:
Register parameters are just strings, so how about this:
.macro foo
On Wed, 2014-01-29 at 18:28 +, Leif Lindholm wrote:
> On Wed, Jan 22, 2014 at 11:20:55AM +, Will Deacon wrote:
> > > +#ifdef CONFIG_CPU_CP15
> > > +/* Macro for setting/clearing bits in sctlr */
> > > + .macro update_sctlr, set:req, clear:req, tmp:req, tmp2:req
> > > + mrc p15, 0,
Hi Leif,
On Wed, Jan 29, 2014 at 06:28:05PM +, Leif Lindholm wrote:
> On Wed, Jan 22, 2014 at 11:20:55AM +, Will Deacon wrote:
> > > +#ifdef CONFIG_CPU_CP15
> > > +/* Macro for setting/clearing bits in sctlr */
> > > + .macro update_sctlr, set:req, clear:req, tmp:req, tmp2:req
> > > + mrc
On Wed, Jan 22, 2014 at 11:20:55AM +, Will Deacon wrote:
> > +#ifdef CONFIG_CPU_CP15
> > +/* Macro for setting/clearing bits in sctlr */
> > + .macro update_sctlr, set:req, clear:req, tmp:req, tmp2:req
> > + mrc p15, 0, \tmp, c1, c0, 0
> > + ldr \tmp2, =\set
> > + orr \tmp,
On Wed, Jan 22, 2014 at 11:20:55AM +, Will Deacon wrote:
+#ifdef CONFIG_CPU_CP15
+/* Macro for setting/clearing bits in sctlr */
+ .macro update_sctlr, set:req, clear:req, tmp:req, tmp2:req
+ mrc p15, 0, \tmp, c1, c0, 0
+ ldr \tmp2, =\set
+ orr \tmp, \tmp, \tmp2
Hi Leif,
On Wed, Jan 29, 2014 at 06:28:05PM +, Leif Lindholm wrote:
On Wed, Jan 22, 2014 at 11:20:55AM +, Will Deacon wrote:
+#ifdef CONFIG_CPU_CP15
+/* Macro for setting/clearing bits in sctlr */
+ .macro update_sctlr, set:req, clear:req, tmp:req, tmp2:req
+ mrc p15, 0,
On Wed, 2014-01-29 at 18:28 +, Leif Lindholm wrote:
On Wed, Jan 22, 2014 at 11:20:55AM +, Will Deacon wrote:
+#ifdef CONFIG_CPU_CP15
+/* Macro for setting/clearing bits in sctlr */
+ .macro update_sctlr, set:req, clear:req, tmp:req, tmp2:req
+ mrc p15, 0, \tmp, c1, c0,
On Sat, Jan 11, 2014 at 01:05:21PM +, Leif Lindholm wrote:
> A new macro for setting/clearing bits in the SCTLR.
>
> Signed-off-by: Leif Lindholm
> Suggested-by: Will Deacon
> ---
> arch/arm/include/asm/assembler.h | 13 +
> 1 file changed, 13 insertions(+)
>
> diff --git
On Sat, Jan 11, 2014 at 01:05:21PM +, Leif Lindholm wrote:
A new macro for setting/clearing bits in the SCTLR.
Signed-off-by: Leif Lindholm leif.lindh...@linaro.org
Suggested-by: Will Deacon will.dea...@arm.com
---
arch/arm/include/asm/assembler.h | 13 +
1 file changed,
A new macro for setting/clearing bits in the SCTLR.
Signed-off-by: Leif Lindholm
Suggested-by: Will Deacon
---
arch/arm/include/asm/assembler.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index
A new macro for setting/clearing bits in the SCTLR.
Signed-off-by: Leif Lindholm leif.lindh...@linaro.org
Suggested-by: Will Deacon will.dea...@arm.com
---
arch/arm/include/asm/assembler.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/include/asm/assembler.h
26 matches
Mail list logo
