Hi Bean,
> I encounter one question as below when I reply the email of linux-mtd, but If
> I reply other mail list
> Such as scsi mail list, mmc mail list, no any problem. Do you know why?
>
>
> Your mail to 'linux-mtd' with the subject
>
> Re: [PATCH v6 0/
Hi Bean,
> I encounter one question as below when I reply the email of linux-mtd, but If
> I reply other mail list
> Such as scsi mail list, mmc mail list, no any problem. Do you know why?
>
>
> Your mail to 'linux-mtd' with the subject
>
> Re: [PATCH v6 0/
ch as scsi mail list, mmc mail list, no any problem. Do you know why?
Your mail to 'linux-mtd' with the subject
Re: [PATCH v6 0/6] mtd: rawnand: support MT29F1G08ABAFAWP-ITE:F
Is being held until the list moderator can review it for approval.
The reason it is being held:
Message has a su
ch as scsi mail list, mmc mail list, no any problem. Do you know why?
Your mail to 'linux-mtd' with the subject
Re: [PATCH v6 0/6] mtd: rawnand: support MT29F1G08ABAFAWP-ITE:F
Is being held until the list moderator can review it for approval.
The reason it is being held:
Message has a su
On Tue, 10 Jul 2018 11:40:08 +
"Bean Huo (beanhuo)" wrote:
> Hi, Boris
> >>
> >> Okay, I think we already had this discussion, but I'm asking it again.
> >> What are the possible values for that field and what do they mean?
> >
> >Still, it's not clear to me what "Internal ECC level"
On Tue, 10 Jul 2018 11:40:08 +
"Bean Huo (beanhuo)" wrote:
> Hi, Boris
> >>
> >> Okay, I think we already had this discussion, but I'm asking it again.
> >> What are the possible values for that field and what do they mean?
> >
> >Still, it's not clear to me what "Internal ECC level"
Hi, Boris
>>
>> Okay, I think we already had this discussion, but I'm asking it again.
>> What are the possible values for that field and what do they mean?
>
>Still, it's not clear to me what "Internal ECC level" means. It seems that NAND
>chips having on-die ECC have this field set to 10b
Hi, Boris
>>
>> Okay, I think we already had this discussion, but I'm asking it again.
>> What are the possible values for that field and what do they mean?
>
>Still, it's not clear to me what "Internal ECC level" means. It seems that NAND
>chips having on-die ECC have this field set to 10b
On Mon, 9 Jul 2018 18:31:24 +0200
Boris Brezillon wrote:
> Hi Bean,
>
> On Mon, 9 Jul 2018 15:54:11 +
> "Bean Huo (beanhuo)" wrote:
>
> > Hi, Boris and Chris
> >
> > >>
> > >> I see 2 solutions to this problem:
> > >> 1/ Bean provides us a solution to reliably detect when ECC can be
>
On Mon, 9 Jul 2018 18:31:24 +0200
Boris Brezillon wrote:
> Hi Bean,
>
> On Mon, 9 Jul 2018 15:54:11 +
> "Bean Huo (beanhuo)" wrote:
>
> > Hi, Boris and Chris
> >
> > >>
> > >> I see 2 solutions to this problem:
> > >> 1/ Bean provides us a solution to reliably detect when ECC can be
>
Hi Bean,
On Mon, 9 Jul 2018 15:54:11 +
"Bean Huo (beanhuo)" wrote:
> Hi, Boris and Chris
>
> >>
> >> I see 2 solutions to this problem:
> >> 1/ Bean provides us a solution to reliably detect when ECC can be
> >>de-actived and when it can't
> >> 2/ We only ever expose 64 bytes of OOB to
Hi Bean,
On Mon, 9 Jul 2018 15:54:11 +
"Bean Huo (beanhuo)" wrote:
> Hi, Boris and Chris
>
> >>
> >> I see 2 solutions to this problem:
> >> 1/ Bean provides us a solution to reliably detect when ECC can be
> >>de-actived and when it can't
> >> 2/ We only ever expose 64 bytes of OOB to
Hi, Boris and Chris
>>
>> I see 2 solutions to this problem:
>> 1/ Bean provides us a solution to reliably detect when ECC can be
>>de-actived and when it can't
>> 2/ We only ever expose 64 bytes of OOB to the user and consider that
>>ECC can be disabled, even if it can't in reality
>>
>
Hi, Boris and Chris
>>
>> I see 2 solutions to this problem:
>> 1/ Bean provides us a solution to reliably detect when ECC can be
>>de-actived and when it can't
>> 2/ We only ever expose 64 bytes of OOB to the user and consider that
>>ECC can be disabled, even if it can't in reality
>>
>
Hi Boris,
On 07/07/18 09:37, Boris Brezillon wrote:
> On Fri, 6 Jul 2018 21:27:20 +0200
> Boris Brezillon wrote:
>
>> On Mon, 25 Jun 2018 10:44:42 +1200
>> Chris Packham wrote:
>>
>>> Hi,
>>>
>>> I'm looking at adding support for the Micron MT29F1G08ABAFAWP-ITE:F chip
>>
>> Hm, it's even worse
Hi Boris,
On 07/07/18 09:37, Boris Brezillon wrote:
> On Fri, 6 Jul 2018 21:27:20 +0200
> Boris Brezillon wrote:
>
>> On Mon, 25 Jun 2018 10:44:42 +1200
>> Chris Packham wrote:
>>
>>> Hi,
>>>
>>> I'm looking at adding support for the Micron MT29F1G08ABAFAWP-ITE:F chip
>>
>> Hm, it's even worse
On Fri, 6 Jul 2018 21:27:20 +0200
Boris Brezillon wrote:
> On Mon, 25 Jun 2018 10:44:42 +1200
> Chris Packham wrote:
>
> > Hi,
> >
> > I'm looking at adding support for the Micron MT29F1G08ABAFAWP-ITE:F chip
>
> Hm, it's even worse than I thought. The model name does not include the
> -ITE
On Fri, 6 Jul 2018 21:27:20 +0200
Boris Brezillon wrote:
> On Mon, 25 Jun 2018 10:44:42 +1200
> Chris Packham wrote:
>
> > Hi,
> >
> > I'm looking at adding support for the Micron MT29F1G08ABAFAWP-ITE:F chip
>
> Hm, it's even worse than I thought. The model name does not include the
> -ITE
On Mon, 25 Jun 2018 10:44:42 +1200
Chris Packham wrote:
> Hi,
>
> I'm looking at adding support for the Micron MT29F1G08ABAFAWP-ITE:F chip
Hm, it's even worse than I thought. The model name does not include the
-ITE suffix (E means ECC can't be disabled), which means we have no way
to detect
On Mon, 25 Jun 2018 10:44:42 +1200
Chris Packham wrote:
> Hi,
>
> I'm looking at adding support for the Micron MT29F1G08ABAFAWP-ITE:F chip
Hm, it's even worse than I thought. The model name does not include the
-ITE suffix (E means ECC can't be disabled), which means we have no way
to detect
Hi Chris,
On Mon, 25 Jun 2018 10:44:42 +1200, Chris Packham
wrote:
> Hi,
>
> I'm looking at adding support for the Micron MT29F1G08ABAFAWP-ITE:F chip
> to one of our boards which uses the Marvell NFCv2 controller.
>
> This particular chip is a bit odd in that the datasheet states support
>
Hi Chris,
On Mon, 25 Jun 2018 10:44:42 +1200, Chris Packham
wrote:
> Hi,
>
> I'm looking at adding support for the Micron MT29F1G08ABAFAWP-ITE:F chip
> to one of our boards which uses the Marvell NFCv2 controller.
>
> This particular chip is a bit odd in that the datasheet states support
>
Hi,
I'm looking at adding support for the Micron MT29F1G08ABAFAWP-ITE:F chip
to one of our boards which uses the Marvell NFCv2 controller.
This particular chip is a bit odd in that the datasheet states support
for ONFI 1.0 but the revision number field is 00 00. It also is marked
ABAFA but
Hi,
I'm looking at adding support for the Micron MT29F1G08ABAFAWP-ITE:F chip
to one of our boards which uses the Marvell NFCv2 controller.
This particular chip is a bit odd in that the datasheet states support
for ONFI 1.0 but the revision number field is 00 00. It also is marked
ABAFA but
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