On Sun, Jul 31, 2016 at 12:40:48AM +1000, Julian Calaby wrote:
> Hi Marcus,
>
> On Sun, Jul 31, 2016 at 12:27 AM, wrote:
> > From: Marcus Cooper
> >
> > The A31 SoC uses the same SPDIF block as found in earlier SoCs, but its
> > reset is controlled via a separate reset controller.
> >
> > The D
Hi Marcus,
On Sun, Jul 31, 2016 at 12:27 AM, wrote:
> From: Marcus Cooper
>
> The A31 SoC uses the same SPDIF block as found in earlier SoCs, but its
> reset is controlled via a separate reset controller.
>
> The DMA also complains when the maxburst is set to 4 so it's been adjusted
> to 8 whic
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