Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-07 Thread Dou Liyang
Hi tglx, At 10/07/2016 09:00 PM, Thomas Gleixner wrote: On Fri, 7 Oct 2016, Thomas Gleixner wrote: On Fri, 7 Oct 2016, Dou Liyang wrote: Is it possible that the "-1/ox" could appear in the MADT which is one of the ACPI tables? According to the SDM the x2apic id is a 32bit ID, so

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-07 Thread Dou Liyang
Hi tglx, At 10/07/2016 09:00 PM, Thomas Gleixner wrote: On Fri, 7 Oct 2016, Thomas Gleixner wrote: On Fri, 7 Oct 2016, Dou Liyang wrote: Is it possible that the "-1/ox" could appear in the MADT which is one of the ACPI tables? According to the SDM the x2apic id is a 32bit ID, so

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-07 Thread Dou Liyang
Hi tglx, At 10/07/2016 09:07 PM, Thomas Gleixner wrote: On Thu, 6 Oct 2016, Dou Liyang wrote: + if (processor->id >= 255) { + ++disabled_cpus; Incrementing disabled_cpus here is simply wrong because 0xff is an invalid local APIC id. So we can simply return -EINVAL and be

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-07 Thread Dou Liyang
Hi tglx, At 10/07/2016 09:07 PM, Thomas Gleixner wrote: On Thu, 6 Oct 2016, Dou Liyang wrote: + if (processor->id >= 255) { + ++disabled_cpus; Incrementing disabled_cpus here is simply wrong because 0xff is an invalid local APIC id. So we can simply return -EINVAL and be

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-07 Thread Yinghai Lu
On Fri, Oct 7, 2016 at 6:00 AM, Thomas Gleixner wrote: > On Fri, 7 Oct 2016, Thomas Gleixner wrote: >> On Fri, 7 Oct 2016, Dou Liyang wrote: >> > Is it possible that the "-1/ox" could appear in the MADT which is >> > one >> > of the ACPI tables? >> >> According to the

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-07 Thread Yinghai Lu
On Fri, Oct 7, 2016 at 6:00 AM, Thomas Gleixner wrote: > On Fri, 7 Oct 2016, Thomas Gleixner wrote: >> On Fri, 7 Oct 2016, Dou Liyang wrote: >> > Is it possible that the "-1/ox" could appear in the MADT which is >> > one >> > of the ACPI tables? >> >> According to the SDM the x2apic id

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-07 Thread Thomas Gleixner
On Thu, 6 Oct 2016, Dou Liyang wrote: > > + if (processor->id >= 255) { > + ++disabled_cpus; Incrementing disabled_cpus here is simply wrong because 0xff is an invalid local APIC id. So we can simply return -EINVAL and be done with it. > + return -EINVAL;

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-07 Thread Thomas Gleixner
On Thu, 6 Oct 2016, Dou Liyang wrote: > > + if (processor->id >= 255) { > + ++disabled_cpus; Incrementing disabled_cpus here is simply wrong because 0xff is an invalid local APIC id. So we can simply return -EINVAL and be done with it. > + return -EINVAL;

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-07 Thread Thomas Gleixner
On Fri, 7 Oct 2016, Thomas Gleixner wrote: > On Fri, 7 Oct 2016, Dou Liyang wrote: > > Is it possible that the "-1/ox" could appear in the MADT which is > > one > > of the ACPI tables? > > According to the SDM the x2apic id is a 32bit ID, so 0x is a > legitimate value. The ACPI

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-07 Thread Thomas Gleixner
On Fri, 7 Oct 2016, Thomas Gleixner wrote: > On Fri, 7 Oct 2016, Dou Liyang wrote: > > Is it possible that the "-1/ox" could appear in the MADT which is > > one > > of the ACPI tables? > > According to the SDM the x2apic id is a 32bit ID, so 0x is a > legitimate value. The ACPI

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-07 Thread Thomas Gleixner
On Fri, 7 Oct 2016, Dou Liyang wrote: > Is it possible that the "-1/ox" could appear in the MADT which is one > of the ACPI tables? According to the SDM the x2apic id is a 32bit ID, so 0x is a legitimate value. Thanks, tglx

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-07 Thread Thomas Gleixner
On Fri, 7 Oct 2016, Dou Liyang wrote: > Is it possible that the "-1/ox" could appear in the MADT which is one > of the ACPI tables? According to the SDM the x2apic id is a 32bit ID, so 0x is a legitimate value. Thanks, tglx

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-07 Thread Thomas Gleixner
On Thu, 6 Oct 2016, Yinghai Lu wrote: > Yes, that should work. but should do the same thing for x2apic > > in acpi_parse_x2apic should have > > > + if (processor->local_apic_id == -1) { > > + ++disabled_cpus; > > + return -EINVAL; > > + } So that means,

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-07 Thread Thomas Gleixner
On Thu, 6 Oct 2016, Yinghai Lu wrote: > Yes, that should work. but should do the same thing for x2apic > > in acpi_parse_x2apic should have > > > + if (processor->local_apic_id == -1) { > > + ++disabled_cpus; > > + return -EINVAL; > > + } So that means,

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-07 Thread Thomas Gleixner
On Thu, 6 Oct 2016, Yinghai Lu wrote: > On Thu, Oct 6, 2016 at 1:06 AM, Dou Liyang wrote: > Yes, that should work. but should do the same thing for x2apic > > in acpi_parse_x2apic should have > > > + if (processor->local_apic_id == -1) { > > +

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-07 Thread Thomas Gleixner
On Thu, 6 Oct 2016, Yinghai Lu wrote: > On Thu, Oct 6, 2016 at 1:06 AM, Dou Liyang wrote: > Yes, that should work. but should do the same thing for x2apic > > in acpi_parse_x2apic should have > > > + if (processor->local_apic_id == -1) { > > + ++disabled_cpus; > > +

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-06 Thread Dou Liyang
Hi Yinghai At 10/07/2016 05:20 AM, Yinghai Lu wrote: On Thu, Oct 6, 2016 at 1:06 AM, Dou Liyang wrote: I seem to remember that in x2APIC Spec the x2APIC ID may be at 255 or greater. Good to know. Maybe later when one package have more cores like 30 cores etc.

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-06 Thread Dou Liyang
Hi Yinghai At 10/07/2016 05:20 AM, Yinghai Lu wrote: On Thu, Oct 6, 2016 at 1:06 AM, Dou Liyang wrote: I seem to remember that in x2APIC Spec the x2APIC ID may be at 255 or greater. Good to know. Maybe later when one package have more cores like 30 cores etc. If we do that judgment, it

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-06 Thread Yinghai Lu
On Thu, Oct 6, 2016 at 1:06 AM, Dou Liyang wrote: > I seem to remember that in x2APIC Spec the x2APIC ID may be at 255 or > greater. Good to know. Maybe later when one package have more cores like 30 cores etc. > If we do that judgment, it may be affect x2APIC's work

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-06 Thread Yinghai Lu
On Thu, Oct 6, 2016 at 1:06 AM, Dou Liyang wrote: > I seem to remember that in x2APIC Spec the x2APIC ID may be at 255 or > greater. Good to know. Maybe later when one package have more cores like 30 cores etc. > If we do that judgment, it may be affect x2APIC's work in some other places. > >

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-06 Thread Dou Liyang
Hi Yinghai, At 10/06/2016 12:53 PM, Yinghai Lu wrote: On Wed, Oct 5, 2016 at 7:04 AM, Thomas Gleixner wrote: @@ -176,6 +177,11 @@ static int acpi_register_lapic(int id, u return -EINVAL; } +if (!enabled && (id == disabled_id)) { +++disabled_cpus;

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-06 Thread Dou Liyang
Hi Yinghai, At 10/06/2016 12:53 PM, Yinghai Lu wrote: On Wed, Oct 5, 2016 at 7:04 AM, Thomas Gleixner wrote: @@ -176,6 +177,11 @@ static int acpi_register_lapic(int id, u return -EINVAL; } +if (!enabled && (id == disabled_id)) { +++disabled_cpus; +return

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-05 Thread Yinghai Lu
On Wed, Oct 5, 2016 at 7:04 AM, Thomas Gleixner wrote: >> @@ -176,6 +177,11 @@ static int acpi_register_lapic(int id, u >> return -EINVAL; >> } >> >> +if (!enabled && (id == disabled_id)) { >> +++disabled_cpus; >> +return -EINVAL; >> +} >

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-05 Thread Yinghai Lu
On Wed, Oct 5, 2016 at 7:04 AM, Thomas Gleixner wrote: >> @@ -176,6 +177,11 @@ static int acpi_register_lapic(int id, u >> return -EINVAL; >> } >> >> +if (!enabled && (id == disabled_id)) { >> +++disabled_cpus; >> +return -EINVAL; >> +} > > Why would you need

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-05 Thread Thomas Gleixner
On Mon, 3 Oct 2016, Yinghai Lu wrote: > init_cpu_node become: > [ 55.477160] init_cpu_to_node: > [ 55.483280] cpu 0 -> apicid 0x0 -> node 0 > [ 55.491558] cpu 1 -> apicid 0xff -> node 1 > [ 55.500017] cpu 2 -> apicid 0x2 -> node 0 > [ 55.508296] cpu 3 -> apicid 0x4 -> node 0 > [

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-05 Thread Thomas Gleixner
On Mon, 3 Oct 2016, Yinghai Lu wrote: > init_cpu_node become: > [ 55.477160] init_cpu_to_node: > [ 55.483280] cpu 0 -> apicid 0x0 -> node 0 > [ 55.491558] cpu 1 -> apicid 0xff -> node 1 > [ 55.500017] cpu 2 -> apicid 0x2 -> node 0 > [ 55.508296] cpu 3 -> apicid 0x4 -> node 0 > [

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-04 Thread Yinghai Lu
On Thu, Sep 22, 2016 at 12:10 PM, tip-bot for Gu Zheng wrote: > > x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping > > The whole patch-set aims at making cpuid <-> nodeid mapping persistent. So > that, > when node online/offline happens, cache based on cpuid

Re: [tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-10-04 Thread Yinghai Lu
On Thu, Sep 22, 2016 at 12:10 PM, tip-bot for Gu Zheng wrote: > > x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping > > The whole patch-set aims at making cpuid <-> nodeid mapping persistent. So > that, > when node online/offline happens, cache based on cpuid <-> nodeid mapping

[tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-09-22 Thread tip-bot for Gu Zheng
Commit-ID: 8f54969dc8d6704632b42cbb5e47730cd75cc713 Gitweb: http://git.kernel.org/tip/8f54969dc8d6704632b42cbb5e47730cd75cc713 Author: Gu Zheng AuthorDate: Thu, 25 Aug 2016 16:35:16 +0800 Committer: Thomas Gleixner CommitDate: Wed, 21 Sep

[tip:x86/apic] x86/acpi: Introduce persistent storage for cpuid <-> apicid mapping

2016-09-22 Thread tip-bot for Gu Zheng
Commit-ID: 8f54969dc8d6704632b42cbb5e47730cd75cc713 Gitweb: http://git.kernel.org/tip/8f54969dc8d6704632b42cbb5e47730cd75cc713 Author: Gu Zheng AuthorDate: Thu, 25 Aug 2016 16:35:16 +0800 Committer: Thomas Gleixner CommitDate: Wed, 21 Sep 2016 21:18:38 +0200 x86/acpi: Introduce