RE: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support

2014-10-22 Thread beanhuo
>This patch adds code which enables Quad I/O mode on Micron SPI NOR flashes. >For Micron SPI NOR flash, enabling or disabling quad I/O protocol is >controlled by >EVCR (Enhanced Volatile Configuration Register), Quad I/O protocol bit 7. >When EVCR bit 7 is reset to 0, the SPI NOR flash will

RE: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support

2014-10-22 Thread beanhuo
This patch adds code which enables Quad I/O mode on Micron SPI NOR flashes. For Micron SPI NOR flash, enabling or disabling quad I/O protocol is controlled by EVCR (Enhanced Volatile Configuration Register), Quad I/O protocol bit 7. When EVCR bit 7 is reset to 0, the SPI NOR flash will operate

RE: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support

2014-10-15 Thread bpqw
>Acked-by: Marek Vasut Hi,brian How about this patch? And can be accepted by linux-mtd? -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read

RE: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support

2014-10-15 Thread bpqw
Acked-by: Marek Vasut ma...@denx.de Hi,brian How about this patch? And can be accepted by linux-mtd? -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

RE: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support

2014-10-03 Thread bpqw
>> Signed-off-by: bean huo >I don't see anything obviously wrong. >Acked-by: Marek Vasut Hi,Brian How do you think about this patch? -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at

RE: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support

2014-10-03 Thread bpqw
Signed-off-by: bean huo bean...@micron.com I don't see anything obviously wrong. Acked-by: Marek Vasut ma...@denx.de Hi,Brian How do you think about this patch? -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More

Re: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support

2014-10-01 Thread Marek Vasut
On Wednesday, October 01, 2014 at 04:28:17 PM, bpqw wrote: > This patch adds code which enables Quad I/O mode on Micron SPI NOR flashes. > > For Micron SPI NOR flash, enabling or disabling quad I/O protocol is > controlled by EVCR (Enhanced Volatile Configuration Register), Quad I/O > protocol

Re: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support

2014-10-01 Thread Marek Vasut
On Wednesday, October 01, 2014 at 04:24:41 PM, Bean Huo 霍斌斌 (beanhuo) wrote: > >> For Micron spi norflash,enables or disables quad I/O protocol ,which > >> controled by EVCR(Enhanced Volatile Configuration Register) Quad I/O > >> protocol bit 7.When EVCR bit 7 is reset to 0, the spi norflash will

RE: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support

2014-10-01 Thread beanhuo
>> For Micron spi norflash,enables or disables quad I/O protocol ,which >> controled by EVCR(Enhanced Volatile Configuration Register) Quad I/O >> protocol bit 7.When EVCR bit 7 is reset to 0, the spi norflash will >> operate in quad I/O following the next WRITE ENHANCED VOLATILE >>

RE: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support

2014-10-01 Thread beanhuo
For Micron spi norflash,enables or disables quad I/O protocol ,which controled by EVCR(Enhanced Volatile Configuration Register) Quad I/O protocol bit 7.When EVCR bit 7 is reset to 0, the spi norflash will operate in quad I/O following the next WRITE ENHANCED VOLATILE CONFIGURATION

Re: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support

2014-10-01 Thread Marek Vasut
On Wednesday, October 01, 2014 at 04:24:41 PM, Bean Huo 霍斌斌 (beanhuo) wrote: For Micron spi norflash,enables or disables quad I/O protocol ,which controled by EVCR(Enhanced Volatile Configuration Register) Quad I/O protocol bit 7.When EVCR bit 7 is reset to 0, the spi norflash will operate

Re: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support

2014-10-01 Thread Marek Vasut
On Wednesday, October 01, 2014 at 04:28:17 PM, bpqw wrote: This patch adds code which enables Quad I/O mode on Micron SPI NOR flashes. For Micron SPI NOR flash, enabling or disabling quad I/O protocol is controlled by EVCR (Enhanced Volatile Configuration Register), Quad I/O protocol bit 7.

Re: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support

2014-09-30 Thread Marek Vasut
On Tuesday, September 30, 2014 at 04:47:39 AM, Bean Huo 霍斌斌 (beanhuo) wrote: > For Micron spi norflash,enables or disables quad I/O > protocol ,which controled by EVCR(Enhanced > Volatile Configuration Register) Quad I/O > protocol bit 7.When EVCR bit 7 is reset to 0, > the spi norflash will

Re: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support

2014-09-30 Thread Marek Vasut
On Tuesday, September 30, 2014 at 04:47:39 AM, Bean Huo 霍斌斌 (beanhuo) wrote: For Micron spi norflash,enables or disables quad I/O protocol ,which controled by EVCR(Enhanced Volatile Configuration Register) Quad I/O protocol bit 7.When EVCR bit 7 is reset to 0, the spi norflash will operate in