On Fri, May 26, 2017 at 12:05:36PM -0700, kan.li...@intel.com wrote:
> From: Kan Liang
>
> Currently, there is no way to measure the time cost in System management
> mode (SMM) by perf.
>
> Intel perfmon supports FREEZE_WHILE_SMM bit in IA32_DEBUGCTL. Once it sets,
> the
On Fri, May 26, 2017 at 12:05:36PM -0700, kan.li...@intel.com wrote:
> From: Kan Liang
>
> Currently, there is no way to measure the time cost in System management
> mode (SMM) by perf.
>
> Intel perfmon supports FREEZE_WHILE_SMM bit in IA32_DEBUGCTL. Once it sets,
> the PMU core counters will
n
>
> > Subject: RE: [PATCH V2 0/2] measure SMI cost (user)
> >
> > Hi Jirka,
> >
> > Have you got a chance to try the code?
> > Are you OK with the patch?
> >
> > Thanks,
> > Kan
> >
> > >
> > > Em Fri, Jun 0
n
>
> > Subject: RE: [PATCH V2 0/2] measure SMI cost (user)
> >
> > Hi Jirka,
> >
> > Have you got a chance to try the code?
> > Are you OK with the patch?
> >
> > Thanks,
> > Kan
> >
> > >
> > > Em Fri, Jun 0
Hi Arnaldo and Jirka,
Ping.
Any comments for the patch?
Thanks,
Kan
> Subject: RE: [PATCH V2 0/2] measure SMI cost (user)
>
> Hi Jirka,
>
> Have you got a chance to try the code?
> Are you OK with the patch?
>
> Thanks,
> Kan
>
> >
> > Em Fri, Ju
Hi Arnaldo and Jirka,
Ping.
Any comments for the patch?
Thanks,
Kan
> Subject: RE: [PATCH V2 0/2] measure SMI cost (user)
>
> Hi Jirka,
>
> Have you got a chance to try the code?
> Are you OK with the patch?
>
> Thanks,
> Kan
>
> >
> > Em Fri, Ju
Hi Jirka,
Have you got a chance to try the code?
Are you OK with the patch?
Thanks,
Kan
>
> Em Fri, Jun 02, 2017 at 03:45:11PM +, Liang, Kan escreveu:
> > > > On Mon, May 29, 2017 at 02:52:39PM +0200, Peter Zijlstra wrote:
> > > > > On Mon, May 29, 2017 at 02:46:37PM +0200, Jiri Olsa
Hi Jirka,
Have you got a chance to try the code?
Are you OK with the patch?
Thanks,
Kan
>
> Em Fri, Jun 02, 2017 at 03:45:11PM +, Liang, Kan escreveu:
> > > > On Mon, May 29, 2017 at 02:52:39PM +0200, Peter Zijlstra wrote:
> > > > > On Mon, May 29, 2017 at 02:46:37PM +0200, Jiri Olsa
Em Fri, Jun 02, 2017 at 03:45:11PM +, Liang, Kan escreveu:
> > > On Mon, May 29, 2017 at 02:52:39PM +0200, Peter Zijlstra wrote:
> > > > On Mon, May 29, 2017 at 02:46:37PM +0200, Jiri Olsa wrote:
> > > > > for some reason I can't get single SMI count generated, is there a
> > > > > setup/bench
Em Fri, Jun 02, 2017 at 03:45:11PM +, Liang, Kan escreveu:
> > > On Mon, May 29, 2017 at 02:52:39PM +0200, Peter Zijlstra wrote:
> > > > On Mon, May 29, 2017 at 02:46:37PM +0200, Jiri Olsa wrote:
> > > > > for some reason I can't get single SMI count generated, is there a
> > > > > setup/bench
> >
> > On Mon, May 29, 2017 at 02:52:39PM +0200, Peter Zijlstra wrote:
> > > On Mon, May 29, 2017 at 02:46:37PM +0200, Jiri Olsa wrote:
> > >
> > > > for some reason I can't get single SMI count generated, is there a
> > > > setup/bench that would provoke that?
> > >
> > > Not having SMIs is a
> >
> > On Mon, May 29, 2017 at 02:52:39PM +0200, Peter Zijlstra wrote:
> > > On Mon, May 29, 2017 at 02:46:37PM +0200, Jiri Olsa wrote:
> > >
> > > > for some reason I can't get single SMI count generated, is there a
> > > > setup/bench that would provoke that?
> > >
> > > Not having SMIs is a
>
> On Mon, May 29, 2017 at 02:52:39PM +0200, Peter Zijlstra wrote:
> > On Mon, May 29, 2017 at 02:46:37PM +0200, Jiri Olsa wrote:
> >
> > > for some reason I can't get single SMI count generated, is there a
> > > setup/bench that would provoke that?
> >
> > Not having SMIs is a good thing ;-)
>
>
> On Mon, May 29, 2017 at 02:52:39PM +0200, Peter Zijlstra wrote:
> > On Mon, May 29, 2017 at 02:46:37PM +0200, Jiri Olsa wrote:
> >
> > > for some reason I can't get single SMI count generated, is there a
> > > setup/bench that would provoke that?
> >
> > Not having SMIs is a good thing ;-)
>
On Mon, May 29, 2017 at 02:52:39PM +0200, Peter Zijlstra wrote:
> On Mon, May 29, 2017 at 02:46:37PM +0200, Jiri Olsa wrote:
>
> > for some reason I can't get single SMI count generated,
> > is there a setup/bench that would provoke that?
>
> Not having SMIs is a good thing ;-)
>
> Not sure we
On Mon, May 29, 2017 at 02:52:39PM +0200, Peter Zijlstra wrote:
> On Mon, May 29, 2017 at 02:46:37PM +0200, Jiri Olsa wrote:
>
> > for some reason I can't get single SMI count generated,
> > is there a setup/bench that would provoke that?
>
> Not having SMIs is a good thing ;-)
>
> Not sure we
On Mon, May 29, 2017 at 02:46:37PM +0200, Jiri Olsa wrote:
> for some reason I can't get single SMI count generated,
> is there a setup/bench that would provoke that?
Not having SMIs is a good thing ;-)
Not sure we can tickle them in a reliable way.
On Mon, May 29, 2017 at 02:46:37PM +0200, Jiri Olsa wrote:
> for some reason I can't get single SMI count generated,
> is there a setup/bench that would provoke that?
Not having SMIs is a good thing ;-)
Not sure we can tickle them in a reliable way.
On Fri, May 26, 2017 at 12:05:36PM -0700, kan.li...@intel.com wrote:
> From: Kan Liang
>
> Currently, there is no way to measure the time cost in System management
> mode (SMM) by perf.
>
> Intel perfmon supports FREEZE_WHILE_SMM bit in IA32_DEBUGCTL. Once it sets,
> the
On Fri, May 26, 2017 at 12:05:36PM -0700, kan.li...@intel.com wrote:
> From: Kan Liang
>
> Currently, there is no way to measure the time cost in System management
> mode (SMM) by perf.
>
> Intel perfmon supports FREEZE_WHILE_SMM bit in IA32_DEBUGCTL. Once it sets,
> the PMU core counters will
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